ON NCP431B Programmable precision reference Datasheet

NCP431A, SC431A,
NCP431B, NCP432B Series
Programmable Precision
References
The NCP431/NCP432 integrated circuits are three−terminal
programmable shunt regulator diodes. These monolithic IC voltage
references operate as a low temperature coefficient zener which is
programmable from Vref to 36 V using two external resistors. These
devices exhibit a wide operating current range of 40 mA to 100 mA
with a typical dynamic impedance of 0.22 W. The characteristics of
these references make them excellent replacements for zener diodes in
many applications such as digital voltmeters, power supplies, and op
amp circuitry. The 2.5 V reference makes it convenient to obtain a
stable reference from 5.0 V logic supplies, and since the NCP431/
NCP432 operates as a shunt regulator, it can be used as either a
positive or negative voltage reference. Low minimum operating
current makes this device an ideal choice for secondary regulators in
SMPS adapters with extremely low no−load consumption.
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12
TO−92
LP SUFFIX
CASE 29−11
Pin 1. Reference
2. Anode
3. Cathode
3
1
Features
• Programmable Output Voltage to 36 V
• Low Minimum Operating Current: 40 mA, Typ @ 25°C
• Voltage Reference Tolerance: ±0.5%, Typ @ 25°C
•
•
•
•
•
•
SOIC−8 NB
D SUFFIX
CASE 751
8
1
Cathode
(NCP431B/NCP432B)
Low Dynamic Output Impedance, 0.22 W Typical
Sink Current Capability of 40 mA to 100 mA
Equivalent Full−Range Temperature Coefficient of 50 ppm/°C
Typical
Temperature Compensated for Operation over Full Rated Operating
Temperature Range
SC Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q100 Qualified and
PPAP Capable
These are Pb−Free Devices
Reference
Anode
Anode
Anode
Anode
NC
NC
(Top View)
3
1
SOT−23−3
SN SUFFIX
CASE 318
2
NCP431
Pin 1. Reference
2. Cathode
3. Anode
NCP432
Pin 1. Cathode
2. Reference
3. Anode
Typical Applications
•
•
•
•
•
Voltage Adapters
Switching Power Supply
Precision Voltage Reference
Charger
Instrumentation
© Semiconductor Components Industries, LLC, 2013
February, 2013 − Rev. 4
ORDERING AND MARKING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
1
Publication Order Number:
NCP431/D
NCP431A, SC431A, NCP431B, NCP432B Series
Reference
(R)
Cathode
(K)
Reference
(R)
Cathode
(K)
2.5 V ref
Anode
(A)
Anode
(A)
Figure 1. Symbol
Figure 2. Representative Block diagram
MAXIMUM RATINGS (Full operating ambient temperature range applies, unless otherwise noted)
Symbol
VKA
Rating
Value
37
V
IK
Cathode Current Range, Continuous
−100 to +150
mA
Iref
Reference Input Current Range, Continuous
−0.05 to +10
mA
TJ
Operating Junction Temperature
150
°C
TA
Operating Ambient Temperature Range
−40 to +125
°C
Tstg
Storage Temperature Range
−65 to +150
°C
PD
Total Power Dissipation @ TA = 25°C
Derate above 25°C Ambient Temperature
D, LP Suffix Plastic Package
SN1 Suffix Plastic Package
PD
HBM
MM
Cathode to Anode Voltage
Unit
W
0.70
0.52
Total Power Dissipation @ TC = 25°C
Derate above 25°C Case Temperature
D, LP Suffix Plastic Package
ESD Rating
1.5
W
>2000
>200
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
RECOMMENDED OPERATING CONDITIONS
Symbol
VKA
IK
Condition
Min
Max
Unit
Cathode to Anode Voltage
Vref
36
V
Cathode Current
0.04
100
mA
THERMAL CHARACTERISTICS
Symbol
Characteristic
LP Suffix Package
(50 mm2 x 35 mm Cu)
D Suffix Package
(50 mm2 x 35 mm Cu)
SN Suffix Package
(10 mm2 x 35 mm Cu)
Unit
RQJA
Thermal Resistance,
Junction−to−Ambient
176
210
255
°C/W
RQJL
Thermal Resistance,
Junction−to−Lead (Lead 3)
75
68
80
°C/W
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NCP431A, SC431A, NCP431B, NCP432B Series
ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise noted.)
NCP431AC
Symbol
Vref
Min
Characteristic
Reference Input Voltage
VKA = Vref, IK = 1 mA
TA = 25°C
TA = Tlow to Thigh (Note 1)
2.475 2.500 2.525
2.475 2.500 2.525
Reference Input Voltage Deviation Over Temperature Range (Figure 1, Notes 2, 3)
VKA= Vref, IK = 1 mA
DVref
DVAK
Ratio of Change in Reference Input Voltage to
Change in Cathode to Anode Voltage
IK = 1 mA (Figure 2),
DVKA = 10 V to Vref
DVKA = 36 V to 10 V
DIrefT
Max
Min
Typ
Max
Min
Typ
Max
Unit
V
DVrefT
Iref
Typ
NCP431AV/
SC431AV
NCP431AI
−
−
−
2.475 2.500 2.525 2.475 2.500 2.525
2.465 2.500 2.525 2.460 2.500 2.525
−
5.0
10
−
10
15
mV
mV/
V
−
−
−2.00
−1.28
−3.1
−1.9
−
−
−2.00
−1.28
−3.1
−1.9
−
−
−2.00
−1.28
−3.1
−1.9
Reference Input Current (Figure 2)
IK = 1 mA, R1 = 220 k, R2 = R
TA = −40°C to +125°C
−
81
190
−
81
190
−
81
190
Reference Input Current Deviation Over Temperature Range (Figure 2, Note 2, 3)
IK = 1 mA, R1 = 10 k, R2 = R
−
22
55
−
22
55
−
22
55
nA
nA
Imin
Minimum Cathode Current For Regulation
VKA = Vref (Figure 1)
−
40
80
−
40
80
−
40
80
mA
Ioff
Off−State Cathode Current (Figure 3)
VKA = 36 V, Vref = 0 V
−
180
1000
−
180
1000
−
180
1000
nA
Dynamic Impedance (Figure 1, Note 3)
VKA = Vref, DIK = 1.0 mA to 100 mA
f v 1.0 kHz
−
0.22
0.5
−
0.22
0.5
−
0.22
0.5
W
|ZKA|
1. Tlow
= −40°C for NCP431AI, NCP431AV, SC431AV
= 0°C for NCP431AC
Thigh = 70°C for NCP431AC
= 85°C for NCP431AI
= 125°C for NCP431AV, SC431AV
2. Guaranteed by design
3. The deviation parameter DVrefT is defined as the difference between the maximum and minimum values obtained over the full operating
ambient temperature range that applies.
ǒ
The average temperature coefficient of the reference input voltage, Vref is defined as:
V
ppm
ref ° C
+
DV
V
ref
@25° C
ref
DT
Ǔ
106
+
A
DV
DT
ref
10 6
ǒVref@25° CǓ
A
aVref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature.
Example: DVrefT = 17 mV and slope is positive
Vref = 2.5 V, DTA = 165°C (from −40°C to +125°C)
aV
ref
+
0.017 @ 10 6
165 @ 2.5
+ 41.2 ppmń° C
4. The dynamic impedance ZKA is defined as: (|ZKA| = (DVKA/DIK). When the device is programmed with two external resistors, R1 and R2,
the total dynamic impedance of the circuit is defined as: |ZKA’| [ |ZKA| (1 + (R1/R2)).
5. SC431AVSNT1G − Tlow = −40°C, Thigh = 125°C. Guaranteed by design. SC Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.
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NCP431A, SC431A, NCP431B, NCP432B Series
ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise noted.)
NCP431BC
NCP432BC
Symbol
Vref
Reference Input Voltage
VKA = Vref, IK = 1 mA
TA = 25°C
TA = Tlow to Thigh (Note 6)
DVrefT
Reference Input Voltage Deviation Over Temperature Range (Figure 1, Notes 7, 8)
VKA= Vref, IK = 1 mA
DVref
DVAK
Ratio of Change in Reference Input Voltage to
Change in Cathode to Anode Voltage
IK = 1 mA (Figure 2),
DVKA = 10 V to Vref
DVKA = 36 V to 10 V
Iref
DIrefT
Min
Characteristic
Typ
NCP431BI
NCP432BI
Max
Min
Typ
NCP431BV
NCP432BV
Max
Min
Typ
Max
Unit
V
2.4875 2.500 2.5125 2.4875 2.500 2.5125 2.4875 2.500 2.5125
2.4875 2.500 2.5125 2.4775 2.500 2.5125 2.4725 2.500 2.5125
−
−
−
−
−
−
−
5.0
10
1−
−
−
10
15
15
mV
mV/
V
−
−
−2.00
−1.28
−3.1
−1.9
−
−
−2.00
−1.28
−3.1
−1.9
−
−
−2.00
−1.28
−3.1
−1.9
Reference Input Current (Figure 2)
IK = 1 mA, R1 = 220 k, R2 = R
TA = −40°C to +125°C
−
81
190
−
81
190
−
81
190
Reference Input Current Deviation Over Temperature Range (Figure 2, Note 7, 8)
IK = 1 mA, R1 = 10 k, R2 = R
−
22
55
−
22
55
−
22
55
nA
nA
Imin
Minimum Cathode Current For Regulation
VKA = Vref (Figure 1)
−
40
80
−
40
80
−
40
80
mA
Ioff
Off−State Cathode Current (Figure 3)
VKA = 36 V, Vref = 0 V
−
180
1000
−
180
1000
−
180
1000
nA
Dynamic Impedance (Figure 1, Note 8)
VKA = Vref, DIK = 1.0 mA to 100 mA
f v 1.0 kHz
−
0.22
0.5
−
0.22
0.5
−
0.22
0.5
W
|ZKA|
6. Tlow
= −40°C for NCP431BI, NCP431BV, NCP432BI, NCP432BV
= 0°C for NCP431BC, NCP432BC
Thigh = 70°C for NCP431BC, NCP432BC
= 85°C for NCP431BI, NCP432BI
= 125°C for NCP431BV, NCP432BV
7. Guaranteed by design
8. The deviation parameter DVrefT is defined as the difference between the maximum and minimum values obtained over the full operating
ambient temperature range that applies.
ǒ
The average temperature coefficient of the reference input voltage, Vref is defined as:
V
ppm
ref ° C
+
DV
V
ref
@25° C
ref
DT
Ǔ
106
+
A
DV
DT
ref
10 6
ǒVref@25° CǓ
A
aVref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature.
Example: DVrefT = 17 mV and slope is positive
Vref = 2.5 V, DTA = 165°C (from −40°C to +125°C)
aV
ref
+
0.017 @ 10 6
165 @ 2.5
+ 41.2 ppmń° C
9. The dynamic impedance ZKA is defined as: (|ZKA| = (DVKA/DIK). When the device is programmed with two external resistors, R1 and R2,
the total dynamic impedance of the circuit is defined as: |ZKA’| [ |ZKA| (1 + (R1/R2))
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NCP431A, SC431A, NCP431B, NCP432B Series
Input
Input
VKA
V KA
Input
IK
V KA
Ioff
R1
Iref
IK
Vref
R2
Figure 3. Test Circuit for VKA = Vref
Vref
V
ǒ1 ) R1
Ǔ ) Iref @ R1
R2
ref
60.0
VKA = Vref
TA = 25°C
Input
IK, CATHODE CURRENT (mA)
IK, CATHODE CURRENT (mA)
+V
Figure 4. Test Circuit for VKA > Vref
150.0
100.0
KA
VKA
IK
50.0
0.0
−50.0
−100.0
−1.0
0.0
1.0
2.0
3.0
40.0
VKA = Vref
TA = 25°C
Input
0.0
−20.0
−40.0
−60.0
−1.0
0.0
IK
Vref
2500
2490
2480
2470
2460
−50
−25
0
25
50
75
3.0
120
Input
110
100
2520
2510
2.0
Figure 7. Cathode Current versus Cathode
Voltage
Iref, REFERENCE INPUT CURRENT
(nA)
Vref, REFERENCE INPUT VOLTAGE (mV)
2530
1.0
VKA, CATHODE VOLTAGE (V)
VKA = Vref
IK = 1 mA
VKA
IMin
20.0
Figure 6. Cathode Current versus Cathode
Voltage
Input
VKA
IK
VKA, CATHODE VOLTAGE (V)
2540
Figure 5. Test Circuit for Ioff
100
125
220k
IK = 1 mA
VKA
IK
Iref
90
80
70
60
50
40
−50
−25
0
25
50
75
100
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 8. Reference Input Voltage versus
Ambient temperature
Figure 9. Reference Input Current versus
Ambient temperature
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125
100
0
Input
VKA
Ioff, OFF−STATE CATHODE CURRENT (nA)
DVref, REFERENCE INPUT VOLTAGE (mV)
NCP431A, SC431A, NCP431B, NCP432B Series
IK
R1
−10
R2
Vref
−20
−30
VKA = Vref
IK = 1 mA
0
10
20
30
−25
0
25
50
75
100
125
VAK, CATHODE VOLTAGE (V)
TA, AMBIENT TEMPERATURE (°C)
Figure 10. Change in Reference Input Voltage
versus Cathode Voltage
Figure 11. Off−State Cathode Current versus
Ambient Temperature
0.320
1.0k
Output
|ZKA|, DYNAMIC IMPEDANCE (W)
|ZKA|, DYNAMIC IMPEDANCE (W)
10
−50
40
10
IK
50
GND
1
DIK = 1 mA to 100 mA
TA = 25°C
0.1
0.001
0.01
0.1
1
f, FREQUENCY (MHz)
10
0.300
0.280
0.260
VAK = V ref
DI K = 1.0 mA to 100mA
f<1.0 kHz
0.240
Output
50
GND
0.200
−50
100
IK
1.0k
0.220
Figure 12. Dynamic Impedance versus
Frequency
−25
0
25
50
75
100
TA, AMBIENT TEMPERATURE (°C)
125
Figure 13. Dynamic Impedance versus Ambient
Temperature
60
800
Output
9.0mF
40
15k
IK
230
NOISE VOLTAGE (nV/√HZ)
AVOL, OPEN LOOP VOLTAGE GAIN (dB)
VKA
Ioff
1
−40
50
VKA = 36V
V ref = 0V
Input
8.25k
GND
30
20
10
0 IK = 100 mA to 10 mA
TA = 25°C
−10
1000
10k
100k
f, FREQUENCY (Hz)
700
600
500
400
300
VKA = V ref
IK = 1 mA
Input TA = 25°C
VKA
IK
200
100
1M
10M
0
10
100
1000
10k
f, FREQUENCY (Hz)
Figure 14. Open−Loop Voltage Gain versus
Frequency
Figure 15. Spectral Noise Density
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100k
NCP431A, SC431A, NCP431B, NCP432B Series
VOLTAGE SWING (V)
3.0
2.0
220
Pulse
Generator
f = 100kHz
Output
Output
50
1.0
GND
10
5.0
Input
0
0
4.0
8.0
12
16 20 24
t, TIME (ms)
28
32
36
IK, CATHODE CURRENT (mA)
Input
Monitor
4.0
40
CL, LOAD CAPACITANCE (nF)
Figure 16. Pulse Response
Figure 17. Stability Boundary Conditions
Figure 18. Stability Boundary Conditions for
Small Cathode Current
150
150
VOUT
VOUT
IK
V+
IK
V+
CL
Figure 19. Test Circuit For Curve A of Stability
Boundary Conditions
10k
CL
Figure 20. Test Circuit For Curve B And C of
Stability Boundary Conditions
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NCP431A, SC431A, NCP431B, NCP432B Series
TYPICAL APPLICATIONS
V+
V+
VOUT
VOUT
IK
R1
R1
CL
R2
R2
V
OUT
ǒ
+ 1)
R1
R2
Ǔ Vref
V
Figure 21. Shunt Regulator
OUT
ǒ
+ 1)
R1
R2
Ǔ Vref
Figure 22. High Current Shunt
Regulator
V+
VOUT
MC7805
V+
In
Out
Common
VOUT
R1
R1
R2
R2
ǒ
V
OUT
+ 1)
V
OUT(min)
R1
R2
+V
Ǔ Vref
ref
) 5.0 V
V
OUT
V
IN(min)
V
Figure 23. Output Control for a
Tree−Terminal Fixed Regulator
ǒ
+ 1)
+V
OUT(min)
R1
R2
Ǔ Vref
OUT
+V
)V
be
ref
Figure 24. Series Pass
Regulator
V+
RCL
ISink
IOUT
V+
V
I
I
OUT
+
V
ref
R
CL
Sink
+
ref
Rs
RS
Figure 25. Constant Current Source
Figure 26. Constant Current
Sink
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NCP431A, SC431A, NCP431B, NCP432B Series
VOUT
V+
V
ǒ
(trip) + 1 )
OUT
R1
R2
VOUT
V+
R1
R1
R2
R2
Ǔ Vref
V
Figure 27. Triac Crowbar
R1
R3
VIN
R2
R4
V
L.E.D. indicator is ‘on’ when V+ is between the uppper
and lower limits.
ǒ
Upper Limit + 1 )
R1
R2
R3
R4
Ǔ Vref
R1
VOUT
ǒ
R2
V+
VOUT
Lower Limit + 1 )
R1
Figure 28. SRC Crowbar
V+
I
ǒ
(trip) + 1 )
OUT
th
+V
VIN
VOUT
< Vref
V+
> Vref
[2.0 V
ref
Figure 30. Single−Supply Comparator with
Temperature−Compensated Threshold
ǓVref
ǓVref
Figure 29. Voltage Monitoring
150 mH @ 2.0 A
Vin = 10 to 20 V
TIP115
VOUT = 5.0 V
IOUT = 1.0 A
1.0k
1N5823
4.7 k
4.7k
100k
MPSA20
2200 mF
0.1 mF
470 mF
0.01 mF
4.7k
2.2k
51k
10
Figure 31. Step−Down Switching Converter
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NCP431A, SC431A, NCP431B, NCP432B Series
APPLICATIONS INFORMATION
The NCP431/NCP432 is a programmable precision
reference which is used in a variety of ways. It serves as a
reference voltage in circuits where a non−standard reference
voltage is needed. Other uses include feedback control for
driving an optocoupler in power supplies, voltage monitor,
constant current source, constant current sink and series pass
regulator. In each of these applications, it is critical to
maintain stability of the device at various operating currents
and load capacitances. In some cases the circuit designer can
estimate the stabilization capacitance from the stability
boundary conditions curve provided in Figure 17. However,
these typical curves only provide stability information at
specific cathode voltages and at a specific load condition.
Additional information is needed to determine the
capacitance needed to optimize phase margin or allow for
process variation.
A simplified model of the NCP431/NCP432 is shown in
Figure 32. When tested for stability boundaries, the load
resistance is 150 W. The model reference input consists of an
input transistor and a dc emitter resistance connected to the
device anode. A dependent current source, Gm, develops a
current whose amplitude is determined by the difference
between the 1.78 V internal reference voltage source and the
input transistor emitter voltage. A portion of Gm flows
through compensation capacitance, CP2. The voltage across
CP2 drives the output dependent current source, Go, which
is connected across the device cathode and anode.
Model component values are:
Vref = 1.78 V
Gm = 0.3 + 2.7 exp (−IC/26 mA)
where IC is the device cathode current and Gm is in mhos
Go = 1.25 (Vcp2) mmhos.
Resistor and capacitor typical values are shown on the
model. Process tolerances are ±20% for resistors, ±10% for
capacitors, and ±40% for transconductances.
An examination of the device model reveals the location
of circuit poles and zeroes:
P1 +
P2 +
Z1 +
1
2pR GMC P1
1
2pR P2C P2
+
+
1
+ 7.96 kHz
2p @ 1.0M @ 20 pF
1
2p @ 10M @ 0.265 pF
+ 60 kHz
1
1
+
+ 500 kHz
2pR Z1C P1
2p @ 15.9k @ 20 pF
In addition, there is an external circuit pole defined by the
load:
PL +
1
2pR LC L
Also, the transfer dc voltage gain of the NCP431 is:
G + G MR GMGoR L
Example 1:
IC=10 mA, RL= 230 W,CL= 0. Define the transfer gain.
The DC gain is:
G + G MR GMGoR L + (2.138)(1.0M)(1.25m)(230)
+ 615 + 56 dB
Loop gain + G
8.25k
8.25k ) 15k
+ 218 + 47 dB
The resulting transfer function Bode plot is shown in
Figure 33. The asymptotic plot may be expressed as the
following equation:
Av + 615
ǒ1 )
ǒ1 )
jf
8.0 kHz
jf
500 kHz
Ǔ
Ǔǒ1 )
jf
60 kHz
Ǔ
The Bode plot shows a unity gain crossover frequency of
approximately 600 kHz. The phase margin, calculated from
the equation, would be 55.9°. This model matches the
Open−Loop Bode Plot of Figure 14. The total loop would
have a unity gain frequency of about 300 kHz with a phase
margin of about 44°.
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NCP431A, SC431A, NCP431B, NCP432B Series
Figure 32. Simplified NCP431/NCP432 Device Model
NCP431/NCP432 OPEN−LOOP VOLTAGE GAIN
VERSUS FREQUENCY
Note that the crossover frequency in this case is about
250 kHz, having a phase margin of about −46°. Therefore,
instability of this circuit is likely.
NCP431/NCP432 OPEN−LOOP BODE PLOT WITH
LOAD CAP
Figure 33. Example 1 Circuit Open Loop Gain Plot
Example 2.
IC = 7.5 mA, RL = 2.2 kW, CL = 0.01 mF. Cathode tied to
reference input pin. An examination of the data sheet
stability boundary curve (Figure 17) shows that this value of
load capacitance and cathode current is on the boundary.
Define the transfer gain.
The DC gain is:
Figure 34. Example 2 Circuit Open Loop Gain Plot
With three poles, this system is unstable. The only hope
for stabilizing this circuit is to add a zero. However, that can
only be done by adding a series resistance to the output
capacitance, which will reduce its effectiveness as a noise
filter. Therefore, practically, in reference voltage
applications, the best solution appears to be to use a smaller
value of capacitance in low noise applications or a very large
value to provide noise filtering and a dominant pole rolloff
of the system.
G + G MR GMGoR L + (2.138)(1.0M)(1.25m)(230)
+ 6389 + 76 dB
The resulting open loop Bode plot is shown in Figure 34.
The asymptotic plot may be expressed as the following
equation:
Av + 615
ǒ1 )
jf
8.0 kHz
ǒ1 )
500 kHz
Ǔǒ1 )
60 kHz
jf
jf
Ǔ
Ǔǒ1 )
jf
7.2 kHz
The NCP431/NCP432 is often used as a regulator in
secondary side of a switch mode power supply (SMPS).
The benefit of this reference is high and stable gain under
low bias currents. Figure 35 shows dependence of the gain
(dynamic impedance) on the bias current. Value of
Ǔ
Note that the transfer function now has an extra pole
formed by the load capacitance and load resistance.
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NCP431A, SC431A, NCP431B, NCP432B Series
minimum cathode current that is needed to assure stable gain
is 80 mA maximum.
Figure 36. SMPS Secondary Side and Feedback
Connection on Primary Side
The NCP431/NCP432 operates with very low leakage
and reference input current. Sum of these currents is lower
than 100 nA. Regulator with the NCP431/NCP432
minimizes parasitic power consumption.
The best way to achieve extremely low no−load
consumption in SMPS applications is to use
NCP431/NCP432 as regulator on the secondary side. The
consumption is reduced by minimum parasitic consumption
and very low bias current of NCP431/NCP432.
Figure 35. Knee of Reference
Regulator with TL431 or other references in secondary
side of a SMPS needs bias resistor to increase cathode
current to reach high and stable gain (refer to Figure 36).
This bias resistor does not have to be used in regulator with
NCP431/NCP432 thanks to its low minimum cathode
current.
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12
NCP431A, SC431A, NCP431B, NCP432B Series
MARKING DIAGRAMS
NCP43
1xxxx
YWW G
G
8
1
N431xx
ALYW
G
xxx MG
G
1
xx, xxx, xxx = Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
M
= Date Code
W, WW
= Work Week
G
= Pb−Free Package
(*Note: Microdot may be in either location)
ORDERING INFORMATION
Operating
Temperature Range
Package
Shipping†
1%
SOIC−8
(Pb−Free)
2500 / Tape & Reel
VRF
1%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
NCP431BCSNT1G
VRJ
0.5%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
NCP432BCSNT1G
VRM
0.5%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
ACLP
1%
TO−92 (TO−226)
(Pb−Free)
2000 / Tape & Reel
NCP431AIDR2G
AI
1%
SOIC−8
(Pb−Free)
2500 / Tape & Reel
NCP431AISNT1G
VRG
1%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
NCP431BISNT1G
VRK
0.5%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
NCP432BISNT1G
VRN
0.5%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
NCP431AILPRAG
AILP
1%
TO−92 (TO−226)
(Pb−Free)
2000 / Tape & Reel
NCP431AVDR2G
AV
1%
SOIC−8
(Pb−Free)
2500 / Tape & Reel
NCP431AVSNT1G /
SC431AVSNT1G*
VRH
1%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
NCP431AVLPRAG
AVLP
1%
TO−92 (TO−226)
(Pb−Free)
2000 / Tape & Reel
NCP431AVLPG
AVLP
1%
TO−92 (TO−226)
(Pb−Free)
2000 Units / Bag
NCP431BVSNT1G
VRL
0.5%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
NCP432BVSNT1G
VRP
0.5%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
Device
Marking
Tolerance
NCP431ACDR2G
AC
NCP431ACSNT1G
NCP431ACLPRAG
0°C to 70°C
−40°C to 85°C
−40°C to 125°C
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*SC Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
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13
NCP431A, SC431A, NCP431B, NCP432B Series
PACKAGE DIMENSIONS
TO−92 (TO−226)
CASE 29−11
ISSUE AN
A
B
STRAIGHT LEAD
R
P
L
SEATING
PLANE
K
D
X X
G
J
H
V
C
SECTION X−X
N
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R
IS UNCONTROLLED.
4. LEAD DIMENSION IS UNCONTROLLED IN P AND
BEYOND DIMENSION K MINIMUM.
DIM
A
B
C
D
G
H
J
K
L
N
P
R
V
INCHES
MIN
MAX
0.175
0.205
0.170
0.210
0.125
0.165
0.016
0.021
0.045
0.055
0.095
0.105
0.015
0.020
0.500
--0.250
--0.080
0.105
--0.100
0.115
--0.135
---
MILLIMETERS
MIN
MAX
4.45
5.20
4.32
5.33
3.18
4.19
0.407
0.533
1.15
1.39
2.42
2.66
0.39
0.50
12.70
--6.35
--2.04
2.66
--2.54
2.93
--3.43
---
N
A
R
BENT LEAD
B
P
T
SEATING
PLANE
G
K
D
X X
J
V
1
C
N
SECTION X−X
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14
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. CONTOUR OF PACKAGE BEYOND
DIMENSION R IS UNCONTROLLED.
4. LEAD DIMENSION IS UNCONTROLLED IN P
AND BEYOND DIMENSION K MINIMUM.
DIM
A
B
C
D
G
J
K
N
P
R
V
MILLIMETERS
MIN
MAX
4.45
5.20
4.32
5.33
3.18
4.19
0.40
0.54
2.40
2.80
0.39
0.50
12.70
--2.04
2.66
1.50
4.00
2.93
--3.43
---
NCP431A, SC431A, NCP431B, NCP432B Series
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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15
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
NCP431A, SC431A, NCP431B, NCP432B Series
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AP
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
D
SEE VIEW C
3
HE
E
DIM
A
A1
b
c
D
E
e
L
L1
HE
q
c
1
2
e
b
0.25
q
A
L
A1
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
0°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.13
0.18
2.90
3.04
1.30
1.40
1.90
2.04
0.20
0.30
0.54
0.69
2.40
2.64
−−−
10 °
MIN
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
0°
INCHES
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
10°
L1
VIEW C
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
SCALE 10:1
0.8
0.031
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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For additional information, please contact your local
Sales Representative
NCP431/D
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
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NCP431AISNT1G NCP431AVSNT1G NCP431ACSNT1G NCP431AIDR2G NCP431AVDR2G NCP431ACDR2G
NCP431ACLPRAG NCP431AVLPG NCP431AVLPRAG NCP431AILPRAG