Anaren MSK4300 10 amp, 75v, 3 phase mosfet bridge with intelligent integrated gate drive Datasheet

MIL-PRF-38534 CERTIFIED FACILITY
M.S.KENNEDY CORP.
10 AMP, 75V, 3 PHASE MOSFET
BRIDGE WITH INTELLIGENT
INTEGRATED GATE DRIVE
4707 Dey Road Liverpool, N.Y. 13088
4300
(315) 701-6751
FEATURES:
75 Volt Motor Supply Voltage
10 Amp Output Switch Capability, All N-Channel MOSFET Output Bridge
100% Duty Cycle High Side Conduction Capable
Suitable for PWM Applications from DC to 100KHz
Shoot-Through/Cross Conduction Protection
Undervoltage Lockout Protection
Programmable Dead-Time Control
Low Active Enable for Bridge Shutdown Control
Isolated Package Design for High Voltage Isolation Plus Good Thermal Transfer
Available with Three Lead Bend Options
Contact MSK for MIL-PRF-38534 Qualification Status
DESCRIPTION:
The MSK 4300 is a 3 phase MOSFET bridge plus drivers in a convenient isolated hermetic package. The hybrid
is capable of 10 amps of output current and 75 volts of DC bus voltage. It has a full line of protection features,
including undervoltage lockout protection of the bias voltage, cross conduction control and a user programmable
dead-time control for shoot-through elimination. In addition, the bridge may be shut down by using the EN (enable)
control. The MSK 4300 provides good thermal conductivity for the MOSFETs due to the electrically isolated package
design that allows direct heat sinking of the device without insulators.
EQUIVALENT SCHEMATIC
TYPICAL APPLICATIONS
3 Phase Brushless DC
Servo Control
Fin Actuator Control
Gimbal Control
3 Phase AC
Induction Motor Control
HVAC Blower Control
1
Rev. J 8/11
ABSOLUTE MAXIMUM RATINGS
V+ High Voltage Supply 7
VBIAS Bias Supply
VIND Logic Input Voltages
IOUT Continuous Output Current
Peak Output Current
IPK
AØ, BØ, CØ
RSENSE
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θJC Thermal Resistance
TST Storage Temperature Range
TLD Lead Temperature Range
(10 Seconds)
TC Case Operating Temperature
MSK4300
MSK4300H
TJ Junction Temperature
-3V transient to +75V
-0.3V to +16V
-0.3V to VBIAS +0.3V
10A
25A
-3V transient to +75V
-3V transient to +3V
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6
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ELECTRICAL SPECIFICATIONS
Test Conditions
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Parameter
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4.3°C/W
-65°C to +150°C
+300°C
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-40°C to +85°C
-55°C to +125°C
+150°C
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MM
GroupA 4
MSK 4300H
Subgroup
Min.
Typ.
1,2,3
-
2.5
-
3
Max.
MSK 4300 2
Units
Typ.
Max.
8
2.5
8
mAmp
12.5
25
12.5
25
mAmp
7.6
5.6
6.6
7.6
Volts
Min.
CONTROL SECTION
All Inputs Off
VBIAS Quiescent Current
f=20KHz, 50% Duty Cycle
VBIAS Operating Current
1,2,3
Undervoltage Threshold (Falling)
1
5.75
6.6
Undervoltage Threshold (Rising)
1
6.2
7.1
8.1
6.1
7.1
8.1
Volts
-
-
-
0.8
-
-
0.8
Volts
2.7
-
-
2.7
-
-
Volts
135
Low Level Input Voltage
High Level Input Voltage
1
1
-
Low Level Input Current
1
VIN=0V
-
60
100
60
100
135
μAmp
High Level Input Current
1
VIN=5V
-
-1
-
+1
-1
-
+1
μAmp
ID=50μA, All Inputs Off
-
70
-
-
70
-
-
V
-
-
-
250
-
-
250
μAmp
1
-
-
0.300
-
-
0.300
Ω
-
-
-
0.16
-
-
0.16
Ω
-
-
5
-
nSec
OUTPUT BRIDGE
Drain-Source Breakdown Voltage
1
1
Drain-Source Leakage Current
VDS=70V
ID=10A
Drain-Source On Resistance (Each FET)
Drain-Source On Resistance
1
(Each FET, For Thermal Calculations Only)
SWITCHING CHARACTERISTICS
Rise Time
1
V+=30V, RL=3Ω
-
-
5
Fall Time
1
ID=10A
-
-
6
-
-
6
-
nSec
-
0.5
2
-
0.5
3
μSec
-
-
5
8
-
5
10
μSec
8
-
5
10
μSec
Turn-On Prop Delay (Lower) 1
-
SWR Resistor=∞
Turn-Off Prop Delay (Lower) 1
SWR Resistor=∞
Turn-On Prop Delay (Upper) 1
SWR Resistor=∞
-
-
5
Turn-Off Prop Delay (Upper) 1
SWR Resistor=∞
-
-
0.5
2
-
0.5
3
μSec
3.0
5.0
7.0
3.0
5.0
7.0
μSec
1.20
0.3
0.6
1.20
μSec
SWR =∞
Dead Time
Dead Time
SOURCE-DRAIN DIODE CHARACTERISTICS
1
Forward Voltage
Reverse Recovery Time 1
4
SWR=12K
4
0.3
0.6
ISD=10A
-
-
1.05
1.25
-
1.05
1.25
Volts
75
-
-
75
-
nSec
ISD=10A, di/dt=100A/μS
-
-
NOTES:
1
2
3
4
5
Guaranteed by design but not tested. Typical parameters are representative of actual device performance but are for reference only.
Industrial grade devices shall be tested to subgroups 1 and 4 unless otherwise specified.
Military grade devices ("H" suffix) shall be 100% tested to Subgroups 1, 2, 3 and 4.
Subgroups 5 and 6 testing available upon request.
Subgroup 1, 4 TA = TC = +25°C
2, 5 TA = TC = +125°C
3, 6 TA = TC = -55°C
6 Continuous operation at or above absolute maximum ratings may adversely effect the device performance and/or life cycle.
7 When applying power to the device, apply the low voltage followed by the high voltage or alternatively, apply both at the
same time. Do not apply high voltage without low voltage present.
2
Rev. J 8/11
BUS VOLTAGE FILTER CAPACITORS
APPLICATION NOTES
The size and placement of the capacitors for the main voltage
bus for the motor will have an effect on the noise filtered throughout the rest of the system. Series RLC tuned circuit is being
created by the inductance of the wire (about 30nH per inch),
the filter capacitance, and all of the resistances (wire resistance
and the capacitor ESR) of the overall power circuit. Voltage
spikes from the back EMF if the motor ride on top of the bus
voltage. All of this must be taken into account when laying out
the system. A first capacitor of high quality and low ESR should
be placed as close to the hybrid circuit as possible. Along with
that, a capacitor of 5x to 10x the first value should be added
(and that second capacitor should have some ESR) and/or a
resistor should be added to help with the damping of the voltage spikes. Be careful of the ripple current in all the capacitors.
Excessive ripple current, beyond what the capacitor is rated
for, will destroy the capacitor.
MSK 4300 PIN DESCRIPTIONS
AL,BL,CL - Are the lowside logic level digital inputs. These
three inputs control the three lowside bridge transistors. If the
highside inputs are low, then the lowside inputs will control
both the lowside and the highside of the bridge, with deadtime
set by the SWR resistor. EN will override these inputs, forcing
all outputs low. These inputs can be driven by logic up to 15V
(less than VBIAS). An internal pullup to VBIAS will hold each
input high if the pins are not driven.
AH,BH,CH - Are the highside logic level digital inputs. These
three inputs control the three highside bridge transistors. Unless the deadtime is disabled by connecting SWR to ground,
the lowside input of each phase will override the corresponding
highside input. If SWR is the lowside input of each phase will
override the corresponding highside input. In this condition,
tied to ground, deadtime is disabled and the outputs follow the
inputs. In this condition, shoot-through must be avoided externally. EN will override all inputs, forcing outputs low.
VBIAS - Is the positive supply for the gate drive. This pin should
be decoupled to ground with at least a 10μF capacitor.
BIAS SUPPLY BYPASS CAPACITORS
GROUND - Is the return for the VBIAS supply. This pin should
be connected to the return of the lowside MOSFETs or the
bottom of the sense resistor at the bottom of the bridge. The
gate drive current must return through this pin, so trace lengths
should be kept to a minimum. All grounds should be returned
to the bottom of the bridge or sense resistor in a star fashion.
This will eliminate ground loops.
It is recommended that at least 10μF of capacitance for bypassing the VBIAS voltage that supplies the drive circuitry for
the MSK 4300, along with 0.1μF for helping the high frequency
current pulses needed by the gate driver. If an extremely long
risetime is exhibited by the turn on of the FETs, the extra high
frequency capacitance will help.
SWR - Is the pin for controlling the deadtime between the top
and bottom transistors of the bridge. By connecting a pullup
resistor between this pin and VBIAS, various deadtimes can be
obtained. There is and internal 100KΩ pullup resistor connected
internally. By adding additional resistors in parallel externally,
reduced deadtimes can be achieved. By connecting this pin to
ground, all deadtime is eliminated. However, care must be taken
to assure that deadtime is being generated by the logic circuitry
driving the inputs. Shoot-through can occur (both the top and
bottom transistors on at the same time for a given phase, causing a short on the V+ supply to ground) destroying the bridge.
V+ - Is the power connection for the top of the output bridge.
This pin must be bypassed by a capacitor to ground of a least
10μF per amp of output current minimum, and high quality high
frequency bypass capacitance to help suppress switching noise.
Good high frequency PC layout techniques are a must. Traces
wide enough for the current delivered, and placement of the big
capacitors close to the MSK 4300 are very important. The
path for the RSENSE connection through any sense resistor
back to the GND pins must be as short as possible. This path is
the gate drive current path for all the FETs on the lower half of
each phase. A short, low inductance path will aid in the switching time of those FETs.
GENERAL LAYOUT
IN
AØ, BØ, CØ - Are the output pins for the three phases of the
power bridge.
EN - Is the enabling input for the bridge. This digital input,
when pulled low, will enable the bridge, following the inputs
from AL, BL, CL and AH, BH, CH inputs. When pulled high, it
will override all other inputs and disable the bridge. It is internally pulled high to VBIAS, and can be driven by logic levels up
to VBIAS.
LOW POWER STARTUP
When starting up the circuit utilizing the MSK 4300 for the first
time, it is very important to keep certain things in mind. Because of the small size of the bridge, there is no internal short
circuit protection and a short circuit will destroy the bridge.
Any required short circuit protection must be built outside the
bridge. Current and voltage limit the power supply feeding the
V+ pins to the bridge, and monitor the current for any signs of
short circuiting, or shoot-through currents. If there are large
current spikes at the beginning of each switching cycle, there
may be shoot through. Try raising the resistor value of the
SWR. This will lengthen the deadtime and stop shoot-through.
RSENSE - Are the connections to the bottom of the bridge. All
power flowing through the bridge will flow through this point,
and can be sensed by connecting a sense resistor from here to
ground. The sense resistor will develop a voltage proportional
to the current flowing. Size the value and power rating of the
sense resistor according to the voltage necessary. 3 volts is
the maximum voltage between this point and ground, or damage to the hybrid will result.
3
Rev. J 8/11
TYPICAL APPLICATION SCHEMATIC
TYPICAL PERFORMANCE CURVES
4
Rev. J 8/11
MECHANICAL SPECIFICATIONS
ESD TRIANGLE INDICATES PIN 1
WEIGHT=24.6 GRAMS TYPICAL
NOTE: ALL DIMENSIONS ARE ±.010 INCHES UNLESS OTHERWISE LABELED.
ORDERING INFORMATION
MSK4300 H U
LEAD CONFIGURATIONS
S= STRAIGHT; U= BENT UP; D= BENT DOWN
SCREENING
BLANK= INDUSTRIAL; H= MIL-PRF-38534
GENERAL PART NUMBER
The above example is a Military grade hybrid with leads bent up.
M.S. Kennedy Corp.
4707 Dey Road, Liverpool, New York 13088
Phone (315) 701-6751
FAX (315) 701-6752
www.mskennedy.com
The information contained herein is believed to be accurate at the time of printing. MSK reserves the right to make
changes to its products or specifications without notice, however, and assumes no liability for the use of its products.
Please visit our website for the most recent revision of this datasheet.
Contact MSK for MIL-PRF-38534 qualification status.
5
Rev. J 8/11
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