LP3000SOT89 LOW NOISE, HIGH LINEARITY PACKAGED PHEMT • FEATURES ♦ 29 dBm Output Power at 1-dB Compression at 1.8 GHz ♦ 15 dB Power Gain at 1.8 GHz ♦ 1.3 dB Noise Figure ♦ 46 dBm Output IP3 at 1.8 GHz ♦ 55% Power-Added Efficiency • DESCRIPTION AND APPLICATIONS The LP3000SOT89 is a packaged Aluminum Gallium Arsenide / Indium Gallium Arsenide (AlGaAs/InGaAs) pseudomorphic High Electron Mobility Transistor (pHEMT). It utilizes a 0.25 µm x 3000 µm Schottky barrier gate, defined by electron-beam photolithography. The recessed “mushroom” gate structure minimizes parasitic gate-source and gate resistance. The epitaxial structure and processing have been optimized for reliable high-power applications. The LP3000 also features Si3N4 passivation and is available in die form or in other packages. Typical applications include PCS/Cellular low-voltage, high-efficiency amplifiers. • ELECTRICAL SPECIFICATIONS @ TAmbient = 25°C Parameter Symbol Test Conditions Min Typ Max Units Saturated Drain-Source Current LP3000SOT89-1 IDSS VDS = 2 V; VGS = 0 V 800 860 924 mA LP3000SOT89-2 925 975 1024 mA LP3000SOT89-3 1025 1060 1100 mA Power at 1-dB Compression P-1dB VDS = 5 V; IDS = 50% IDSS 28 29 dBm Power Gain at 1-dB Compression G-1dB VDS = 5 V; IDS = 50% IDSS 14 15 dB Power-Added Efficiency PAE VDS = 5 V; IDS = 50% IDSS; PIN = 15 dBm 55 % Noise Figure NF VDS = 5 V; IDS = 50% IDSS 1.3 dB Output Third-Order Intercept Point IP3 VDS = 5V; IDS = 50% IDSS; PIN = 3 dBm 46 dBm Maximum Drain-Source Current IMAX VDS = 2 V; VGS = 1 V 1700 mA Transconductance GM VDS = 2 V; VGS = 0 V 900 mS Gate-Source Leakage Current IGSO VGS = -5 V Pinch-Off Voltage VP VDS = 2 V; IDS = 15 mA Gate-Source Breakdown Voltage Magnitude |VBDGS| Gate-Drain Breakdown Voltage Magnitude frequency=1.8 GHz |VBDGD| Phone: (408) 988-1845 Fax: (408) 970-9950 700 15 200 µA -0.25 -1.2 -2.0 V IGS = 15 mA -10 -12 V IGD = 15 mA -10 -13 V http:// www.filss.com Revised: 1/16/02 Email: [email protected] LP3000SOT89 LOW NOISE, HIGH LINEARITY PACKAGED PHEMT • ABSOLUTE MAXIMUM RATINGS Notes: • • • • • Parameter Symbol Test Conditions Drain-Source Voltage VDS Gate-Source Voltage Min Max Units TAmbient = 22 ± 3 °C 7 V VGS TAmbient = 22 ± 3 °C -4 V Drain-Source Current IDS TAmbient = 22 ± 3 °C IDSS mA Gate Current IG TAmbient = 22 ± 3 °C 30 mA RF Input Power PIN TAmbient = 22 ± 3 °C 1 W Channel Operating Temperature TCH TAmbient = 22 ± 3 °C 175 ºC Storage Temperature TSTG — 175 ºC Total Power Dissipation PTOT TAmbient = 22 ± 3 °C 3.75 W -65 Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device. Power Dissipation defined as: PTOT ≡ (PDC + PIN) – POUT, where PDC: DC Bias Power PIN: RF Input Power POUT: RF Output Power Absolute Maximum Power Dissipation to be de-rated as follows above 25°C: PTOT= 3.75W – (0.025W/°C) x THS where TPACK = source tab lead temperature.. This PHEMT is susceptible to damage from Electrostatic Discharge. Proper precautions should be used when handling these devices. OPTIMUM POWER OUTPUT MATCHING Frequency (GHz) Load State Magnitude Phase 1.8 0.77 -154° 2.2 0.68 -150° 2.5 0.59 -143° • HANDLING PRECAUTIONS To avoid damage to the devices care should be exercised during handling. Proper Electrostatic Discharge (ESD) precautions should be observed at all stages of storage, handling, assembly, and testing. These devices should be treated as Class 1A (0-500 V). Further information on ESD control measures can be found in MIL-STD-1686 and MIL-HDBK-263. • APPLICATIONS NOTES & DESIGN DATA Applications Notes are available from your local Filtronic Sales Representative or directly from the factory. Complete design data, including S-parameters, noise data, and large-signal models are available on the Filtronic web site. Phone: (408) 988-1845 Fax: (408) 970-9950 http:// www.filss.com Revised: 1/16/02 Email: [email protected] LP3000SOT89 LOW NOISE, HIGH LINEARITY PACKAGED PHEMT • PACKAGE OUTLINE (dimensions in inches) All information and specifications are subject to change without notice. Phone: (408) 988-1845 Fax: (408) 970-9950 http:// www.filss.com Revised: 1/16/02 Email: [email protected]