Intersil EL5260IY 200mhz low-power current feedback amplifier Datasheet

EL5160, EL5161, EL5260, EL5261, EL5360
®
Data Sheet
May 7, 2007
200MHz Low-Power Current Feedback
Amplifiers
FN7387.9
Features
• 200MHz -3dB bandwidth
The EL5160, EL5161, EL5260, EL5261, and EL5360 are
current feedback amplifiers with a bandwidth of 200MHz and
operate from just 0.75mA supply current. This makes these
amplifiers ideal for today’s high speed video and monitor
applications.
• 0.75mA supply current
• 1700V/µs slew rate
• Single and dual supply operation, from 5V to 10V supply
span
With the ability to run from a single supply voltage from
5V to 10V, these amplifiers are ideal for handheld, portable,
or battery-powered equipment.
• Fast enable/disable (EL5160, EL5260 and EL5360 only)
• Available in SOT-23 packages
• Pb-Free plus anneal available (RoHS compliant)
The EL5160 also incorporates an enable and disable
function to reduce the supply current to 14µA typical per
amplifier. Allowing the CE pin to float or applying a low logic
level will enable the amplifier.
Applications
• Battery-powered equipment
• Handheld, portable devices
The EL5160 is available in the 6 Ld SOT-23 and 8 Ld SOIC
packages, the EL5161 in 5 Ld SOT-23 and SC-70 packages,
the EL5260 in the 10 Ld MSOP package, the EL5261 in
8 Ld SOIC and MSOP packages, the EL5360 in 16 Ld SOIC
and QSOP packages. All operate over the industrial
temperature range of -40°C to +85°C.
• Video amplifiers
• Cable drivers
• RGB amplifiers
• Test equipment
• Instrumentation
• Current-to-voltage converters
Pinouts
NC 1
IN- 2
+
IN+ 3
8 CE
OUT 1
7 VS+
VS- 2
6 OUT
IN+ 3
OUT 1
VS- 4
CE 5
OUT 1
5 CE
VS- 2
4 IN-
IN+ 3
EL5261
(8 LD SOIC, MSOP)
TOP VIEW
EL5260
(10 LD MSOP)
TOP VIEW
IN+ 3
+ -
6 VS+
5 VS+
+ 4 IN-
5 NC
VS- 4
IN- 2
EL5161
(5 LD SOT-23, SC-70)
TOP VIEW
EL5160
(6 LD SOT-23)
TOP VIEW
EL5160
(8 LD SOIC)
TOP VIEW
10 VS+
+
+
OUTA 1
9 OUT
INA- 2
8 IN-
INA+ 3
7 IN+
6 CE
VS- 4
8 VS+
7 OUTB
+
+
6 INB5 INB+
EL5360
(16 LD SOIC, QSOP)
TOP VIEW
INA+ 1
CEA 2
16 INA+
VS- 3
CEB 4
14 VS+
+
-
INB+ 5
INC+ 8
1
13 OUTB
12 INB-
NC 6
CEC 7
15 OUTA
11 NC
+
-
10 OUTC
9 INC-
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004, 2005, 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
EL5160, EL5161, EL5260, EL5261, EL5360
Ordering Information
PART NUMBER
PART MARKING
TAPE & REEL
PACKAGE
PKG.
DWG. #
EL5160IS
5160IS
-
8 Ld SOIC (150 mil)
MDP0027
EL5160IS-T7
5160IS
7”
8 Ld SOIC (150 mil)
MDP0027
EL5160IS-T13
5160IS
13”
8 Ld SOIC (150 mil)
MDP0027
EL5160ISZ (Note)
5160ISZ
-
8 Ld SOIC (150 mil) (Pb-Free)
MDP0027
EL5160ISZ-T7 (Note)
5160ISZ
7”
8 Ld SOIC (150 mil) (Pb-Free)
MDP0027
EL5160ISZ-T13 (Note)
5160ISZ
13”
8 Ld SOIC (150 mil) (Pb-Free)
MDP0027
EL5160IW-T7
m
7” (3k pcs)
6 Ld SOT-23
MDP0038
EL5160IW-T7A
m
7” (250 pcs)
6 Ld SOT-23
MDP0038
EL5160IWZ-T7 (Note)
BAAN
7” (3k pcs)
6 Ld SOT-23 (Pb-Free)
MDP0038
EL5160IWZ-T7A (Note)
BAAN
7” (250 pcs)
6 Ld SOT-23 (Pb-Free)
MDP0038
EL5161IW-T7
e
7” (3k pcs)
5 Ld SOT-23
MDP0038
EL5161IW-T7A
e
7” (250 pcs)
5 Ld SOT-23
MDP0038
EL5161IWZ-T7 (Note)
BAJA
7” (3k pcs)
5 Ld SOT-23 (Pb-Free)
MDP0038
EL5161IWZ-T7A (Note)
BAJA
7” (250 pcs)
5 Ld SOT-23 (Pb-Free)
MDP0038
EL5161IC-T7
D
7” (3k pcs)
5 Ld SC-70 (1.25mm)
P5.049
EL5161IC-T7A
D
7” (250 pcs)
5 Ld SC-70 (1.25mm)
P5.049
EL5260IY
BNAAA
-
10 Ld MSOP (3.0mm)
MDP0043
EL5260IY-T7
BNAAA
7”
10 Ld MSOP (3.0mm)
MDP0043
EL5260IY-T13
BNAAA
13”
10 Ld MSOP (3.0mm)
MDP0043
EL5260IYZ (Note)
BAAAK
-
10 Ld MSOP (3.0mm) (Pb-free)
MDP0043
EL5260IYZ-T7 (Note)
BAAAK
7”
10 Ld MSOP (3.0mm) (Pb-free)
MDP0043
EL5260IYZ-T13 (Note)
BAAAK
13”
10 Ld MSOP (3.0mm) (Pb-free)
MDP0043
EL5261IY
BKAAA
-
8 Ld MSOP (3.0mm)
MDP0043
EL5261IY-T7
BKAAA
7”
8 Ld MSOP (3.0mm)
MDP0043
EL5261IY-T13
BKAAA
13”
8 Ld MSOP (3.0mm)
MDP0043
EL5261IS
5261IS
-
8 Ld SOIC (150 mil)
MDP0027
EL5261IS-T7
5261IS
7”
8 Ld SOIC (150 mil)
MDP0027
EL5261IS-T13
5261IS
13”
8 Ld SOIC (150 mil)
MDP0027
EL5261ISZ (Note)
5261ISZ
-
8 Ld SOIC (150 mil) (Pb-free)
MDP0027
EL5261ISZ-T7 (Note)
5261ISZ
7”
8 Ld SOIC (150 mil) (Pb-free)
MDP0027
EL5261ISZ-T13 (Note)
5261ISZ
13”
8 Ld SOIC (150 mil) (Pb-free)
MDP0027
EL5360IS
EL5360IS
-
16 Ld SOIC (150 mil)
MDP0027
EL5360IS-T7
EL5360IS
7”
16 Ld SOIC (150 mil)
MDP0027
EL5360IS-T13
EL5360IS
13”
16 Ld SOIC (150 mil)
MDP0027
EL5360ISZ (Note)
EL5360ISZ
-
16 Ld SOIC (150 mil) (Pb-Free)
MDP0027
EL5360ISZ-T7 (Note)
EL5360ISZ
7”
16 Ld SOIC (150 mil) (Pb-Free)
MDP0027
EL5360ISZ-T13 (Note)
EL5360ISZ
13”
16 Ld SOIC (150 mil) (Pb-Free)
MDP0027
EL5360IU
5360IU
-
16 Ld QSOP (150 mil)
MDP0040
EL5360IU-T7
5360IU
7”
16 Ld QSOP (150 mil)
MDP0040
2
FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
Ordering Information (Continued)
PART NUMBER
PART MARKING
EL5360IU-T13
5360IU
EL5360IUZ (Note)
5360IUZ
EL5360IUZ-T7 (Note)
EL5360IUZ-T13 (Note)
TAPE & REEL
13”
PACKAGE
PKG.
DWG. #
16 Ld QSOP (150 mil)
MDP0040
-
16 Ld QSOP (150 mil) (Pb-Free)
MDP0040
5360IUZ
7”
16 Ld QSOP (150 mil) (Pb-Free)
MDP0040
5360IUZ
13”
16 Ld QSOP (150 mil) (Pb-Free)
MDP0040
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3
FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
3
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Supply Voltage between VS+ and VS- . . . . . . . . . . . . . . . . . . . 13.2V
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 50mA
Slew Rate of VS+ to VS- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1V/µs
Pin Voltages . . . . . . . . . . . . . . . . . . . . . . . . VS- - 0.5V to VS+ + 0.5V
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
VS+ = +5V, VS- = -5V, RF = 750Ω for AV = 1, RL = 150Ω, VCE, H = VS+, VCE, L = (VS+) -3V, TA = +25°C,
Unless Otherwise Specified.
Electrical Specifications
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
AC PERFORMANCE
BW
-3dB Bandwidth
AV = +1, RL = 500Ω
200
MHz
AV = +2, RL = 150Ω
125
MHz
10
MHz
BW1
0.1dB Bandwidth
RL = 100Ω
SR
Slew Rate
VO = -2.5V to +2.5V, AV = +2, RF = RG = 1kΩ,
RL = 100Ω
900
1700
2500
V/µs
EL5260, EL5261
800
1300
2500
V/µs
SR
500Ω Load
1360
V/µs
tS
0.1% Settling Time
35
ns
eN
Input Voltage Noise
4
nV/√Hz
iN-
IN- Input Current Noise
7
pA/√Hz
iN+
IN+ Input Current Noise
8
pA/√Hz
VOUT = -2.5V to +2.5V, AV = +2
HD2
5MHz, 2.5VP-P, RL = 150Ω, AV = +2
-74
dBc
HD3
5MHz, 2.5VP-P, RL = 150Ω, AV = +2
-50
dBc
dG
Differential Gain Error (Note 1)
AV = +2
0.1
%
dP
Differential Phase Error (Note 1)
AV = +2
0.1
°
DC PERFORMANCE
VOS
Offset Voltage
TCVOS
Input Offset Voltage Temperature
Coefficient
Measured from TMIN to TMAX
ROL
Transimpedance
±2.5VOUT into 150Ω
-5
1.6
+5
mV
6
µV/°C
800
2000
kΩ
V
INPUT CHARACTERISTICS
CMIR
Common Mode Input Range
Guaranteed by CMRR test
±3
±3.3
CMRR
Common Mode Rejection Ratio
VIN = ±3V
50
62
-ICMR
- Input Current Common Mode Rejection
+IIN
75
dB
-1
+1
µA/V
+ Input Current
-4
+4
µA
-IIN
- Input Current
-5
+5
µA
RIN
Input Resistance
1.5
15
MΩ
CIN
Input Capacitance
4
4
1
pF
FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
VS+ = +5V, VS- = -5V, RF = 750Ω for AV = 1, RL = 150Ω, VCE, H = VS+, VCE, L = (VS+) -3V, TA = +25°C,
Unless Otherwise Specified. (Continued)
Electrical Specifications
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
RL = 150Ω to GND
±3.1
±3.4
±3.8
V
RL = 1kΩ to GND
±3.8
±4.0
±4.2
V
Output Current
RL = 10Ω to GND
40
70
140
mA
Supply Current - Enabled, per Amplifier
No load, VIN = 0V (EL5160, EL5161,
EL5260, EL5261)
0.6
0.75
0.85
mA
No load, VIN = 0V (EL5360)
0.6
0.8
0.92
mA
0
10
25
µA
0
µA
OUTPUT CHARACTERISTICS
VO
Output Voltage Swing
IOUT
SUPPLY
ISON
ISOFF+
Supply Current - Disabled, per Amplifier
ISOFF-
Supply Current - Disabled, per Amplifier
No load, VIN = 0V
-25
-14
PSRR
Power Supply Rejection Ratio
DC, VS = ±4.75V to ±5.25V
65
74
-IPSR
- Input Current Power Supply Rejection
DC, VS = ±4.75V to ±5.25V
-0.5
0.1
dB
0.5
µA/V
ENABLE (EL5160, EL5260, EL5360 ONLY)
tEN
Enable Time
600
ns
tDIS
Disable Time
800
ns
ICE, H
CE Pin Input High Current
CE = VS+
1
5
25
µA
ICE, L
CE Pin Input Low Current
CE = (VS+) - 5V
-1
0
1
µA
NOTE:
1. Standard NTSC test, AC signal amplitude = 286mVP-P, f = 3.58MHz
Typical Performance Curves
4
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
3
1
-1
-3 V =+5V
CC
VEE=-5V
RL=150Ω
-5 A =2
V
RF=806Ω
RG=806Ω
-7
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 1. FREQUENCY RESPONSE
5
1G
2
0
-2
VCC=+5V
VEE=-5V
-4 AV=1
RL=500Ω
RF=2800Ω
-6
100K
1M
10M
100M
1G
FREQUENCY (Hz)
FIGURE 2. FREQUENCY RESPONSE
FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
(Continued)
5
4
RL=500Ω
RF=2.7k6Ω
3 AV=1
AV= 2
RL=150Ω
2 RF=RG=762Ω
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
Typical Performance Curves
±5V
1
±6V
±4V
-1
±3V
±2.5V
-3
-5
100K
1M
10M
100M
1G
±5V
0
±4V
-2
±3V
±6V
±2.5V
-4
-6
100K
1M
FREQUENCY (Hz)
100M
1G
FREQUENCY (Hz)
FIGURE 3. FREQUENCY RESPONSE FOR VARIOUS
VCC, VEE
4
NORMALIZED GAIN (dB)
10M
FIGURE 4. FREQUENCY RESPONSE FOR VARIOUS
VCC, VEE
100M
VCC=+5V
VEE=-5V
AV=10
RL=500Ω
RF=560Ω
2
10M
1M
0
100K
-2
10K
-4
1K
-6
100K
1M
10M
100M
1G
100
1K
10K
100K
1M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 5. FREQUENCY RESPONSE
FIGURE 6. ROL
INPUT
1V/DIV
INPUT
1V/DIV
10M
OUTPUT
500mV/DIV
OUTPUT
500mV/DIV
VCC=+5V
VEE=-5V
AV=2
RL=150Ω
RF=RG=422Ω
4ns/DIV
FIGURE 7. RISE TIME
6
VCC=+5V
VEE=-5V
AV=2
RL=150Ω
RF=RG=422Ω
4ns/DIV
FIGURE 8. FALL TIME
FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
Typical Performance Curves
(Continued)
VCC=+5V
VEE=-5V
CE
5V/DIV
5V/DIV
CE
200mV/DIV
VOUT
200mV/DIV
VOUT
VCC=+5V
VEE=-5V
400ns/DIV
400ns/DIV
FIGURE 9. DISABLE DELAY TIME
FIGURE 10. ENABLE DELAY TIME
0
1K
VCC=+5V
VEE=-5V
OUTPUT IMPEDANCE (Ω)
VCC=+5V
VEE=-5V
PSRR (dB)
-20
-40
VCC
-60
VEE
-80
-100
1K
10K
100K
1M
10M
100M
100
10
1
100m
10m
10K
1G
100K
FREQUENCY (Hz)
4
VS=±5V
RF=1.5kΩ
2 RG=750Ω
RL=150Ω
VS=±5V
AV=-1
2 RG=768Ω
RL=150Ω
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
100M
FIGURE 12. CLOSED LOOP OUTPUT IMPEDANCE
4
0
AV=-2
AV=-5
10M
FREQUENCY (Hz)
FIGURE 11. PSSR
-2
1M
AV=+2
-4
RF=768Ω
0
RF=1kΩ
-2
RF=1.2kΩ
-4
RF=1.5kΩ
-6
100K
1M
10M
100M
1G
FREQUENCY (Hz)
FIGURE 13. FREQUENCY RESPONSE FOR VARIOUS GAIN
SETTINGS
7
-6
100K
1M
10M
100M
1G
FREQUENCY (Hz)
FIGURE 14. FREQUENCY RESPONSE FOR VARIOUS
FEEDBACK RESISTORS, AV=-1
FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
Typical Performance Curves
(Continued)
5
VS=±5V
RF=RG=768Ω
2 RL=500Ω
AV=-5
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
4
AV=-1
0
AV=+5
-2
AV=+10
-4
-6
100K
1M
10M
100M
VS=±5V
AV=+1
3 RL=150Ω
RF=1kΩ
1
RF=750Ω
-1
-3
-5
100K
1G
1M
FREQUENCY (Hz)
10M
100M
1G
FREQUENCY (Hz)
FIGURE 15. FREQUENCY RESPONSE FOR VARIOUS GAIN
SETTINGS
1.4
RF=2.8kΩ
FIGURE 16. FREQUENCY RESPONSE FOR VARIOUS
FEEDBACK RESISTORS, AV=+1
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.4
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1 909mW
POWER DISSIPATION (W)
POWER DISSIPATION (W)
1.250W
1.2
SO16 (0.150”)
θJA=80°C/W
0.8
SO8
θJA=110°C/W
0.6
435mW
0.4
SOT23-5/6
θJA=110°C/W
0.2
0
1.2
1 893mW
0.8 870mW
0.6
MSOP8/10
θJA=115°C/W
0.4
0.2
0
0
25
50
75 85 100
125
150
0
25
FREQUENCY (Hz)
1.2
SO16 (0.150”)
θJA=110°C/W
POWER DISSIPATION (W)
POWER DISSIPATION (W)
909mW
0.8
0.7
0.6
SO8
θJA=160°C/W
625mW
0.5
0.4
391mW
0.3
0.2
SOT23-5/6
θJA=256°C/W
0.1
75 85 100
125
150
FIGURE 18. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.9
50
FREQUENCY (Hz)
FIGURE 17. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
1
QSOP16
θJA=112°C/W
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1
0.8
633mW
0.6
486mW
QSOP16
θJA=158°C/W
0.4
MSOP8/10
θJA=206°C/W
0.2
0
0
0
25
50
75 85 100
125
150
FREQUENCY (Hz)
FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
8
0
25
50
75 85 100
125
150
FREQUENCY (Hz)
FIGURE 20. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
Pin Descriptions
EL5160
(8 Ld SOIC)
EL5160
(6 Ld SOT-23)
EL5161
(5 Ld SOT-23)
1, 5
2
4
4
PIN NAME
FUNCTION
NC
Not connected
IN-
Inverting input
EQUIVALENT CIRCUIT
VS+
IN+
IN-
VSCircuit 1
3
3
3
IN+
Non-inverting input
4
2
6
1
2
VS-
Negative supply
1
OUT
Output
(See circuit 1)
VS+
OUT
VSCircuit 2
7
6
8
5
5
VS+
Positive supply
CE
Chip enable
VS+
CE
VSCircuit 3
Applications Information
Product Description
The EL5160, EL5161, EL5260, EL5261, and EL5360 are low
power, current-feedback operational amplifiers that offer a
wide -3dB bandwidth of 200MHz and a low supply current of
0.75mA per amplifier. The EL5160, EL5161, EL5260,
EL5261, and EL5360 work with supply voltages ranging from
a single 5V to 10V and they are also capable of swinging to
within 1V of either supply on the output. Because of their
current-feedback topology, the EL5160, EL5161, EL5260,
EL5261, and EL5360 do not have the normal gainbandwidth product associated with voltage-feedback
operational amplifiers. Instead, their -3dB bandwidth to
remain relatively constant as closed-loop gain is increased.
This combination of high bandwidth and low power, together
with aggressive pricing make the EL5160, EL5161, EL5260,
EL5261, and EL5360 ideal choices for many lowpower/high-bandwidth applications such as portable,
handheld, or battery-powered equipment.
9
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit
board layout is necessary for optimum performance. Low
impedance ground plane construction is essential. Surface
mount components are recommended, but if leaded
components are used, lead lengths should be as short as
possible. The power supply pins must be well bypassed to
reduce the risk of oscillation. The combination of a 4.7µF
tantalum capacitor in parallel with a 0.01µF capacitor has
been shown to work well when placed at each supply pin.
For good AC performance, parasitic capacitance should be
kept to a minimum, especially at the inverting input. (See the
Capacitance at the Inverting Input section) Even when
ground plane construction is used, it should be removed
from the area near the inverting input to minimize any stray
capacitance at that node. Carbon or Metal-Film resistors are
acceptable with the Metal-Film resistors giving slightly less
peaking and bandwidth because of additional series
inductance. Use of sockets, particularly for the SO package,
should be avoided if possible. Sockets add parasitic
inductance and capacitance which will result in additional
peaking and overshoot.
FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
Disable/Power-Down
The EL5160 amplifier can be disabled placing its output in a
high impedance state. When disabled, the amplifier supply
current is reduced to < 15µA. The EL5160 is disabled when
its CE pin is pulled up to within 1V of the positive supply.
Similarly, the amplifier is enabled by floating or pulling its CE
pin to at least 3V below the positive supply. For ±5V supply,
this means that an EL5160 amplifier will be enabled when
CE is 2V or less, and disabled when CE is above 4V.
Although the logic levels are not standard TTL, this choice of
logic voltages allows the EL5160 to be enabled by tying CE
to ground, even in 5V single supply applications. The CE pin
can be driven from CMOS outputs.
Capacitance at the Inverting Input
Any manufacturer’s high-speed voltage- or current-feedback
amplifier can be affected by stray capacitance at the
inverting input. For inverting gains, this parasitic capacitance
has little effect because the inverting input is a virtual
ground, but for non-inverting gains, this capacitance (in
conjunction with the feedback and gain resistors) creates a
pole in the feedback path of the amplifier. This pole, if low
enough in frequency, has the same destabilizing effect as a
zero in the forward open-loop response. The use of largevalue feedback and gain resistors exacerbates the problem
by further lowering the pole frequency (increasing the
possibility of oscillation.)
The EL5160, EL5161, EL5260, EL5261, and EL5360 have
been optimized with a TBDΩ feedback resistor. With the high
bandwidth of these amplifiers, these resistor values might
cause stability problems when combined with parasitic
capacitance, thus ground plane is not recommended around
the inverting input pin of the amplifier.
Feedback Resistor Values
The EL5160, EL5161, EL5260, EL5261, and EL5360 have
been designed and specified at a gain of +2 with RF
approximately 806Ω. This value of feedback resistor gives
200MHz of -3dB bandwidth at AV = 2 with TBDdB of
peaking. With AV = -2, an RF of approximately TBDΩ gives
200MHz of bandwidth with 1dB of peaking. Since the
EL5160, EL5161, EL5260, EL5261, and EL5360 are currentfeedback amplifiers, it is also possible to change the value of
RF to get more bandwidth. As seen in the curve of
Frequency Response for Various RF and RG, bandwidth and
peaking can be easily modified by varying the value of the
feedback resistor.
Because the EL5160, EL5161, EL5260, EL5261, and
EL5360 are current-feedback amplifiers, their gainbandwidth product is not a constant for different closed-loop
gains. This feature actually allows the EL5160, EL5161,
EL5260, EL5261, and EL5360 to maintain about the same 3dB bandwidth. As gain is increased, bandwidth decreases
slightly while stability increases. Since the loop stability is
improving with higher closed-loop gains, it becomes possible
10
to reduce the value of RF below the specified TBDΩ and still
retain stability, resulting in only a slight loss of bandwidth
with increased closed-loop gain.
Supply Voltage Range and Single-Supply
Operation
The EL5160, EL5161, EL5260, EL5261, and EL5360 have
been designed to operate with supply voltages having a
span of greater than 5V and less than 10V. In practical
terms, this means that they will operate on dual supplies
ranging from ±2.5V to ±5V. With single-supply, the EL5160,
EL5161, EL5260, EL5261, and EL5360 will operate from 5V
to 10V.
As supply voltages continue to decrease, it becomes
necessary to provide input and output voltage ranges that
can get as close as possible to the supply voltages. The
EL5160, EL5161, EL5260, EL5261, and EL5360 have an
input range which extends to within 2V of either supply. So,
for example, on +5V supplies, the EL5160, EL5161, EL5260,
EL5261, and EL5360 have an input range which spans ±3V.
The output range of the EL5160, EL5161, EL5260, EL5261,
and EL5360 is also quite large, extending to within 1V of the
supply rail. On a ±5V supply, the output is therefore capable
of swinging from -4V to +4V. Single-supply output range is
larger because of the increased negative swing due to the
external pull-down resistor to ground.
Video Performance
For good video performance, an amplifier is required to
maintain the same output impedance and the same
frequency response as DC levels are changed at the output.
This is especially difficult when driving a standard video load
of 150Ω, because of the change in output current with DC
level. Previously, good differential gain could only be
achieved by running high idle currents through the output
transistors (to reduce variations in output impedance.)
These currents were typically comparable to the entire 1mA
supply current of each EL5160, EL5161, EL5260, EL5261,
and EL5360 amplifier. Special circuitry has been
incorporated in the EL5160, EL5161, EL5260, EL5261, and
EL5360 to reduce the variation of output impedance with
current output. This results in dG and dP specifications of
0.1% and 0.1°, while driving 150Ω at a gain of 2.
Video performance has also been measured with a 500Ω
load at a gain of +1. Under these conditions, the EL5160 has
dG and dP specifications of 0.1% and 0.1°.
Output Drive Capability
In spite of their low 1mA of supply current, the EL5160,
EL5161, EL5260, EL5261, and EL5360 are capable of
providing a minimum of ±50mA of output current. With a
minimum of ±50mA of output drive, the EL5160 is capable of
driving 50Ω loads to both rails, making it an excellent choice
for driving isolation transformers in telecommunications
applications.
FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
Driving Cables and Capacitive Loads
where:
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, the back-termination series resistor will
decouple the EL5160, EL5161, EL5260, EL5261, and
EL5360 from the cable and allow extensive capacitive drive.
However, other applications may have high capacitive loads
without a back-termination resistor. In these applications, a
small series resistor (usually between 5Ω and 50Ω) can be
placed in series with the output to eliminate most peaking.
The gain resistor (RG) can then be chosen to make up for
any gain loss which may be created by this additional
resistor at the output. In many cases it is also possible to
simply increase the value of the feedback resistor (RF) to
reduce the peaking.
• VS = Supply voltage
• ISMAX = Maximum supply current of 0.75mA
• VOUTMAX = Maximum output voltage (required)
• RL = Load resistance
Typical Application Circuits
0.1µF
+5V
IN+
VS+
OUT
INVS0.1µF
-5V
500Ω
Current Limiting
The EL5160, EL5161, EL5260, EL5261, and EL5360 have
no internal current-limiting circuitry. If the output is shorted, it
is possible to exceed the Absolute Maximum Rating for
output current or power dissipation, potentially resulting in
the destruction of the device.
5Ω
0.1µF
VOUT
+5V
IN+
VS+
5Ω
OUT
INVS-
Power Dissipation
0.1µF
With the high output drive capability of the EL5160, EL5161,
EL5260, EL5261, and EL5360, it is possible to exceed the
+125°C Absolute Maximum junction temperature under
certain very high load current conditions. Generally speaking
when RL falls below about 25Ω, it is important to calculate
the maximum junction temperature (TJMAX) for the
application to determine if power supply voltages, load
conditions, or package type need to be modified for the
EL5160, EL5161, EL5260, EL5261, and EL5360 to remain in
the safe operating area. These parameters are calculated as
follows:
-5V
500Ω
500Ω
VIN
FIGURE 21. INVERTING 200mA OUTPUT CURRENT
DISTRIBUTION AMPLIFIER
500Ω
500Ω
0.1µF
+5V
IN+
T JMAX = T MAX + ( θ JA × n × PD MAX )
VS+
OUT
INVS-
where:
0.1µF
500Ω
-5V
500Ω
+5V
• TMAX = Maximum ambient temperature
• θJA = Thermal resistance of the package
0.1µF
• n = Number of amplifiers in the package
• PDMAX = Maximum power dissipation of each amplifier in
the package
PDMAX for each amplifier can be calculated as follows:
V OUTMAX
PD MAX = ( 2 × V S × I SMAX ) + ( V S – V OUTMAX ) × ---------------------------R
L
11
VIN
IN+
VS+
OUT
IN-
VOUT
VS0.1µF
-5V
FIGURE 22. FAST-SETTLING PRECISION AMPLIFIER
FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
0.1µF
0.1µF
+5V
+5V
IN+
VS+
IN+
VS+
OUT
IN-
OUT
INVS-
VS0.1µF
0.1µF
-5V
-5V
500Ω
0.1µF
250Ω
500Ω
500Ω
VOUT+
1kΩ
0.1µF
240Ω
+5V
0.1µF
+5V
IN+
VS+
OUT
IN-
0.1µF
250Ω
IN+
VOUT1kΩ
VS-
VS+
0.1µF
VOUT
VS-
-5V
500Ω
OUT
IN0.1µF
-5V
500Ω
VIN
500Ω
TRANSMITTER
500Ω
RECEIVER
FIGURE 23. DIFFERENTIAL LINE DRIVER/RECEIVER
12
FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M C A B
e
H
C
A2
GAUGE
PLANE
SEATING
PLANE
A1
0.004 C
0.010 M C A B
L
b
0.010
4° ±4°
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SYMBOL
SO-14
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
TOLERANCE
NOTES
A
0.068
0.068
0.068
0.104
0.104
0.104
0.104
MAX
-
A1
0.006
0.006
0.006
0.007
0.007
0.007
0.007
±0.003
-
A2
0.057
0.057
0.057
0.092
0.092
0.092
0.092
±0.002
-
b
0.017
0.017
0.017
0.017
0.017
0.017
0.017
±0.003
-
c
0.009
0.009
0.009
0.011
0.011
0.011
0.011
±0.001
-
D
0.193
0.341
0.390
0.406
0.504
0.606
0.704
±0.004
1, 3
E
0.236
0.236
0.236
0.406
0.406
0.406
0.406
±0.008
-
E1
0.154
0.154
0.154
0.295
0.295
0.295
0.295
±0.004
2, 3
e
0.050
0.050
0.050
0.050
0.050
0.050
0.050
Basic
-
L
0.025
0.025
0.025
0.030
0.030
0.030
0.030
±0.009
-
L1
0.041
0.041
0.041
0.056
0.056
0.056
0.056
Basic
-
h
0.013
0.013
0.013
0.020
0.020
0.020
0.020
Reference
-
16
20
24
28
Reference
-
N
SO-8
SO16
(0.150”)
8
14
16
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
13
FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
SOT-23 Package Family
MDP0038
e1
D
SOT-23 PACKAGE FAMILY
A
MILLIMETERS
6
N
SYMBOL
4
E1
2
E
3
0.15 C D
1
2X
2
3
0.20 C
5
2X
e
0.20 M C A-B D
B
b
NX
0.15 C A-B
1
3
SOT23-5
SOT23-6
A
1.45
1.45
MAX
A1
0.10
0.10
±0.05
A2
1.14
1.14
±0.15
b
0.40
0.40
±0.05
c
0.14
0.14
±0.06
D
2.90
2.90
Basic
E
2.80
2.80
Basic
E1
1.60
1.60
Basic
e
0.95
0.95
Basic
e1
1.90
1.90
Basic
L
0.45
0.45
±0.10
L1
0.60
0.60
Reference
N
5
6
Reference
D
2X
TOLERANCE
Rev. F 2/07
NOTES:
C
A2
2. Plastic interlead protrusions of 0.25mm maximum per side are not
included.
SEATING
PLANE
A1
0.10 C
1. Plastic or metal protrusions of 0.25mm maximum per side are not
included.
3. This dimension is measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
NX
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
(L1)
6. SOT23-5 version has no center lead (shown as a dashed line).
H
A
GAUGE
PLANE
c
L
14
0.25
0° +3°
-0°
FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
Mini SO Package Family (MSOP)
0.25 M C A B
D
MINI SO PACKAGE FAMILY
(N/2)+1
N
E
MDP0043
A
E1
MILLIMETERS
PIN #1
I.D.
1
B
(N/2)
e
H
C
SEATING
PLANE
0.10 C
N LEADS
SYMBOL
MSOP8
MSOP10
TOLERANCE
NOTES
A
1.10
1.10
Max.
-
A1
0.10
0.10
±0.05
-
A2
0.86
0.86
±0.09
-
b
0.33
0.23
+0.07/-0.08
-
c
0.18
0.18
±0.05
-
D
3.00
3.00
±0.10
1, 3
E
4.90
4.90
±0.15
-
E1
3.00
3.00
±0.10
2, 3
e
0.65
0.50
Basic
-
L
0.55
0.55
±0.15
-
L1
0.95
0.95
Basic
-
N
8
10
Reference
-
0.08 M C A B
b
Rev. D 2/07
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
L1
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
A
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
c
SEE DETAIL "X"
A2
GAUGE
PLANE
L
A1
0.25
3° ±3°
DETAIL X
15
FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
Small Outline Transistor Plastic Packages (SC70-5)
P5.049
D
VIEW C
e1
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
INCHES
5
SYMBOL
4
E
CL
1
2
CL
3
e
E1
b
CL
0.20 (0.008) M
C
C
CL
A
A2
SEATING
PLANE
A1
-C-
WITH
PLATING
b1
NOTES
0.031
0.043
0.80
1.10
-
0.004
0.00
0.10
-
A2
0.031
0.039
0.80
1.00
-
b
0.006
0.012
0.15
0.30
-
b1
0.006
0.010
0.15
0.25
c
0.003
0.009
0.08
0.22
6
c1
0.003
0.009
0.08
0.20
6
D
0.073
0.085
1.85
2.15
3
E
0.071
0.094
1.80
2.40
-
E1
0.045
0.053
1.15
1.35
3
e
0.0256 Ref
0.65 Ref
-
e1
0.0512 Ref
1.30 Ref
-
L2
0.010
0.018
0.017 Ref.
0.26
0.46
4
0.420 Ref.
0.006 BSC
0o
N
c1
MAX
0.000
α
c
MIN
A
L
b
MILLIMETERS
MAX
A1
L1
0.10 (0.004) C
MIN
-
0.15 BSC
8o
0o
5
8o
-
5
5
R
0.004
-
0.10
-
R1
0.004
0.010
0.15
0.25
Rev. 2 9/03
NOTES:
BASE METAL
1. Dimensioning and tolerances per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC70 and JEDEC MO-203AA.
4X θ1
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
R1
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
R
GAUGE PLANE
SEATING
PLANE
L
C
L1
α
L2
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only.
4X θ1
VIEW C
16
FN7387.9
May 7, 2007
EL5160, EL5161, EL5260, EL5261, EL5360
Quarter Size Outline Plastic Packages Family (QSOP)
MDP0040
A
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
D
(N/2)+1
N
INCHES
SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES
E
PIN #1
I.D. MARK
E1
1
(N/2)
A
0.068
0.068
0.068
Max.
-
A1
0.006
0.006
0.006
±0.002
-
A2
0.056
0.056
0.056
±0.004
-
b
0.010
0.010
0.010
±0.002
-
c
0.008
0.008
0.008
±0.001
-
D
0.193
0.341
0.390
±0.004
1, 3
E
0.236
0.236
0.236
±0.008
-
E1
0.154
0.154
0.154
±0.004
2, 3
e
0.025
0.025
0.025
Basic
-
L
0.025
0.025
0.025
±0.009
-
L1
0.041
0.041
0.041
Basic
-
N
16
24
28
Reference
-
B
0.010
C A B
e
H
C
SEATING
PLANE
0.007
0.004 C
b
C A B
Rev. F 2/07
NOTES:
L1
A
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
c
SEE DETAIL "X"
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
0.010
A2
GAUGE
PLANE
L
A1
4°±4°
DETAIL X
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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17
FN7387.9
May 7, 2007