HFA1105 September 1998 File Number 3395.6 330MHz, Low Power, Current Feedback Video Operational Amplifier Features The HFA1105 is a high speed, low power current feedback amplifier built with Intersil’s proprietary complementary bipolar UHF-1 process. • High Input Impedance . . . . . . . . . . . . . . . . . . . . . . . 1MΩ This amplifier features an excellent combination of low power dissipation (58mW) and high performance. The slew rate, bandwidth, and low output impedance (0.08Ω) make this amplifier a good choice for driving Flash ADCs. Component and composite video systems also benefit from this op amp’s excellent gain flatness, and good differential gain and phase specifications. The HFA1105 is ideal for interfacing to Intersil’s line of video crosspoint switches (HA4201, HA4600, HA4314, HA4404, HA4344), to create high performance, low power switchers and routers. The HFA1105 is a low power, high performance upgrade for the CLC406. For a comparable amplifier with output disable or output limiting functions, please see the data sheets for the HFA1145 and HFA1135 respectively. For Military grade product, please refer to the HFA1145/883 data sheet. TEMP. RANGE (oC) • Very Fast Slew Rate . . . . . . . . . . . . . . . . . . . . . . 1000V/µs • Gain Flatness (to 75MHz) . . . . . . . . . . . . . . . . . . . . 0.1dB • Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.02% • Differential Phase . . . . . . . . . . . . . . . . . . . . 0.03 Degrees • Pin Compatible Upgrade for CLC406 Applications • Flash A/D Drivers • Video Switching and Routing • Professional Video Processing • Video Digitizing Boards/Systems • Multimedia Systems • RGB Preamps • Hand Held and Miniaturized RF Equipment PACKAGE PKG. NO. • Battery Powered Communications Pinout HFA1105IP -40 to 85 8 Ld PDIP E8.3 HFA1105IB (H1105I) -40 to 85 8 Ld SOIC M8.15 HFA11XXEVAL • Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . . . . . . 330MHz • Medical Imaging Ordering Information PART NUMBER (BRAND) • Low Supply Current . . . . . . . . . . . . . . . . . . . . . . . . 5.8mA HFA1105 (PDIP, SOIC) TOP VIEW DIP Evaluation Board for High Speed Op Amps 1 NC 1 -IN 2 +IN 3 V- 4 + 8 NC 7 V+ 6 OUT 5 NC CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 HFA1105 Absolute Maximum Ratings Thermal Information Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11V DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V Output Current (Note 1) . . . . . . . . . . . . . . . . .Short Circuit Protected 30mA Continuous 60mA ≤ 50% Duty Cycle ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >600V Thermal Resistance (Typical, Note 2) θJA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . . .175oC Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Output is short circuit protected to ground. Brief short circuits to ground will not degrade reliability, however continuous (100% duty cycle) output current must not exceed 30mA for maximum reliability. 2. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications VSUPPLY = ±5V, AV = +1, RF = 510Ω, RL = 100Ω, Unless Otherwise Specified (NOTE 3) PARAMETER TEST CONDITIONS TEST LEVEL TEMP. (oC) MIN TYP MAX UNITS INPUT CHARACTERISTICS Input Offset Voltage A 25 - 2 5 mV A Full - 3 8 mV B Full - 1 10 µV/oC ∆VCM = ±1.8V A 25 47 50 - dB ∆VCM = ±1.8V A 85 45 48 - dB ∆VCM = ±1.2V A -40 45 48 - dB Average Input Offset Voltage Drift Input Offset Voltage Common-Mode Rejection Ratio Input Offset Voltage Power Supply Rejection Ratio ∆VPS = ±1.8V A 25 50 54 - dB ∆VPS = ±1.8V A 85 47 50 - dB ∆VPS = ±1.2V A -40 47 50 - dB A 25 - 6 15 µA A Full - 10 25 µA B Full - 5 60 nA/oC ∆VPS = ±1.8V A 25 - 0.5 1 µA/V ∆VPS = ±1.8V A 85 - 0.8 3 µA/V ∆VPS = ±1.2V A -40 - 0.8 3 µA/V ∆VCM = ±1.8V A 25 0.8 1.2 - MΩ ∆VCM = ±1.8V A 85 0.5 0.8 - MΩ ∆VCM = ±1.2V A -40 0.5 0.8 - MΩ A 25 - 2 7.5 µA A Full - 5 15 µA B Full - 60 200 nA/oC ∆VCM = ±1.8V A 25 - 3 6 µA/V ∆VCM = ±1.8V A 85 - 4 8 µA/V ∆VCM = ±1.2V A -40 - 4 8 µA/V Non-Inverting Input Bias Current Non-Inverting Input Bias Current Drift Non-Inverting Input Bias Current Power Supply Sensitivity Non-Inverting Input Resistance Inverting Input Bias Current Inverting Input Bias Current Drift Inverting Input Bias Current Common-Mode Sensitivity Inverting Input Bias Current Power Supply Sensitivity 2 ∆VPS = ±1.8V A 25 - 2 5 µA/V ∆VPS = ±1.8V A 85 - 4 8 µA/V ∆VPS = ±1.2V A -40 - 4 8 µA/V HFA1105 Electrical Specifications VSUPPLY = ±5V, AV = +1, RF = 510Ω, RL = 100Ω, Unless Otherwise Specified (Continued) (NOTE 3) TEST LEVEL TEMP. (oC) MIN Inverting Input Resistance C 25 - 60 - Ω Input Capacitance C 25 - 1.6 - pF Input Voltage Common Mode Range (Implied by VIO CMRR, +RIN, and -IBIAS CMS Tests) A 25, 85 ±1.8 ±2.4 - V A -40 ±1.2 ±1.7 - V B 25 - 3.5 - nV/√Hz PARAMETER Input Noise Voltage Density (Note 6) TEST CONDITIONS f = 100kHz TYP MAX UNITS Non-Inverting Input Noise Current Density (Note 6) f = 100kHz B 25 - 2.5 - pA/√Hz Inverting Input Noise Current Density (Note 6) f = 100kHz B 25 - 20 - pA/√Hz AV = -1 C 25 - 500 - kΩ AV = +1, +RS = 510Ω B 25 - 270 - MHz B Full - 240 - MHz AV = -1, RF = 425Ω B 25 - 300 - MHz TRANSFER CHARACTERISTICS Open Loop Transimpedance Gain AC CHARACTERISTICS RF = 510Ω, Unless Otherwise Specified -3dB Bandwidth (VOUT = 0.2VP-P, Note 6) AV = +2 AV = +10, RF = 180Ω B 25 - 330 - MHz B Full - 260 - MHz B 25 - 130 - MHz B Full - 90 - MHz Full Power Bandwidth (VOUT = 5VP-P at AV = +2/-1, 4VP-P at AV = +1, Note 6) AV = +1, +RS = 510Ω B 25 - 135 - MHz AV = -1 B 25 - 140 - MHz AV = +2 B 25 - 115 - MHz Gain Flatness (AV = +2, VOUT = 0.2VP-P, Note 6) To 25MHz B 25 - ±0.03 - dB B Full - ±0.04 - dB To 75MHz B 25 - ±0.11 - dB B Full - ±0.22 - dB To 25MHz B 25 - ±0.03 - dB To 75MHz B 25 - ±0.09 - dB A Full - 1 - V/V 25 ±3 ±3.4 - V Gain Flatness (AV = +1, +RS = 510Ω, VOUT = 0.2VP-P, Note 6) Minimum Stable gain OUTPUT CHARACTERISTICS AV = +2, RF = 510Ω, Unless Otherwise Specified Output Voltage Swing (Note 6) AV = -1, RL = 100Ω A A Full ±2.8 ±3 - V Output Current (Note 6) AV = -1, RL = 50Ω A 25, 85 50 60 - mA A -40 28 42 - mA Output Short Circuit Current B 25 - 90 - mA Closed Loop Output Impedance (Note 6) DC B 25 - 0.08 - Ω Second Harmonic Distortion (VOUT = 2VP-P, Note 6) 10MHz B 25 - -48 - dBc 20MHz B 25 - -44 - dBc Third Harmonic Distortion (VOUT = 2VP-P, Note 6) 10MHz B 25 - -50 - dBc 20MHz B 25 - -45 - dBc Reverse Isolation (S12, Note 6) 30MHz B 25 - -55 - dB B 25 - 1.1 - ns B Full - 1.4 - ns TRANSIENT CHARACTERISTICS AV = +2, RF = 510Ω, Unless Otherwise Specified Rise and Fall Times VOUT = 0.5VP-P 3 HFA1105 VSUPPLY = ±5V, AV = +1, RF = 510Ω, RL = 100Ω, Unless Otherwise Specified (Continued) Electrical Specifications (NOTE 3) PARAMETER TEST CONDITIONS TEST LEVEL TEMP. (oC) MIN TYP MAX UNITS Overshoot (Note 4) (VOUT = 0 to 0.5V, VIN tRISE = 1ns) +OS B 25 - 3 - % -OS B 25 - 5 - % Overshoot (Note 4) (VOUT = 0.5VP-P, VIN tRISE = 1ns) +OS B 25 - 3 - % -OS B 25 - 11 - % Slew Rate (VOUT = 4VP-P, AV = +1, +RS = 510Ω) +SR B 25 - 1000 - V/µs B Full - 975 - V/µs -SR (Note 5) B 25 - 650 - V/µs B Full - 580 - V/µs B 25 - 1400 - V/µs B Full - 1200 - V/µs -SR (Note 5) B 25 - 800 - V/µs B Full - 700 - V/µs +SR B 25 - 2100 - V/µs B Full - 1900 - V/µs -SR (Note 5) B 25 - 1000 - V/µs B Full - 900 - V/µs To 0.1% B 25 - 15 - ns To 0.05% B 25 - 23 - ns To 0.02% B 25 - 30 - ns VIN = ±2V B 25 - 8.5 - ns Slew Rate (VOUT = 5VP-P, AV = +2) +SR Slew Rate (VOUT = 5VP-P, AV = -1) Settling Time (VOUT = +2V to 0V step, Note 6) Overdrive Recovery Time VIDEO CHARACTERISTICS AV = +2, RF = 510Ω, Unless Otherwise Specified Differential Gain (f = 3.58MHz) RL = 150Ω B 25 - 0.02 - % RL = 75Ω B 25 - 0.03 - % Differential Phase (f = 3.58MHz) RL = 150Ω B 25 - 0.03 - Degrees RL = 75Ω B 25 - 0.05 - Degrees C 25 ±4.5 - ±5.5 V A 25 - 5.8 6.1 mA A Full - 5.9 6.3 mA POWER SUPPLY CHARACTERISTICS Power Supply Range Power Supply Current (Note 6) NOTES: 3. Test Level: A. Production Tested; B. Typical or Guaranteed Limit Based on Characterization; C. Design Typical for Information Only. 4. Undershoot dominates for output signal swings below GND (e.g., 0.5VP-P), yielding a higher overshoot limit compared to the VOUT = 0 to 0.5V condition. See the “Application Information” section for details. 5. Slew rates are asymmetrical if the output swings below GND (e.g. a bipolar signal). Positive unipolar output signals have symmetric positive and negative slew rates comparable to the +SR specification. See the “Application Information” section, and the pulse response graphs for details. 6. See Typical Performance Curves for more information. Application Information Optimum Feedback Resistor Although a current feedback amplifier’s bandwidth dependency on closed loop gain isn’t as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. This decrease may be minimized by taking advantage of the current feedback 4 amplifier’s unique relationship between bandwidth and RF. All current feedback amplifiers require a feedback resistor, even for unity gain applications, and RF, in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier’s bandwidth is inversely proportional to RF. The HFA1105 design is optimized for RF = 510Ω at a gain of +2. Decreasing RF decreases stability, resulting in excessive peaking and HFA1105 overshoot (Note: Capacitive feedback will cause the same problems due to the feedback impedance decrease at higher frequencies). At higher gains, however, the amplifier is more stable so RF can be decreased in a trade-off of stability for bandwidth. The table below lists recommended RF values for various gains, and the expected bandwidth. For a gain of +1, a resistor (+RS) in series with +IN is required to reduce gain peaking and increase stability. Terminated microstrip signal lines are recommended at the device’s input and output connections. Capacitance, parasitic or planned, connected to the output must be minimized, or isolated as discussed in the next section. Care must also be taken to minimize the capacitance to ground at the amplifier’s inverting input (-IN), as this capacitance causes gain peaking, pulse overshoot, and if large enough, instability. To reduce this capacitance, the designer should remove the ground plane under traces connected to -IN, and keep connections to -IN as short as possible. An example of a good high frequency layout is the Evaluation Board shown in Figure 2. GAIN (ACL) RF (Ω) BANDWIDTH (MHz) -1 425 300 Driving Capacitive Loads +1 510 (+RS = 510Ω) 270 +2 510 330 +5 200 300 +10 180 130 Capacitive loads, such as an A/D input, or an improperly terminated transmission line will degrade the amplifier’s phase margin resulting in frequency response peaking and possible oscillations. In most cases, the oscillation can be avoided by placing a resistor (RS) in series with the output prior to the capacitance. Non-Inverting Input Source Impedance For best operation, the DC source impedance seen by the non-inverting input should be ≥50Ω. This is especially important in inverting gain configurations where the noninverting input would normally be connected directly to GND. Pulse Undershoot and Asymmetrical Slew Rates The HFA1105 utilizes a quasi-complementary output stage to achieve high output current while minimizing quiescent supply current. In this approach, a composite device replaces the traditional PNP pulldown transistor. The composite device switches modes after crossing 0V, resulting in added distortion for signals swinging below ground, and an increased undershoot on the negative portion of the output waveform (See Figures 5, 8, and 11). This undershoot isn’t present for small bipolar signals, or large positive signals. Another artifact of the composite device is asymmetrical slew rates for output signals with a negative voltage component. The slew rate degrades as the output signal crosses through 0V (See Figures 5, 8, and 11), resulting in a slower overall negative slew rate. Positive only signals have symmetrical slew rates as illustrated in the large signal positive pulse response graphs (See Figures 4, 7, and 10). PC Board Layout The amplifier’s frequency response depends greatly on the care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! Attention should be given to decoupling the power supplies. A large value (10µF) tantalum in parallel with a small value (0.1µF) chip capacitor works well in most cases. 5 Figure 1 details starting points for the selection of this resistor. The points on the curve indicate the RS and CL combinations for the optimum bandwidth, stability, and settling time, but experimental fine tuning is recommended. Picking a point above or to the right of the curve yields an overdamped response, while points below or left of the curve indicate areas of underdamped performance. RS and CL form a low pass network at the output, thus limiting system bandwidth well below the amplifier bandwidth of 270MHz (for AV = +1). By decreasing RS as CL increases (as illustrated in the curves), the maximum bandwidth is obtained without sacrificing stability. In spite of this, the bandwidth decreases as the load capacitance increases. For example, at AV = +1, RS = 62Ω, CL = 40pF, the overall bandwidth is limited to 180MHz, and bandwidth drops to 75MHz at AV = +1, RS = 8Ω, CL = 400pF. HFA1105 SERIES OUTPUT RESISTANCE (Ω) 50 510 510 VH R1 40 50Ω IN 30 10µF 20 1 8 2 7 3 6 4 5 +5V 50Ω OUT GND 0.1µF -5V AV = +1 10µF 0.1µF VL GND FIGURE 2C. SCHEMATIC AV = +2 10 FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT 0 0 100 50 150 200 300 250 350 400 LOAD CAPACITANCE (pF) FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs LOAD CAPACITANCE Evaluation Board The performance of the HFA1105 may be evaluated using the HFA11XX Evaluation Board. The layout and schematic of the board are shown in Figure 2. To order evaluation boards (part number HFA11XXEVAL), please contact your local sales office. VH 1 +IN OUT VL V+ VGND FIGURE 2A. TOP LAYOUT FIGURE 2B. BOTTOM LAYOUT 6 HFA1105 Typical Performance Curves 200 3.0 AV = +1 +RS = 510Ω 2.5 100 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (mV) 150 VSUPPLY = ±5V, RF = 510Ω, TA = 25oC, RL = 100Ω, Unless Otherwise Specified 50 0 -50 -100 AV = +1 +RS = 510Ω 2.0 1.5 1.0 0.5 0 -0.5 -150 -1.0 -200 TIME (5ns/DIV.) TIME (5ns/DIV.) FIGURE 3. SMALL SIGNAL PULSE RESPONSE 2.0 200 AV = +1 +RS = 510Ω AV = +2 150 1.0 OUTPUT VOLTAGE (mV) OUTPUT VOLTAGE (V) 1.5 FIGURE 4. LARGE SIGNAL POSITIVE PULSE RESPONSE 0.5 0 -0.5 -1.0 -1.5 100 50 0 -50 -100 -150 -2.0 -200 TIME (5ns/DIV.) TIME (5ns/DIV.) FIGURE 5. LARGE SIGNAL BIPOLAR PULSE RESPONSE FIGURE 6. SMALL SIGNAL PULSE RESPONSE 3.0 2.0 AV = +2 2.5 1.5 2.0 1.0 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) AV = +2 1.5 1.0 0.5 0 -0.5 0.5 0 -0.5 -1.0 -1.5 -1.0 -2.0 TIME (5ns/DIV.) FIGURE 7. LARGE SIGNAL POSITIVE PULSE RESPONSE 7 TIME (5ns/DIV.) FIGURE 8. LARGE SIGNAL BIPOLAR PULSE RESPONSE HFA1105 Typical Performance Curves VSUPPLY = ±5V, RF = 510Ω, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued) 3.0 200 AV = +10 RF = 180Ω 2.5 100 2.0 OUTPUT VOLTAGE (V) 50 0 -50 -100 1.5 1.0 0.5 0 -0.5 -150 -1.0 -200 TIME (5ns/DIV.) TIME (5ns/DIV.) FIGURE 10. LARGE SIGNAL POSITIVE PULSE RESPONSE 2.0 OUTPUT VOLTAGE (V) 1.5 GAIN (dB) AV = +10 RF = 180Ω 1.0 3 0 VOUT = 200mVP-P +RS = 510Ω (+1) +RS = 0Ω (-1) AV = +1 AV = -1 -3 0.5 0 90 -1.0 180 -1.5 AV = +1 -2.0 0.3 1 TIME (5ns/DIV.) FIGURE 11. LARGE SIGNAL BIPOLAR PULSE RESPONSE NORMALIZED GAIN (dB) 3 AV = +2 0 AV = +10 -3 AV = +5 AV = +2 VOUT = 200mVP-P RF = 510Ω (+2) RF = 200Ω (+5) RF = 180Ω (+10) 0.3 1 0 90 AV = +5 180 AV = +10 10 FREQUENCY (MHz) 100 FIGURE 13. FREQUENCY RESPONSE 8 270 500 10 FREQUENCY (MHz) 100 270 500 FIGURE 12. FREQUENCY RESPONSE AV = +2 VOUT = 200mVP-P 3 0 VOUT = 1.5VP-P -3 VOUT = 5VP-P VOUT = 200mVP-P PHASE (DEGREES) NORMALIZED GAIN (dB) 0 AV = -1 -0.5 NORMALIZED PHASE (DEGREES) FIGURE 9. SMALL SIGNAL PULSE RESPONSE 0 90 VOUT = 1.5VP-P 180 270 VOUT = 5VP-P 0.3 1 10 100 PHASE (DEGREES) OUTPUT VOLTAGE (mV) 150 AV = +10 RF = 180Ω 500 FREQUENCY (MHz) FIGURE 14. FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES HFA1105 VSUPPLY = ±5V, RF = 510Ω, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued) AV = -1 0 VOUT = 4VP-P (+1) VOUT = 5VP-P (-1, +2) +RS = 510Ω (+1) -3 AV = +1 AV = +2 VOUT = 200mVP-P 3 AV = +2 RL = 500Ω RL = 1kΩ 0 RL = 50Ω -3 RL = 100Ω RL = 50Ω RL = 100Ω 0 90 RL = 1kΩ RL = 500Ω 180 270 1 10 FREQUENCY (MHz) 100 0.3 200 FIGURE 15. FULL POWER BANDWIDTH NORMALIZED GAIN (dB) BANDWIDTH (MHz) 0.25 AV = +1 300 200 AV = +10 100 500 VOUT = 200mVP-P +RS = 510Ω (+1) VOUT = 200mVP-P RF = 180Ω (+10) +RS = 510Ω (+1) 400 100 FIGURE 16. FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS 500 AV = +2 10 FREQUENCY (MHz) 1 PHASE (DEGREES) 3 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) Typical Performance Curves 0.20 0.15 0.10 AV = +2 0.05 0 AV = +1 -0.05 -0.10 0 -100 -50 0 50 100 150 1 10 FREQUENCY (MHz) TEMPERATURE (oC) FIGURE 18. GAIN FLATNESS -40 AV = +2 VOUT = 2VP-P AV = +1, +2 OUTPUT IMPEDANCE (Ω) REVERSE ISOLATION (dB) FIGURE 17. -3dB BANDWIDTH vs TEMPERATURE -50 -60 AV = -1 -70 -80 -90 0.3 1 75 10 FREQUENCY (MHz) FIGURE 19. REVERSE ISOLATION 9 100 1K 100 10 1 0.1 0.01 0.3 1 10 100 FREQUENCY (MHz) FIGURE 20. OUTPUT IMPEDANCE 1000 HFA1105 Typical Performance Curves VSUPPLY = ±5V, RF = 510Ω, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued) -30 AV = +2 0.8 AV = +2 VOUT = 2V -40 DISTORTION (dBc) SETTLING ERROR (%) 0.6 0.4 0.2 0.1 0 -0.2 -0.4 10MHz -50 20MHz -60 -0.6 -0.8 -70 3 8 13 18 23 28 TIME (ns) 33 38 43 -5 48 5 15 FIGURE 22. SECOND HARMONIC DISTORTION vs POUT -30 3.6 AV = +2 3.5 OUTPUT VOLTAGE (V) Hz 20M -50 Hz 10M -60 |-VOUT| (RL= 100Ω) AV = -1 +VOUT (RL= 100Ω) 3.4 -40 3.3 3.2 3.1 +VOUT (RL= 50Ω) 3.0 2.9 2.8 |-VOUT| (RL= 50Ω) 2.7 2.6 -50 -70 -5 0 5 OUTPUT POWER (dBm) 10 15 -25 0 25 50 75 100 125 TEMPERATURE (oC) FIGURE 23. THIRD HARMONIC DISTORTION vs POUT 100 FIGURE 24. OUTPUT VOLTAGE vs TEMPERATURE 100 10 10 ENI I NI+ POWER SUPPLY CURRENT (mA) INI- 6.1 NOISE CURRENT (pA/√Hz) NOISE VOLTAGE (nV/√Hz) 10 OUTPUT POWER (dBm) FIGURE 21. SETTLING RESPONSE DISTORTION (dBc) 0 6.0 5.9 5.8 5.7 5.6 1 0.1 1 10 1 100 FREQUENCY (kHz) FIGURE 25. INPUT NOISE CHARACTERISTICS 10 3.5 4 4.5 5 5.5 6 6.5 7 7.5 POWER SUPPLY VOLTAGE (±V) FIGURE 26. SUPPLY CURRENT vs SUPPLY VOLTAGE HFA1105 Die Characteristics DIE DIMENSIONS: PASSIVATION: 59 mils x 59 mils x 19 mils 1500µm x 1500µm x 483µm Type: Nitride Thickness: 4kÅ ±0.5kÅ METALLIZATION: TRANSISTOR COUNT: Type: Metal 1: AICu(2%)/TiW Thickness: Metal 1: 8kÅ ±0.4kÅ 75 SUBSTRATE POTENTIAL (Powered Up): Type: Metal 2: AICu(2%) Thickness: Metal 2: 16kÅ ±0.8kÅ Floating (Recommend Connection to V-) Metallization Mask Layout HFA1105 NC -IN V+ OUT +IN V- NC All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 11