NSB12ANT3G 600 Watt Peak Power Zener Transient Voltage Suppressor Unidirectional http://onsemi.com The NSB12ANT3G is designed to protect voltage sensitive components from high voltage, high energy transients. This device has excellent clamping capability, high surge capability, low zener impedance and fast response time. The NSB12ANT3G is ideally suited for use in computer hard disk drives, communication systems, automotive, numerical controls, process controls, medical equipment, business machines, power supplies, and many other industrial/ consumer applications. PLASTIC SURFACE MOUNT ZENER OVERVOLTAGE TRANSIENT SUPPRESSOR 600 WATT PEAK POWER Specification Features: •Working Peak Reverse Voltage Range - 12 V •Peak Power - 600 Watts @ 1 ms at Maximum Clamp Voltage @ Cathode Anode Peak Pulse Current •ESD Rating of Class 3 (> 16 kV) per Human Body Model •ESD Rating IEC 61000-4-2 Level 4 (> 30 kV) •Low Leakage < 5 mA at 12 V •UL 497B for Isolated Loop Circuit Protection •Response Time is Typically < 1 ns •Pb-Free Package is Available SMB CASE 403A PLASTIC MARKING DIAGRAM Mechanical Characteristics: CASE: Void‐free, transfer‐molded, thermosetting plastic FINISH: All external surfaces are corrosion resistant and leads are AYWW LEKG G readily Solderable MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES: 260°C for 10 Seconds LEADS: Modified L-Bend providing more contact area to bond pads POLARITY: Cathode indicated by polarity band MOUNTING POSITION: Any MAXIMUM RATINGS A Y WW LEK G = Assembly Location = Year = Work Week = Specific Device Code = Pb-Free Package (Note: Microdot may be in either location) Please See the Table on the Following Page ORDERING INFORMATION Device NSB12ANT3G Package Shipping† SMB (Pb-Free) 2500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2007 December, 2007 - Rev. 0 1 Publication Order Number: NSB12AN/D NSB12ANT3G MAXIMUM RATINGS Symbol Value Unit Peak Power Dissipation (Note 1) @ TL = 25°C, Pulse Width = 1 ms Rating PPK 600 W DC Power Dissipation @ TL = 75°C Measured Zero Lead Length (Note 2) Derate Above 75°C Thermal Resistance from Junction to Lead PD 3.0 W RqJL 40 25 mW/°C °C/W RqJA 0.55 4.4 226 W mW/°C °C/W TJ, Tstg -65 to +150 °C DC Power Dissipation (Note 3) @ TA = 25°C Derate Above 25°C Thermal Resistance from Junction to Ambient PD Operating and Storage Temperature Range Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. 10 X 1000 ms, non-repetitive at maximum IPPM and VCM, see electrical characteristics. 2. 1″ square copper pad, FR-4 board 3. FR-4 board, using ON Semiconductor minimum recommended footprint, as shown in 403A case outline dimensions spec. ELECTRICAL CHARACTERISTICS I (TA = 25°C unless otherwise noted) IPP Maximum Reverse Peak Pulse Current VC Clamping Voltage @ IPP VRWM IR VBR IF Parameter Symbol VC VBR VRWM Working Peak Reverse Voltage V IR VF IT Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT IT Test Current IF Forward Current VF Forward Voltage @ IF IPP Uni-Directional TVS ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Zener Voltage (Note 5) Reverse Leakage Current Clamping Voltage Forward Peak Voltage Conditions Symbol Min Typ Max Unit IT = 1 mA VBR 13.2 13.75 14.3 V VRWM = 12 V IR 5.0 mA IPPM = 30.2 A (Per Figure 1, Note 6) VCM 19.9 V IF = 30 A (Note 4) VF 3.5 V 4. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, non-repetitive duty cycle. 5. VZ measured at pulse test IT at an ambient temperature of 25°C. 6. Absolute Maximum Peak Current, IPPM. http://onsemi.com 2 NSB12ANT3G tr≤ 10 ms 100 VALUE (%) PEAK VALUE - IPP HALF VALUE 50 IPP 2 tP 0 0 1 2 3 160 PEAK PULSE DERATING IN % OF PEAK POWER OR CURRENT @ TA = 25° C PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAYS TO 50% OF IPP. 140 120 100 80 60 40 20 0 4 0 25 50 75 100 t, TIME (ms) TA, AMBIENT TEMPERATURE (°C) Figure 1. 10 × 1000 ms Pulse Waveform Figure 2. Pulse Derating Curve TYPICAL PROTECTION CIRCUIT Zin LOAD Vin http://onsemi.com 3 VL 125 150 NSB12ANT3G APPLICATION NOTES RESPONSE TIME a very good response time, typically < 1 ns and negligible inductance. However, external inductive effects could produce unacceptable overshoot. Proper circuit layout, minimum lead lengths and placing the suppressor device as close as possible to the equipment or components to be protected will minimize this overshoot. Some input impedance represented by Zin is essential to prevent overstress of the protection device. This impedance should be as high as possible, without restricting the circuit operation. In most applications, the transient suppressor device is placed in parallel with the equipment or component to be protected. In this situation, there is a time delay associated with the capacitance of the device and an overshoot condition associated with the inductance of the device and the inductance of the connection method. The capacitive effect is of minor importance in the parallel protection scheme because it only produces a time delay in the transition from the operating voltage to the clamp voltage as shown in Figure 3. The inductive effects in the device are due to actual turn‐on time (time required for the device to go from zero current to full current) and lead inductance. This inductive effect produces an overshoot in the voltage across the equipment or component being protected as shown in Figure 4. Minimizing this overshoot is very important in the application, since the main purpose for adding a transient suppressor is to clamp voltage spikes. The SMB series have V DUTY CYCLE DERATING If the duty cycle increases, the peak power must be reduced as indicated by the curves of Figure 5. Average power must be derated as the lead or ambient temperature rises above 25°C. The average power derating curve normally given on data sheets may be normalized and used for this purpose. V Vin (TRANSIENT) OVERSHOOT DUE TO INDUCTIVE EFFECTS Vin (TRANSIENT) VL VL Vin td tD = TIME DELAY DUE TO CAPACITIVE EFFECT t t Figure 3. Figure 4. 1 0.7 DERATING FACTOR 0.5 0.3 0.2 PULSE WIDTH 10 ms 0.1 0.07 0.05 1 ms 0.03 100 ms 0.02 10 ms 0.01 0.1 0.2 0.5 1 2 5 10 D, DUTY CYCLE (%) 20 50 100 Figure 5. Typical Derating Factor for Duty Cycle http://onsemi.com 4 NSB12ANT3G UL RECOGNITION including Strike Voltage Breakdown test, Endurance Conditioning, Temperature test, Dielectric Voltage‐Withstand test, Discharge test and several more. Whereas, some competitors have only passed a flammability test for the package material, we have been recognized for much more to be included in their Protector category. The entire series has Underwriters Laboratory Recognition for the classification of protectors (QVGV2) under the UL standard for safety 497B and File #116110. Many competitors only have one or two devices recognized or have recognition in a non‐protective category. Some competitors have no recognition at all. With the UL497B recognition, our parts successfully passed several tests http://onsemi.com 5 NSB12ANT3G PACKAGE DIMENSIONS SMB CASE 403A-03 ISSUE F HE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. D DIMENSION SHALL BE MEASURED WITHIN DIMENSION P. E b DIM A A1 b c D E HE L L1 D MIN 1.90 0.05 1.96 0.15 3.30 4.06 5.21 0.76 MILLIMETERS NOM MAX 2.13 2.45 0.10 0.20 2.03 2.20 0.23 0.31 3.56 3.95 4.32 4.60 5.44 5.60 1.02 1.60 0.51 REF MIN 0.075 0.002 0.077 0.006 0.130 0.160 0.205 0.030 INCHES NOM 0.084 0.004 0.080 0.009 0.140 0.170 0.214 0.040 0.020 REF MAX 0.096 0.008 0.087 0.012 0.156 0.181 0.220 0.063 A L L1 A1 c SOLDERING FOOTPRINT* 2.261 0.089 2.743 0.108 2.159 0.085 SCALE 8:1 mm Ǔ ǒinches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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