CYStech Electronics Corp. ESD protected N-CHANNEL MOSFET MTNK3S3 BVDSS ID RDSON Spec. No. : C447S3 Issued Date : 2009.04.29 Revised Date : 2010.06.18 Page No. : 1/6 20V 100mA 3Ω Description • Low voltage drive, 1.8V • Easy to use in parallel • High speed switching • ESD protected device • Pb-free package Symbol Outline MTNK3S3 SOT-323 D G：Gate S：Source D：Drain G S Absolute Maximum Ratings (Ta=25°C) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current (Ta=25°C) Total Power Dissipation (Ta=25°C) Total Power Dissipation (Tc=25°C) ESD susceptibility Operating Junction and Storage Temperature Range Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case Lead Temperature, for 10 second Soldering Symbol BVDSS VGS ID IDM PD Tj Rth,ja Rth,jc TL Limits 20 ±8 100 400 *1 200 400 350 *2 -55~+150 625 250 260 Unit V V mA mA mW V °C °C/W °C/W °C Note : *1. Pulse Width ≤ 300μs, Duty cycle ≤2% *2. Human body model, 1.5kΩ in series with 100pF MTNK3S3 CYStek Product Specification Spec. No. : C447S3 Issued Date : 2009.04.29 Revised Date : 2010.06.18 Page No. : 2/6 CYStech Electronics Corp. Electrical Characteristics (Ta=25°C) Symbol Static BVDSS VGS(th) IGSS IDSS RDS(ON) Min. Typ. Max. Unit 20 0.5 100 1.7 3.5 - 1.0 ±1 500 3 6 - V V μA nA 23 7.7 5.8 - GFS Dynamic Ciss Coss Crss Source-Drain Diode *VSD - Test Conditions mS VGS=0, ID=100μA VDS=VGS, ID=250μA VGS=±8V, VDS=0 VDS=20V, VGS=0 VGS=4.5V, ID=100mA VGS=1.8V, ID=20mA VDS=5V, ID=100mA 50 25 5 pF VDS=10V, VGS=0, f=1MHz 1 V VGS=0V, IS=10mA Ω *Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% Ordering Information Device MTNK3S3 Package SOT-323 (Pb-free) Shipping Marking 3000 pcs / Tape & Reel 22 Characteristic Curves Typical Output Characteristics Typical Transfer Characteristics 0.8 0.7 Drain Current - ID(A) 0.5 4.5V 0.7 4.0V 3.5V 0.6 Drain Current -ID(A) 5V 0.6 3V 0.4 2.5V 0.3 2.0V 0.2 1.8V VGS=1.5V 0.1 VDS=3V 0.5 0.4 0.3 0.2 0.1 0 0 0 MTNK3S3 1 2 3 Drain-Source Voltage -VDS(V) 4 0 1 2 3 4 Gate-Source Voltage-VGS(V) 5 6 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C447S3 Issued Date : 2009.04.29 Revised Date : 2010.06.18 Page No. : 3/6 Characteristic Curves(Cont.) Static Drain-Source On-State Resistance vs Gate-Source Voltage Static Drain-Source On-State resistance vs Drain Current 10 Static Drain-Source On-State Resistance-RDS(ON)(Ω) Static Drain-Source On-State Resistance-RDS(on)(Ω) 7 VGS=1.8V VGS=4.5V 1 0.001 6 5 ID=100mA 4 3 2 ID=20mA 1 0 0.01 0.1 Drain Current-ID(A) 0 1 Reverse Drain Current vs Source-Drain Voltage 4 6 8 Gate-Source Voltage-VGS(V) 10 Capacitance vs Drain-to-Source Voltage 1 100 0.9 0.8 Capacitance---(pF) Source-Drain Voltage-VSD(V) 2 0.7 0.6 0.5 0.4 Ciss C oss 10 Crss 0.3 0.2 1 0.1 0 0.1 0.2 0.3 Reverse Drain Current -IDR(A) 0.4 0.1 1 10 Drain-Source Voltage -VDS(V) 100 Power Derating Curve Power Derating Curve 450 250 Power Dissipation---PD(mW) Power Dissipation---PD(mW) 400 200 150 100 50 350 300 250 200 150 100 50 0 0 0 MTNK3S3 50 100 150 Ambient Temperature---TA(℃) 200 0 50 100 150 200 Case Temperature---TC(℃) CYStek Product Specification CYStech Electronics Corp. Spec. No. : C447S3 Issued Date : 2009.04.29 Revised Date : 2010.06.18 Page No. : 4/6 Reel Dimension Carrier Tape Dimension MTNK3S3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C447S3 Issued Date : 2009.04.29 Revised Date : 2010.06.18 Page No. : 5/6 Recommended wave soldering condition Product Pb-free devices Peak Temperature 260 +0/-5 °C Soldering Time 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Average ramp-up rate (Tsmax to Tp) Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) Time maintained above: −Temperature (TL) − Time (tL) Peak Temperature(TP) Time within 5°C of actual peak temperature(tp) Ramp down rate Time 25 °C to peak temperature Sn-Pb eutectic Assembly Pb-free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 240 +0/-5 °C 217°C 60-150 seconds 260 +0/-5 °C 10-30 seconds 20-40 seconds 6°C/second max. 6 minutes max. 6°C/second max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface. MTNK3S3 CYStek Product Specification Spec. No. : C447S3 Issued Date : 2009.04.29 Revised Date : 2010.06.18 Page No. : 6/6 CYStech Electronics Corp. SOT-323 Dimension Marking: 3 A Q A1 1 C TE 22 Lp 2 detail Z bp e1 W B e E D A Z θ He 0 v A 3-Lead SOT-323 Plastic Surface Mounted Package CYStek Package Code: S3 2 mm 1 scale Style: Pin 1.Gate 2.Source 3.Drain Inches Min. Max. 0.0315 0.0433 0.0000 0.0039 0.0118 0.0157 0.0039 0.0098 0.0709 0.0866 0.0453 0.0531 0.0512 - DIM A A1 bp C D E e Millimeters Min. Max. 0.80 1.10 0.00 0.10 0.30 0.40 0.10 0.25 1.80 2.20 1.15 1.35 1.3 - DIM e1 He Lp Q v w θ Inches Min. Max. 0.0256 0.0787 0.0886 0.0059 0.0177 0.0051 0.0091 0.0079 0.0079 - Millimeters Min. Max. 0.65 2.00 2.25 0.15 0.45 0.13 0.23 0.2 0.2 10° 0° Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: • Lead: 42 Alloy ; pure tin plated • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0 Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. MTNK3S3 CYStek Product Specification