IRF IRFAG50 Simple drive requirement Datasheet

PD - 90582
IRFAG50
1000V, N-CHANNEL
REPETITIVE AVALANCHE AND dv/dt RATED

HEXFET TRANSISTORS
THRU-HOLE (TO-204AA/AE)
Product Summary
Part Number
IRFAG50
BVDSS
1000V
RDS(on)
2.0Ω
ID
5.6Α

The HEXFET technology is the key to International
Rectifier’s advanced line of power MOSFET transistors.
The efficient geometry and unique processing of this latest
“State of the Art” design achieves: very low on-state resistance combined with high transconductance; superior reverse energy and diode recovery dv/dt capability.
The HEXFET transistors also feature all of the well established advantages of MOSFETs such as voltage control,
very fast switching, ease of paralleling and temperature
stability of the electrical parameters.
They are well suited for applications such as switching
power supplies, motor controls, inverters, choppers, audio
amplifiers and high energy pulse circuits.
TO-3
Features:
n
n
n
n
n
Repetitive Avalanche Ratings
Dynamic dv/dt Rating
Hermetically Sealed
Simple Drive Requirements
Ease of Paralleling
Absolute Maximum Ratings
Parameter
ID @ VGS = 0V, TC = 25°C
ID @ VGS = 0V, TC = 100°C
I DM
PD @ TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
T STG
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current ➀
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy ➁
Avalanche Current ➀
Repetitive Avalanche Energy ➀
Peak Diode Recovery dv/dt ➂
Operating Junction
Storage Temperature Range
Lead Temperature
Weight
Units
5.6
3.5
22
150
1.2
±20
860
5.6
15
1.0
-55 to 150
A
W
W/°C
V
mJ
A
mJ
V/ns
o
300 (0.063 in. (1.6mm) from case for 10s)
11.5(typical)
C
g
For footnotes refer to the last page
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1
01/24//01
IRFAG50
Electrical Characteristics
BVDSS
∆BV DSS/∆TJ
@ Tj = 25°C (Unless Otherwise Specified)
Parameter
Min
Drain-to-Source Breakdown Voltage
1000
Typ Max Units
—
—
V
—
1.4
—
V/°C
—
—
2.0
5.2
—
—
—
—
—
—
—
—
2.0
2.3
4.0
—
25
250
Ω
VGS(th)
gfs
IDSS
Temperature Coefficient of Breakdown
Voltage
Static Drain-to-Source On-State
Resistance
Gate Threshold Voltage
Forward Transconductance
Zero Gate Voltage Drain Current
IGSS
I GSS
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
LS + LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
—
—
88
8.8
48
—
—
—
—
—
—
—
—
—
—
—
—
—
—
6.1
100
-100
200
20
110
30
44
210
60
—
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
2400
240
80
—
—
nC
VGS =10V, ID =3.5A➃
VGS = 10V, ID =5.6A ➃
VDS = VGS, ID =250mA
VDS > 15V, IDS =3.5A ➃
VDS=800V, VGS=0V
VDS =800V
VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
VGS= 10V, ID=5.6A
VDS =500V
ns
VDD =400V*, ID =5.6A,
RG =2.35Ω
V
S( )
Ω
RDS(on)
Test Conditions
VGS = 0V, ID = 1.0mA
Reference to 25°C, ID = 1.0mA
µA
nA
nH
Measured from drain lead (6mm/0.25in. from
package) to source lead (6mm/0.25in. from
package)
pF
VGS = 0V, VDS = 25V
f = 1.0MHz
*Equipment Limitation
Source-Drain Diode Ratings and Characteristics
Parameter
Min Typ Max Units
IS
ISM
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode) ➀
—
—
—
—
5.6
22
A
VSD
t rr
QRR
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
—
—
—
—
—
—
1.8
1200
8.4
V
nS
µC
ton
Forward Turn-On Time
Test Conditions
Tj = 25°C, IS =5.6A, VGS = 0V ➃
Tj = 25°C, IF =5.6A, di/dt ≤ 100A/µs
VDD ≤ 50V ➃
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC
R thJA
Junction to Case
Junction to Ambient
Min Typ Max Units
—
—
—
—
0.83
30
°C/W
Test Conditions
Typical socket mount
For footnotes refer to the last page
2
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IRFAG50
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
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Fig 2. Typical Output Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFAG50
13 a& b
4
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
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IRFAG50
V DS
VGS
RD
D.U.T.
RG
+
-V DD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
VDS
90%
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFAG50
1 5V
L
VD S
D .U .T
RG
IA S
10V
20V
D R IV E R
+
V
- DD
A
0 .0 1 Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D S S
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Current Regulator
Same Type as D.U.T.
Fig 12b. Unclamped Inductive Waveforms
50KΩ
QG
12V
.2µF
.3µF
10 V
QGS
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
D.U.T.
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFAG50
Foot Notes:
➀ Repetitive Rating; Pulse width limited by
maximum junction temperature.
➁ VDD = 50V, starting TJ = 25°C,
Peak IL = 5.6A,
➂ ISD ≤ 5.6A, di/dt ≤ 120A/µs,
VDD≤ 1000V, TJ ≤ 150°C
Suggested RG =2.35 Ω
➃ Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
Case Outline and Dimensions —TO-204AA (Modified TO-3)
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
IR EUROPEAN REGIONAL CENTRE: 439/445 Godstone Rd, Whyteleafe, Surrey CR3 OBL, UK Tel: ++ 44 (0)20 8645 8000
IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 (0) 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 011 451 0111
IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo 171 Tel: 81 (0)3 3983 0086
IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 (0)838 4630
IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673 Tel: 886-(0)2 2377 9936
Data and specifications subject to change without notice. 1/01
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