INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4512B MSI 8-input multiplexer with 3-state output Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification HEF4512B MSI 8-input multiplexer with 3-state output to interface directly with bus oriented systems (3-state). When the active LOW enable (E) is HIGH, it forces the output LOW provided EO is LOW. By proper manipulation of the inputs, the device can provide any logic functions of four variables. It cannot be used to multiplex analogue signals. DESCRIPTION The HEF4512B is an 8-input multiplexer with 8 binary inputs (I0 to I7), an enable input (E) and an output enable input (EO). One of eight binary inputs is selected by select inputs S0, S1 and S2, and is routed to the output O. A HIGH on EO causes O to assume a high impedance OFF-state, regardless of other input conditions. This allows the output Fig.2 Pinning diagram. HEF4512BP(N): 16-lead DIL; plastic (SOT38-1) HEF4512BD(F): 16-lead DIL; ceramic (cerdip) HEF4512BT(D): 16-lead SO; plastic (SOT74) (SOT109-1) Fig.1 Functional diagram. ( ): Package Designator North America PINNING S0, S1, S2 select inputs EO output enable (active LOW) E enable (active LOW) I0 to I7 multiplexer inputs O multiplexer output FAMILY DATA, IDD LIMITS category MSI See Family Specifications January 1995 2 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... Philips Semiconductors 3 8-input multiplexer with 3-state output January 1995 Product specification HEF4512B MSI Fig.3 Logic diagram. Philips Semiconductors Product specification HEF4512B MSI 8-input multiplexer with 3-state output TRUTH TABLE INPUTS OUTPUT EO E S2 S1 S0 I0 I1 I2 I3 I4 I5 I6 I7 O L H X X X X X X X X X X X L L L L L L L X X X X X X X L L L L L L H X X X X X X X H L L L L H X L X X X X X X L L L L L H X H X X X X X X H L L L H L X X L X X X X X L L L L H L X X H X X X X X H L L L H H X X X L X X X X L L L L H H X X X H X X X X H L L H L L X X X X L X X X L L L H L L X X X X H X X X H L L H L H X X X X X L X X L L L H L H X X X X X H X X H L L H H L X X X X X X L X L L L H H L X X X X X X H X H L L H H H X X X X X X X L L L L H H H X X X X X X X H H H X X X X X X X X X X X X Z Notes 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state is immaterial Z = high impedance OFF-state AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; input transition times ≤ 20 ns VDD V Dynamic power 5 TYPICAL FORMULA FOR P (µW) 500 fi + ∑ (foCL) × VDD2 dissipation per 10 2100 fi + ∑ (foCL) × VDD package (P) 15 5800 fi + ∑ (foCL) × VDD2 2 where fi = input freq. (MHz) fo = output freq. (MHz) CL = load capacitance (pF) ∑ (foCL) = sum of outputs VDD = supply voltage (V) January 1995 4 Philips Semiconductors Product specification HEF4512B MSI 8-input multiplexer with 3-state output AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD V SYMBOL TYP. TYPICAL EXTRAPOLATION FORMULA MAX. Propagation delays In → O HIGH to LOW 100 200 ns 73 ns + (0,55 ns/pF) CL 40 80 ns 29 ns + (0,23 ns/pF) CL 30 60 ns 22 ns + (0,16 ns/pF) CL 100 200 ns 73 ns + (0,55 ns/pF) CL 40 80 ns 29 ns + (0,23 ns/pF) CL 30 60 ns 22 ns + (0,16 ns/pF) CL 140 280 ns 113 ns + (0,55 ns/pF) CL 55 110 ns 44 ns + (0,23 ns/pF) CL 40 80 ns 32 ns + (0,16 ns/pF) CL 150 300 ns 123 ns + (0,55 ns/pF) CL 60 120 ns 49 ns + (0,23 ns/pF) CL 40 80 ns 32 ns + (0,16 ns/pF) CL 60 120 ns 33 ns + (0,55 ns/pF) CL 25 50 ns 14 ns + (0,23 ns/pF) CL 15 20 40 ns 12 ns + (0,16 ns/pF) CL 5 55 110 ns 28 ns + (0,55 ns/pF) CL 5 10 tPHL 15 5 LOW to HIGH 10 tPLH 15 Sn → O HIGH to LOW 5 10 tPHL 15 5 LOW to HIGH 10 tPLH 15 E→O HIGH to LOW LOW to HIGH Output transition times HIGH to LOW 5 10 tPHL 25 50 ns 14 ns + (0,23 ns/pF) CL 15 20 40 ns 12 ns + (0,16 ns/pF) CL 5 60 120 ns 10 ns + (1,0 ns/pF) CL 10 tPLH 30 60 ns 9 ns + (0,42 ns/pF) CL 15 20 40 ns 6 ns + (0,28 ns/pF) CL 5 60 120 ns 10 ns + (1,0 ns/pf) CL 10 tTHL 30 60 ns 9 ns + (0,42 ns/pF) CL 15 20 40 ns 6 ns + (0,28 ns/pF) CL EO → O 5 35 70 ns HIGH 10 20 40 ns LOW to HIGH 10 tTLH 3-state propagation delays Output disable times tPHZ 15 15 30 ns 5 35 70 ns 15 30 ns 15 10 20 ns EO → O 5 35 70 ns HIGH 10 15 30 ns 10 20 ns LOW 10 tPLZ Output enable times 15 January 1995 tPZH 5 Philips Semiconductors Product specification HEF4512B MSI 8-input multiplexer with 3-state output VDD V SYMBOL 5 LOW 10 tPZL 15 TYP. 35 70 ns 20 40 ns 15 30 ns APPLICATION INFORMATION Some examples of applications for the HEF4512B are: • Signal gating • Digital multiplexing • Number sequence generation January 1995 TYPICAL EXTRAPOLATION FORMULA MAX. 6 Philips Semiconductors Product specification HEF4512B MSI 8-input multiplexer with 3-state output TRUTH TABLE for Fig. 4 A3 A2 A1 L L L L L 0 L L L L H 1 L L L H L 2 L L L H H 3 L L H L L 4 L L H L H 5 L L H H L 6 L L H H H 7 L H L L L 8 L H L L H 9 L H L H L 10 L H L H H 11 L H H L L 12 L H H L H 13 L H H H L 14 L H H H H 15 H L L L L 16 H L L L H 17 H L L H L 18 H L L H H 19 H L H L L 20 H L H L H 21 H L H H L 22 H L H H H 23 H H L L L 24 H H L L H 25 H H L H L 26 H H L H H 27 H H H L L 28 H H H L H 29 H H H H L 30 H H H H H 31 January 1995 A0 INPUT CONN. TO OUTPUT A4 via IC 0 via IC 1 via IC 2 via IC 3 Fig.4 7 32-input multiplexer using 4 × HEF4512B and 1 × HEF4011B. The input is selected by 5-bit address (A4 to A0) and presented at the output.