LTC4070 Li-Ion/Polymer Shunt Battery Charger System FEATURES DESCRIPTION n The LTC®4070 allows simple charging of Li-Ion/Polymer batteries from very low current, intermittent or continuous charging sources. The 450nA to 50mA operating current makes charging possible from previously unusable sources. With the addition of an external pass device, shunt current may be boosted to 500mA. Stacked cell high voltage battery packs are inherently balanced with shunt charging. With its low operating current, the LTC4070 is well suited to charge thin film batteries in energy harvesting applications where charging sources may be intermittent or very low power. The unique architecture of the LTC4070 allows for an extremely simple battery charger solution; requiring just one external resistor. n n n n n n n n Low Operating Current (450nA) 1% Float Voltage Accuracy Over Full Temperature and Shunt Current Range 50mA Maximum Internal Shunt Current (500mA with External PFET) Pin Selectable Float Voltage Options: 4.0V, 4.1V, 4.2V Ultralow Power Pulsed NTC Float Conditioning for Li-Ion/Polymer Protection Suitable for Intermittent, Continuous and Very Low Power Charging Sources Low and High Battery Status Outputs Simple Low Voltage Load Disconnect Application Thermally Enhanced, Low Profile (0.75mm) 8-Lead (2mm × 3mm) DFN and MSOP Packages APPLICATIONS n n n n n n Low Power Li-Ion/Polymer Battery Back-Up Solar Power Systems with Back-Up Memory Back-Up Embedded Automotive Thin Film Batteries Energy Scavenging/Harvesting L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.. The LTC4070 offers a pin selectable float voltage with 1% accuracy across the full range of operating temperature and shunt current. The integrated thermal battery qualifier extends battery lifetime and improves reliability by automatically reducing the battery float voltage at NTC thermistor temperatures above 40°C. The LTC4070 also provides both low and high battery status outputs. With the addition of an external PFET, the low-battery output pin can implement a latch-off function that automatically disconnects the system load from the battery to protect the battery from deep discharge. The device is offered in two thermally enhanced packages, a compact low profile (0.75mm) 8-lead (2mm × 3mm) DFN and an 8-lead MSOP package. TYPICAL APPLICATION NTC Overtemperature Battery Float Voltage Qualifying Simple Shunt Charger with Load Disconnect and NTC Conditioning VIN 4.3 ADJ = VCC 4.2 RIN Q1:FDR8508 ADJ VF (V) VCC LBO NTCBIAS LTC4070 NTC T ADJ = GND 4.0 3.9 10k GND ADJ = FLOAT 4.1 + 3.8 Li-Ion 3.7 0 NTHS0805E3103LT 4070 TA01a 20 40 60 TEMPERATURE (°C) 80 100 4070 TA01b 4070f 1 LTC4070 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) ICC ....................................................................... ±60mA ADJ, NTC, NTCBIAS, DRV, LBO, HBO Voltages .......................................... –0.3V to VCC + 0.3V Operating Junction Temperature Range.. –40°C to 125°C Maximum Junction Temperature ......................... 125°C Storage Temperature Range .................. –65°C to 150°C Peak Reflow Temperature ..................................... 260°C PIN CONFIGURATION TOP VIEW TOP VIEW NTCBIAS 1 NTC 2 ADJ 3 9 HBO 4 8 VCC 7 DRV 6 LBO 5 GND NTCBIAS NTC ADJ HBO 1 2 3 4 9 8 7 6 5 VCC DRV LBO GND MS8E PACKAGE 8-LEAD PLASTIC MSOP DDB PACKAGE 8-LEAD (3mm s 2mm) PLASTIC DFN TJMAX = 125°C, θJA = 40°C/W EXPOSED PAD (PIN 9) IS NOT INTERNALLY CONNECTED, MUST BE SOLDERED TO PCB, GND TO OBTAIN θJA TJMAX = 125°C, θJA = 76°C/W EXPOSED PAD (PIN 9) IS NOT INTERNALLY CONNECTED, MUST BE SOLDERED TO PCB, GND TO OBTAIN θJA ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC4070EDDB#PBF LTC4070EDDB#TRPBF LFPD 8-Lead (3mm × 2mm) Plastic DFN –40°C to 85°C LTC4070IDDB#PBF LTC4070IDDB#TRPBF LFPD 8-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C LTC4070EMS8E#PBF LTC4070EMS8E#TRPBF LTFMT 8-Lead Plastic MSOP –40°C to 85°C LTC4070IMS8E#PBF LTC4070IMS8E#TRPBF LTFMT 8-Lead Plastic MSOP –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction temperature range. VNTC = VCC, TJ = 25°C unless otherwise specified. Current into a pin is positive and current out of a pin is negative. All voltages are referenced to GND unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VFLOAT Programmable Float Voltage 10μA ≤ ICC ≤ 50mA VADJ = 0V VADJ = Float VADJ = VCC l l l 3.96 4.06 4.16 4.0 4.1 4.2 4.04 4.14 4.24 V V V ICCMAX Maximum Shunt Current VCC > VFLOAT l ICCQ 50 VCC Operating Current VHBO Low l 450 1040 ICCQLB Low Bat VCC Operating Current VCC = 3.1V mA 300 nA nA 4070f 2 LTC4070 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction temperature range. VNTC = VCC, TJ = 25°C unless otherwise specified. Current into a pin is positive and current out of a pin is negative. All voltages are referenced to GND unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX 40 60 UNITS High Battery Status VHBTH HBO Threshold (VFLOAT – VCC) VHBHY Hysteresis l VCC Rising 15 mV 100 mV Low Battery Status VLBTH LBO Threshold VLBHY Hysteresis l VCC Falling 3.08 3.2 3.34 V 220 290 350 mV 0.5 V Status Outputs HBO/LBO VOL CMOS Output Low ISINK = 1mA, VCC = 3.7V l VOH CMOS Output High VLBO: VCC = 3.1V, ISOURCE = –100μA VHBO: ICC = 1.5mA, ISOURCE = –500μA l Input Logic Low Level l Input Logic High Level l VCC – 0.6 V 3-State Selection Input: ADJ VADJ IADJ(Z) ADJ Input Level 0.3 V l Allowable ADJ Leakage Current in Floating State V VCC – 0.3 ±3 μA 50 nA NTC INTC NTC Leakage Current 0V< NTC < VCC INTCBIAS Average NTCBIAS Sink Current Pulsed Duty Cycle < 0.002% ΔVFLOAT(NTC) Delta Float Voltage per NTC Comparator Step ICC = 1mA, NTC Falling Below One of the NTCTH Thresholds ADJ = 0V ADJ = Float ADJ = VCC NTCTH1 VNTC as % of VNTCBIAS Amplitude 0 30 pA –50 –75 –100 mV mV mV 35.5 36.5 37.5 % NTCTH2 28.0 29.0 30.0 % NTCTH3 21.8 22.8 23.8 % NTCTH4 16.8 17.8 18.8 % NTCHY NTC Comparator Falling Thresholds –50 Hysteresis 30 mV Drive Output IDRV(SOURCE) DRV Output Source Current VCC = 3.1V, VDRV = 0V –1 mA IDRV(SINK) DRV Output Sink Current ICC = 1mA, RDRV = 475k (Note 3) 3 μA Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC4070E is guaranteed to meet performance specifications for junction temperatures from 0°C to 85°C. Specifications over the –40°C to 85°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC4070I is guaranteed over the full –40°C to 125°C operating junction temperature range. Note that the maximum ambient temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. Note 3: The IDRV(SNK) current is tested by pulling the DRV pin up to VCC through a 475k resistor, RDRV. Pulling the DRV pin up to VCC with low impedance disables the regulator. 4070f 3 LTC4070 TYPICAL PERFORMANCE CHARACTERISTICS Load Regulation ΔVFLOAT vs ICC Battery Discharge ICC vs VCC ADJ = GND 4.30 9 4.25 800 8 700 7 $VFLOAT (mV) ICC (nA) 900 600 500 400 FALLING 300 RISING 6 5 4 0 2 3 0 4 0 10 4070 G01 30 40 ICC (mA) 50 60 80 700 70 600 500 400 20 100 10 4070 G03 VHBHY vs Temperature (ADJ = VCC) 150 50 –25 0 25 50 75 TEMPERATURE (°C) 100 4070 G04 0 –50 125 –25 0 25 50 75 TEMPERATURE (°C) 4070 G05 VFLOAT vs NTC Temperature, ICC = 1mA 100 125 4070 G06 VLBTH VCC Falling vs Temperature 4.3 125 100 0 –50 125 100 200 40 200 VLBHY vs Temperature 3.250 320 3.245 ADJ = VCC 3.240 ADJ = FLOAT 280 3.230 VLBHY (V) VLBTH (V) 3.9 3.225 3.220 3.210 260 ADJ = GND 240 ADJ = GND 3.215 3.8 ADJ = VCC 300 ADJ = FLOAT 3.235 ADJ = GND 4.0 0 25 50 75 TEMPERATURE (°C) 250 50 30 4.1 –25 300 60 300 4.2 ADJ = GND 3.90 –50 VHBHY (mV) 90 800 VHBTH (mV) 900 ICCQ (nA) 100 100 20 VHBTH VCC Rising vs Temperature (ADJ = VCC) 1000 0 25 50 75 TEMPERATURE (°C) 4.05 4070 G02 ICCQ vs Temperature (ADJ = VCC) –25 ADJ = FLOAT 4.10 3.95 VCC (V) 0 –50 4.15 4.00 1 1 ADJ = VCC 2 100 0 NO NTC 4.20 3 200 VFLOAT (V) VFLOAT vs Temperature, ICC = 1mA 10 VFLOAT (V) 1000 TA = 25°C, unless otherwise noted. ADJ = VCC ADJ = FLOAT 220 3.205 3.7 0 20 60 40 TEMPERATURE (°C) 80 100 4070 G07 3.200 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 4070 G08 200 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 4070 G09 4070f 4 LTC4070 TYPICAL PERFORMANCE CHARACTERISTICS VOH LBO/HBO vs ISOURCE VOL LBO/HBO vs ISINK 2.5 2.5 2.0 VCC = 3.7V 2.0 LBO VCC = 3.1V 1.5 HBO VCC = VF – 25m VOL (V) VCC – VOH (V) TA = 25°C, unless otherwise noted. 1.5 1.0 1.0 0.5 0.5 0 0 0 0.5 1.0 1.5 2.0 ISOURCE (mA) 2.5 0 3.0 2 4070 G10 35 CC = 10μF, ICC = 1mA, 1Hz Res Bandwidth, Noise = 1.0452mVRMS from 10Hz to 100kHz PSD (μVRMS/√Hz) 30 CH4 = IIN (10mA/DIV) CH1 = VIN (2V/DIV) 25 8 10 4070 G11 Hot Plug Transient, CC = 330μF, RIN = 81Ω Power Spectral Density 4 6 ISINK (mA) Step Response with 800mAHr Battery, RIN = 81Ω CH4 = IIN (10mA/DIV) CH1 = VIN (2V/DIV) 20 CH2 = VCC (2V/DIV) 15 10 CH2 = VCC (2V/DIV) CH3 = VHBO (2V/DIV) CH3 = VHBO (2V/DIV) 5 0 0 1 10 100 1000 10000 100000 FREQUENCY (Hz) 4ms/DIV 4070 G13 400ns/DIV 4070 G14 4070 G12 4070f 5 LTC4070 PIN FUNCTIONS NTCBIAS (Pin 1): NTC Bias Pin. Connect a resistor from NTCBIAS to NTC, and a thermistor from NTC to GND. Float NTCBIAS when not in use. Minimize parasitic capacitance on this pin. NTC (Pin 2): Input to the Negative Temperature Coefficient Thermistor Monitoring Circuit. The NTC pin connects to a negative temperature coefficient thermistor which is typically co-packaged with the battery to determine the temperature of the battery. If the battery temperature is too high, the float voltage is reduced. Connect a low drift bias resistor from NTCBIAS to NTC and a thermistor from NTC to GND. When not in use, connect NTC to VCC. Minimize parasitic capacitance on this pin. ADJ (Pin 3): Float Voltage Adjust Pin. Connect ADJ to GND to program 4.0V float voltage. Disconnect ADJ to program 4.1V float voltage. Connect ADJ to VCC to program 4.2V float voltage. The float voltage is also adjusted by the NTC thermistor. GND (Pin 5, Exposed Pad Pin 9): Ground. The exposed package pad must be connected to PCB ground. LBO (Pin 6): Low Battery Monitor Output (Active High). LBO is a CMOS output that indicates when the battery is discharged below 3.2V or rises above 3.5V. This pin is driven high if VCC < VLBTH, and is driven low if VCC > (VLBTH + VLBHY). DRV (Pin 7): External Drive Output. Connect to the gate of an external PFET to increase shunt current for applications which require more than 50mA charge current. Minimize capacitance and leakage current on this pin. When not in use, float DRV. VCC (Pin 8): Input Supply Pin. The input supply voltage is regulated to 4.0V, 4.1V, or 4.2V depending on the ADJ pin state (see the ADJ pin description for more detail). This pin can sink up to 50mA in order to keep the voltage regulation within accuracy limits. When no battery is present, decouple to GND with a capacitor, CIN, of at least 0.1μF. HBO (Pin 4): High Battery Monitor Output (Active High). HBO is a CMOS output that indicates that the battery is fully charged and current is being shunted away from BAT. This pin is driven high when VCC rises to within VHBTH of the effective float voltage. The absolute value of this threshold depends on ADJ and NTC, both of which affect the float voltage. HBO is driven low when VCC falls by more than (VHBTH + VHBHY) below the float voltage. Refer to Table 1 for the effective float voltage. 4070f 6 LTC4070 BLOCK DIAGRAM LTC4070 VCC ADJ 3-STATE DETECT PULSED DUTY CYCLE < 0.002% 30μs CLK 1.5s – + LBO + HBO OSC NTCBIAS RNOM 10k – NTC ADC T REF + DRV EA – NTHS0805N02N1002J GND 4070 BD OPERATION The LTC4070 provides a simple, reliable, and high performance battery protection and charging solution by preventing the battery voltage from exceeding a programmed level. Its shunt architecture requires just one resistor between the input supply and the battery to handle a wide range of battery applications. When the input supply is removed and the battery voltage is below the high battery output threshold, the LTC4070 consumes just 450nA from the battery. As the battery voltage approaches the float voltage, the LTC4070 shunts current away from the battery thereby reducing the charge current. The LTC4070 can shunt up to 50mA with float voltage accuracy of ±1% over temperature. The shunt current limits the maximum charge current, but the 50mA internal capability can be increased by adding an external P-channel MOSFET. While the battery voltage is below the programmed float voltage, the charge rate is determined by the input voltage, the battery voltage, and the input resistor: A built-in 3-state decoder connected to the ADJ pin provides three programmable float voltages: 4.0V, 4.1V, or 4.2V. The float voltage is programmed to 4.0V when ADJ is tied to GND, 4.1V when ADJ is floating, and 4.2V when ADJ is tied to VCC. The state of the ADJ pin is sampled about once every 1.5 seconds. When it is being sampled, the LTC4070 applies a relatively low impedance voltage at the ADJ pin. This technique prevents low level board leakage from corrupting the programmed float voltage. ICHG = ( VIN − VBAT ) RIN Adjustable Float Voltage, VFLOAT 4070f 7 LTC4070 OPERATION NTC Qualified Float Voltage, ΔVFLOAT(NTC) The NTC pin voltage is compared against an internal resistor divider tied to the NTCBIAS pin. This divider has tap points that are matched to the NTC thermistor resistance/temperature conversion table for a Vishay curve 2 type thermistor at temperatures of 40°C, 50°C, 60°C, and 70°C. The type #2 thermistor is also designated by a B25/85 value of 3490. Battery temperature conditioning adjusts the float voltage down to VFLOAT_EFF when the NTC thermistor indicates that the battery temperature is too high. For a 10k curve 2 thermistor and a 10k NTCBIAS resistor, each 10°C increase in temperature above 40°C causes the float voltage to drop by a fixed amount, ΔVFLOAT(NTC), depending on ADJ. If ADJ is at GND, the float voltage steps down by 50mV for each 10°C temperature increment. If ADJ is floating, the step size is 75mV. And if ADJ is at VCC, the step size is 100mV. Refer to Table 1 for the range of VFLOAT_EFF programming. Table 1. NTC Qualified Float Voltage ADJ ΔVFLOAT(NTC) TEMPERATURE VNTC AS % OF NTCBIAS VFLOAT_ EFF GND 50mV T < 40°C VNTC > 36.5% 40°C ≤ T < 50°C 29.0% < VNTC ≤ 36.5% 50°C ≤ T < 60°C 22.8% < VNTC ≤ 29.0% 60°C ≤ T < 70°C 17.8% < VNTC ≤ 22.8% 70°C < T VNTC ≤ 17.8% 4.000V 3.950V 3.900V 3.850V 3.800V Float 75mV T < 40°C VNTC > 36.5% 40°C ≤ T < 50°C 29.0% < VNTC ≤ 36.5% 50°C ≤ T < 60°C 22.8% < VNTC ≤ 29.0% 60°C ≤ T < 70°C 17.8% < VNTC ≤ 22.8% 70°C ≤ T VNTC ≤ 17.8% 4.100V 4.025V 3.950V 3.875V 3.800V VCC 100mV VNTC > 36.5% T < 40°C 40°C ≤ T < 50°C 29.0% < VNTC ≤ 36.5% 50°C ≤ T < 60°C 22.8%< VNTC ≤ 29.0% 60°C ≤ T < 70°C 17.8% < VNTC ≤ 22.8% 70°C ≤ T VNTC ≤ 17.8% 4.200V 4.100V 4.000V 3.900V 3.800V To conserve power in the NTCBIAS and NTC resistors, the NTCBIAS pin is sampled at a low duty cycle at the same time that the ADJ pin state is sampled. High Battery Status Output: HBO The HBO pin pulls high when VCC rises to within VHBTH of the programmed float voltage, VFLOAT_EFF, including NTC qualified float voltage adjustments. If VCC drops below the float voltage by more than VHBTH + VHBHY the HBO pin pulls low to indicate that the battery is not at full charge. The input supply current of the LTC4070 drops to less than 450nA (typ) as the LTC4070 no longer shunts current to protect the battery. The NTCBIAS sample clock slows to conserve power, and the DRV pin is pulled up to VCC. For example, if the NTC thermistor requires the float voltage to be dropped by 100mV (ADJ = VCC and 0.29•VNTCBIAS < VNTC < 0.36•VNTCBIAS) then the HBO rising threshold is detected when VCC rises past VFLOAT – ΔVFLOAT(NTC) – VHBTH = 4.2V – 100mV – 40mV = 4.06V. The HBO falling threshold in this case is detected when VCC falls below VFLOAT – ΔVFLOAT(NTC) – VHBTH – VHBHY = 4.2V – 100mV – 40mV – 100mV = 3.96V. Low Battery Status Output: LBO When the battery voltage drops below 3.2V, the LBO pin pulls high. Otherwise, the LBO pin pulls low when the battery voltage exceeds about 3.5V. While the low battery condition persists, NTC and ADJ pins are no longer sampled—the functions are disabled—and total supply consumption for the LTC4070 drops to less than 300nA (typ). For all ADJ pin settings the lowest float voltage setting is 3.8V = VFLOAT – 4•ΔVFLOAT(NTC) = VFLOAT_MIN. This occurs at NTC thermistor temperatures above 70°C, or if the NTC pin is grounded. 4070f 8 LTC4070 APPLICATIONS INFORMATION General Charging Considerations The LTC4070 uses a different charging methodology from previous chargers. Most Li-Ion chargers terminate the charging after a period of time. The LTC4070 does not have a discrete charge termination. Extensive measurements on Li-Ion cells show that the cell charge current drops to nanoamps with the shunt charge control circuit effectively terminating the charge. For long cell life, operate the charger at 100mV lower charge voltage normally used. The simplest application of the LTC4070 is shown in Figure 1. This application requires only an external resistor to program the charge/shunt current. Assume the wall adapter voltage (VWALL) is 12V and the minimum battery voltage (VBAT_MIN) is 3V, then the maximum charge current is calculated as: IMAX _ CHARGE = = ( VWALL − VBAT _ MIN ) RIN (12V − 3V ) 162Ω = 55.5mA Care must be taken in selecting the input resistor. Power dissipated in RIN under full charge current is given by the following equation: 2 VWALL − VBAT _ MIN (12V − 3V )2 PDISS = = = 0.5W RIN 162Ω The charge current decreases as the battery voltage increases. If the rising battery voltage is 40mV less than ) ( 12V WALL ADAPTER RIN 162Ω 0.5W RIN Figure 2 shows a charge circuit that can boost the charge current as well as the shunt current with an external P-channel MOSFET, Q1. In this case, if the wall adapter voltage (VWALL) is 24V and the minimum battery voltage (VBAT) is 3V, then the initial charge current is set to 191mA by selecting RIN = 110Ω. Note that this resistor dissipates over 4W of power, so select the resistor taking power rating into account. When the battery voltage reaches the float voltage, the LTC4070 and the external P-channel MOSFET begin to shunt current from the wall adapter. Eventually, the LTC4070 and the external P-channel MOSFET shunts all available current (182mA) and no current flows to the battery. Take the full shunt current and power into account when selecting the external MOSFET. FLOAT IF NOT NEEDED + Li-Ion GND RIN 110Ω 4W LTC4070 NTCBIAS Figure 1. Single-Cell Battery Charger VCC DRV ADJ Q1: FDN352AP Q1 + Li-Ion GND BATTERY 4070 F01 162Ω At this point the power dissipated in the input resistor is 388mW. NTC NTCBIAS ADJ ( VWALL − VFLOAT ) = (12V − 4.1V ) = 49mA VCC LTC4070 FLOAT ISHUNT _ MAX = 24V WALL ADAPTER NTC FLOAT IF NOT NEEDED the programmed float voltage, the LTC4070 consumes only 450nA of current, and all of the input current flows into the battery. As the battery voltage reaches the float voltage, the LTC4070 shunts current from the wall adapter and regulates the battery voltage to VFLOAT. The more shunt current the LTC4070 sinks, the less charge current the battery gets. Eventually, the LTC4070 shunts all the current from the battery; up to the maximum shunt current. The maximum shunt current in this case, with no NTC adjustment, is determined by the input resistor and is calculated as: BATTERY 4070 F02 Figure 2. Single-Cell Charger with Boosted Drive 4070f 9 LTC4070 APPLICATIONS INFORMATION The LTC4070 can also be used to regulate series-connected battery stacks as illustrated in Figures 3 and 4. Here two LTC4070 devices are used to charge two batteries in series; with or without boosted drive. A single resistor sets the maximum charge/shunt current. The GND pin of the top device is simply connected to the VCC pin of the bottom device. Care must be taken in observing the status output pins of the top device as these signals are not ground referenced. Also, the wall adapter must have a high enough voltage rating to charge both cells. WALL ADAPTER RIN VCC LTC4070 FLOAT IF NOT NEEDED FLOAT NTCBIAS + Li-Ion ADJ GND BATTERY VCC2 NTC VCC The voltage at the NTC pin depends on the ratio of the NTC thermistor value, RNTC, and a bias resistor, RNOM. Choose RNOM equal to the value of the thermistor at 25°C. RNOM is 10k for a Vishay NTHSO402E3103LT curve 2 thermistor. RNOM must be connected from NTCBIAS to NTC. The ratio of the NTC pin voltage to the NTCBIAS voltage is: LTC4070 FLOAT IF NOT NEEDED FLOAT NTCBIAS + Li-Ion ADJ GND BATTERY 4070 F03 RNTC (RNTC + RNOM ) Figure 3. 2-Cell Battery Charger WALL ADAPTER RIN VCC1 NTC FLOAT IF NOT NEEDED FLOAT LTC4070 NTCBIAS When the thermistor temperature rises, the resistance drops; and the resistor divider between RNOM and the thermistor lowers the voltage at the NTC pin. VCC DRV Q1 ADJ + Li-Ion GND BATTERY VCC2 NTC FLOAT IF NOT NEEDED FLOAT LTC4070 NTCBIAS VCC DRV ADJ Q2 + Li-Ion GND The LTC4070 measures battery temperature with a negative temperature coefficient thermistor thermally coupled to the battery. NTC thermistors have temperature characteristics which are specified in resistance-temperature conversion tables. Internal NTC circuitry protects the battery from excessive heat by reducing the float voltage for each 10°C rise in temperature above 40°C (assuming a Vishay curve 2 thermistor). The LTC4070 uses a ratio of resistor values to measure battery temperature. The LTC4070 contains an internal fixed resistor voltage divider from NTCBIAS to GND with four tap points; NTCTH1-NTCTH4 . The voltages at these tap points are periodically compared against the voltage at the NTC pin to measure battery temperature. To conserve power, the battery temperature is measured periodically by biasing the NTCBIAS pin to VCC about once every 1.5 seconds. VCC1 NTC NTC Protection BATTERY Q1, Q2: Si3469DV 4070 F04 Figure 4. 2-Cell Battery Charger with Boosted Drive An NTC curve 1 thermistor may also be used with the LTC4070. However the temperature trip points are shifted due to the higher negative temperature coefficient of the curve 1 type thermistor. To correct for this difference add a resistor, RFIX, in series with the curve 1 thermistor to shift the ratio, RFIX + RNTC (RFIX + RNTC + RNOM ) up to the internal resistive divider tap points: NTCTH1 through NTCTH4. For a 100k curve 1 thermistor at 70°C (with RNOM = 100k) choose RFIX = 3.92kΩ. The temperature trip 4070f 10 LTC4070 APPLICATIONS INFORMATION points are found by looking up the curve 1 thermistor R/T values plus RFIX that correspond to the ratios for NTCTH1 = 36.5%, NTCTH2 = 29.0%, NTCTH3 = 22.8%, and NTCTH4 = 17.8%. Selecting RFIX = 3.92k results in trip points of 39.9°C, 49.4°C, 59.2°C and 69.6°C. Another technique may be used without adding an additional component. Instead decrease RNOM to adjust the NTCTH thresholds for a given R/T thermistor profile. For example, if RNOM = 88.7k (with the same 100k curve 1 thermistor) then the temperature trip points are 41.0°C, 49.8°C, 58.5°C, and 67.3°C. When using the NTC features of the LTC4070 it is important to keep in mind that the maximum shunt current increases as the float voltage, VFLOAT_EFF drops with NTC conditioning. Reviewing the Typical Application with a 12V wall adapter in Figure 1; the input resistor, RIN, should be increased to 165Ω such that the maximum shunt current does not exceed 50mA at the lowest possible float voltage due to NTC conditioning, VFLOAT_MIN = 3.8V. Operation with an External PFET To Boost Shunt Current Table 2 lists recommended devices to increase the maximum shunt current. Due to the requirement for low capacitance on the DRV pin node, it is recommended that only low gate charge and high threshold PFET devices be used. Also it is recommended that careful PCB layout be used to keep leakage at the DRV pin to a minimum as the IDRV(SINK) current is typically 3μA. Refer to device manufacturers data sheets for maximum continuous power dissipation and thermal resistance when selecting an external PFET for a particular application. Table 2. Recommended External Shunt PFETS DEVICE VENDOR QGS VTH(MIN) RDS(ON) FDN352AP Fairchild 0.50nC –0.8V 0.33 Si3467DV Vishay 1.7nC –1.0V 0.073 Si3469DV Vishay 3.8nC –1.0V 0.041 DMP2130LDM Diodes Inc. 2.0nC –0.6V 0.094 DMP3015LSS Diodes Inc. 7.2nC –1.0V 0.014 Thermal Considerations At maximum shunt current, the LTC4070 may dissipate up to 205mW. The thermal dissipation of the package should be taken into account when operating at maximum shunt current so as not to exceed the absolute maximum junction temperature of the device. With θJA of 40°C/W, in the MSOP package, at maximum shunt current of 50mA the junction temperature rise is about 8°C above ambient. With ΘJA of 76°C/W in the DFN package, at maximum shunt current of 50mA the junction temperature rise is about 16°C above ambient. 4070f 11 LTC4070 TYPICAL APPLICATIONS DANGER! HIGH VOLTAGE! AC 110 R3 249k R1 249k R4 249k R2 249k MB4S – + VCC NTC FLOAT IF NOT NEEDED ADJ LTC4070 NTCBIAS + Li-Ion GND BATTERY 4070 F05 DANGEROUS AND LETHAL POTENTIALS ARE PRESENT IN AC LINE-CONNECTED CIRCUITS! BEFORE PROCEEDING ANY FURTHER, THE READER IS WARNED THAT CAUTION MUST BE USED IN THE CONSTRUCTION, TESTING AND USE OF AC LINE-CONNECTED CIRCUITS. EXTREME CAUTION MUST BE USED IN WORKING WITH AND MAKING CONNECTIONS TO THESE CIRCUITS. ALL TESTING PERFORMED ON AN AC LINE-CONNECTED CIRCUIT MUST BE DONE WITH AN ISOLATION TRANSFORMER CONNECTED BETWEEN THE AC LINE AND THE CIRCUIT. USERS AND CONSTRUCTORS OF AC LINE-CONNECTED CIRCUITS MUST OBSERVE THIS PRECAUTION WHEN CONNECTING TEST EQUIPMENT TO THE CIRCUIT TO AVOID ELECTRIC SHOCK. Figure 5. 4.2V AC Line Charging, UL Leakage Okay The LTC4070 can be used to charge a battery to a 4.2V float voltage from an AC line with a bridge rectifier as shown in the simple schematic in Figure 5. In this example, the four input 249k resistors are sized for acceptable UL leakage in the event that one of the resistors short. Here, the LTC4070 will fully charge the battery from the AC line while meeting the UL specification with only 104μA of available charge current. A photovoltaic (PV) application for the LTC4070 is illustrated in Figure 6. In this application, transistor Q1 has been added to further reduce the already low quiescent current of the LTC4070 to achieve extremely low battery discharge when the PV cells are not charging the battery. In long battery life applications, Q1 isolates the battery from the LTC4070 when Q1’s base voltage falls. Under normal operation, the PV cells provide current through the VBE and VBC diodes of Q1. While the battery is charging, the majority of PV current flows to the battery. When VCC reaches the programmed float voltage, in this case 4.1V with ADJ floating, then the LTC4070 shunts base-collector junction current from Q1, effectively reducing the battery charging current to zero and saturating Q1. In the event that the thermistor temperature rises and the float voltage drops, the LTC4070 shunts more current, and Q1 is forced to operate in reverse active mode until the battery voltage falls. Once equilibrium is achieved, the difference between VBAT and VCC should be less than a few mV, depending on the magnitude of the shunt current. Add a series input resistor, RIN, to limit the current from high current solar cells. Solar cells are limited in current normally, so for small cells no resistor is needed. With high current PV cells, select RIN taking into account the PV cell’s open-circuit voltage and short-circuit current, the temperature coefficient of the VBC and VBE diodes and the maximum collector current and operating junction temperature of Q1. Using an isolating transistor reduces discharge current to a few nanoamps, and may be extended to other applications as well. The PV application schematic in Figure 6 also illustrates using the LTC4070 with a 10k, 5% curve 2 type NTC thermistor, NTHS0402E3103LT. Here RNOM is 10k, and the rising temperature trip points are 40°C, 50°C, 60°C and 70°C. VBAT VCC Q1 MP5650 + – + – ADJ NTCBIAS CIN 0.1μF OR 2N3904 FLOAT RNOM 10k LTC4070 NTC GND T RNTC: NTHS0402E3103LT 10k + Li-Ion 4070 F06 Figure 6. Photovoltaic Charger with Extremely Low Leakage When Not Charging 4070f 12 LTC4070 TYPICAL APPLICATIONS The LTC4070 status pins have sufficient drive strength to use with an LED, for a visual indication of charging status. Consider the application in Figure 7, where red LED D1 is connected to the LBO pin and turns off when the battery voltage is below VLBTH. Note that LED D1 discharges the battery until VCC falls below VLBTH. Green LED D2, connected to the HBO pin turns on while the battery is charging. When the battery voltage rises to within VHBTH of the float voltage including NTC qualification, VFLOAT_EFF, D2 turns off to indicate that the battery is no longer charging. Optionally, a low leakage diode D3 is placed between the cathode of D2 and the battery. This diode stops D2 from discharging the battery when the input supply is not present. In this application, RIN = 205Ω, is sized for a maximum shunt current of 50mA that occurs at the maximum input voltage of 15V and the minimum NTC qualified float voltage VIN = 8V TO 15V RIN 205Ω 1W OPTIONAL D3 BAS416 VBAT = 4.1V D2 LTST C190GKT D1 LTST C190CKT VCC RLED2 1k LTC4070 RLED1 1k FLOAT LBO HBO ADJ NTCBIAS RNOM 10k NTC GND + T Li-Ion 4070 F07 RNTC: NTHS0402E3103LT 10k Figure 7. Single Cell Charger with LED Status and NTC Qualified Float Voltage IIN = 500mA LTC4070 VCC DRV NTCBIAS FLOAT LBO HBO ADJ VBAT = 4.1V Q1 DMP3015LSS RNOM 10k T Figure 8 illustrates an application to replace three NiMH cells with a single Li-Ion cell. This simple application replaces the NiMH charging solution without the need for a charge termination or cell balancing scheme. NiMH charging can be done without termination, but that algorithm limits the charge rate to C/10. The LTC4070 application allows the Li-Ion battery to be charged faster without concern of over-charging. Figure 9, 12V Wall Adapter Charging with 205mA, illustrates the use of an external PFET transistor to boost the maximum shunt current. If the battery voltage is 3.6V the battery receives the full charge current of about 205mA. If the battery temperature is below 40°C, the float voltage rises to 4.1V (ADJ = floating) then Q1 and the LTC4070 shunts 192mA away from the battery. If the battery temperature rises, the shunt current increases to regulate the float voltage 75mV lower per 10°C rise in battery temperature, as described in Table 1. At a maximum shunt current of 200mA the minimum float voltage is held at 3.8V when the battery temperature is above 70°C. This example illustrates an alternative use of a LED, D1, to observe the HBO status pin. This LED turns on to provide a visual indication that the battery is fully charged, and shunts about 1.5mA when the battery rises to within 40mV of the desired float voltage. LED D1 discharges the battery, when no supply is present, until VCC falls by more than VHBTH + VHBHY below the float voltage. When using an LED with the HBO pin in this configuration, it is important to limit the LED current with a resistor, RLED as shown. Otherwise the step in current through RIN that occurs when the LED turns on may pull VCC below the HBO hysteresis. To prevent that situation, the ratio of RIN to RLED should be selected to meet the following relation: RIN ( V − V ) < VHBHY − 50mV RLED CC LED NTC GND of 3.8V, assuming the voltage drop on diode D3 is 1.1V. Without the optional D3, RIN increases to 226Ω. + Li-Ion 4070 TA01a RNTC = NTHS0402E3103LT 10k Figure 8. Replace Three NiMH with Lithium where VLED is the forward voltage drop of the LED and a margin of 50mV is subtracted from the HBO hysteresis. A VLED value of 1.1V is assumed for this example. Refer to the LED data sheet for the forward voltage drop at the applied current level. 4070f 13 LTC4070 PACKAGE DESCRIPTION DDB Package 8-Lead Plastic DFN (3mm × 2mm) (Reference LTC DWG # 05-08-1702 Rev B) 0.61 ±0.05 (2 SIDES) 3.00 ±0.10 (2 SIDES) R = 0.115 TYP 5 R = 0.05 TYP 0.40 ± 0.10 8 0.70 ±0.05 2.55 ±0.05 1.15 ±0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.20 ±0.05 (2 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) 0.200 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 2.00 ±0.10 (2 SIDES) 0.56 ± 0.05 (2 SIDES) 0.75 ±0.05 0 – 0.05 4 0.25 ± 0.05 1 PIN 1 R = 0.20 OR 0.25 × 45° CHAMFER (DDB8) DFN 0905 REV B 0.50 BSC 2.15 ±0.05 (2 SIDES) BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 4070f 14 LTC4070 PACKAGE DESCRIPTION MS8E Package 8-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1662 Rev E) BOTTOM VIEW OF EXPOSED PAD OPTION 2.06 p 0.102 (.081 p .004) 1 0.889 p 0.127 (.035 p .005) 2.794 p 0.102 (.110 p .004) 0.29 REF 1.83 p 0.102 (.072 p .004) 0.05 REF 5.23 (.206) MIN DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 2.083 p 0.102 3.20 – 3.45 (.082 p .004) (.126 – .136) 8 0.42 p 0.038 (.0165 p .0015) TYP 3.00 p 0.102 (.118 p .004) (NOTE 3) 0.65 (.0256) BSC 8 7 6 5 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 3.00 p 0.102 (.118 p .004) (NOTE 4) 4.90 p 0.152 (.193 p .006) DETAIL “A” 0o – 6o TYP GAUGE PLANE 1 0.53 p 0.152 (.021 p .006) DETAIL “A” 2 3 4 1.10 (.043) MAX 0.86 (.034) REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) BSC 0.1016 p 0.0508 (.004 p .002) MSOP (MS8E) 0908 REV E NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 4070f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC4070 TYPICAL APPLICATION 12V RIN 41.2Ω 2W Q2: FDR8508 LTC4070 FLOAT SYSTEM STATUS VCC ADJ HBO D1 LTST C190KGKT RLED 2.67k LBO DRV NTCBIAS Q1: FDN352AP RNOM 10k NTC GND T + Li-Ion 4070 TA02 RNTC: NTHS0402E3103LT 10k Figure 9. 12V Wall Adapter Charging with 205mA with Automatic Load Disconnect on Low Battery RELATED PARTS PART NUMBER DESCRIPTION Shunt Regulators LT1389 Nanopower Precision Shunt Voltage Reference LT1634 Micropower Precision Shunt Reference Switching Regulators LTC3588-1 Piezoelectric Energy Harvesting Power Supply in 3mm × 3mm DFN and MSOP Packages LTC3620 Ultralow Power 15mA Step-Down Switching Regulator in 2mm × 2mm DFN LTC3642 High Efficiency High Voltage 50mA Synchronous Step-Down Converter in 3mm × 3mm DFN and MSE Packages Battery Chargers LTC1734L Lithium-Ion Linear Battery Charger in ThinSOT LTC4054L Standalone Linear Li-Ion Battery Charger in ThinSOT LTC4065L Standalone 250mA Li-Ion Battery Charger in 2mm × 2mm DFN ThinSOT is a trademark of Linear Technology Corporation. COMMENTS 800nA Operating Current, 0.05% Initial Accuracy, Low Drift: 10ppm/°C 10μA Operating Current, 0.05% Initial Accuracy. Low Drift: 10ppm/°C High Efficiency Hysteretic Integrated Buck DC/DC; 950nA Input Quiescent Current (Output in Regulation—No Load), 520nA Input Quiescent Current in UVLO, 2.6V to 19.2V Input Operating Range; Integrated Low-Loss Full-Wave Bridge Rectifier, Up to 100mA of Output Current, Selectable Output Voltages of 1.8V, 2.5V, 3.3V, 3.6V High Efficiency; Up to 95%, Maximum Current Output: 15mA, Externally Programmable Frequency Clamp with Internal 50kHz Default Minimizes Audio Noise, 18μA IQ Current, 2.9V to 5.5 Input Voltage Range, Low-Battery Detection Wide Input Voltage Range: 4.5V to 45V; Tolerant of 60V Input Transients, Internal High Side and Low Side Power Switches; No Compensation Required, 50mA Output Current, Low Dropout Operation: 100% Duty Cycle, Low Quiescent Current, 12μA Low Current Version of LTC1734, 50mA ≤ ICHRG ≤ 180mA Low Current Version of LTC4054, 10mA ≤ ICHRG ≤ 150mA. Thermal Regulation Prevents Overheating, C/10 Termination, with Integrated Pass Transistor Low Current Version of LTC4065, 15mA ≤ ICHRG ≤ 250mA, 4.2V, ±0.6% Float Voltage, High Charge Current Accuracy: 5% 4070f 16 Linear Technology Corporation LT 0110 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2010