To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.com April 1st, 2010 Renesas Electronics Corporation Issued by: Renesas Electronics Corporation (http://www.renesas.com) Send any inquiries to http://www.renesas.com/inquiry. Notice 1. 2. 3. 4. 5. 6. 7. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. 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H7N0405LD, H7N0405LS, H7N0405LM Silicon N Channel MOS FET High Speed Power Switching REJ03G1367-0100 Rev.1.00 Sep 25, 2006 Features • Low on-resistance RDS(on) = 4.0 mΩ typ. • Low drive current. • Capable of 4.5 V gate drive Outline RENESAS Package code: PRSS0004AE-A (Package name: LDPAK (L) ) RENESAS Package code: PRSS0004AE-B (Package name: LDPAK (S)-(1) ) 4 4 1 1 2 2 1. Gate 2. Drain 3. Source 4. Drain 3 3 H7N0405LD H7N0405LS RENESAS Package code: PRSS0004AE-C (Package name: LDPAK (S)-(2) ) D 4 G 1 2 3 H7N0405LM Rev.1.00 Sep 25, 2006 page 1 of 7 S H7N0405LD, H7N0405LS, H7N0405LM Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel temperature Storage temperature Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Tc = 25°C 3. Tch = 25°C, Rg ≥ 50 Ω Symbol VDSS VGSS ID ID (pulse)Note1 IDR IAPNote3 EARNote3 PchNote2 Tch Tstg Rating 40 ±20 80 320 80 40 213 80 150 –55 to +150 Unit V V A A A A mJ W °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source break down voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cut off voltage Symbol V(BR)DSS V(BR)GSS IGSS IDSS VGS(off) Static drain to source on state resistance RDS(on) Forward transfer admittance Input capacitance Output capacitance Reverse transfer admittance Total gate charge Gate to source charge Gate to drain charge Turn-off delay time Rise time Body-drain diode forward voltage Fall time Body-drain diode forward voltage |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VDF Body-drain diode reverse recovery time Notes: 4. Pulse test Rev.1.00 Sep 25, 2006 page 2 of 7 trr Min 40 ±20 — — 1.5 — — 54 — — — — — — — — — — — — Typ — — — — — 4.0 6.2 90 5600 825 550 100 25 25 40 400 100 26 0.94 40 Max — — ±10 10 2.5 5.0 8.7 — — — — — — — — — — — — — Unit V V µA µA V mΩ mΩ S pF pF pF nC nC nC ns ns ns ns V ns Test Conditions ID = 10 mA, VGS = 0 IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = 40 V, VGS = 0 ID = 1 mA, VDS = 10 VNote4 ID = 40 A, VGS = 10 VNote4 ID = 40 A, VGS = 4.5 VNote4 ID = 40 A, VGS = 10 VNote4 VDS = 10 V, VGS = 0, f = 1 MHz VDD = 25 V, VGS = 10 V, ID = 80 A VGS = 10 V, ID = 40 A, RL = 0.75 Ω, Rg = 4.7 Ω IF = 80 A, VGS = 0 IF = 80 A, VGS = 0 diF/dt = 100 A/µs H7N0405LD, H7N0405LS, H7N0405LM Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 1000 120 40 µs s 100 30 10 DC Operation (Tc = 25°C) 3 1 0.3 Operation in this area is limited by RDS(on) 0.1 PW = 10 ms (1 shot) 0.03 50 100 150 200 3 30 10 100 Case Temperature Tc (°C) Drain to Source Voltage VDS (V) Typical Output Characteristics Typical Transfer Characteristics 100 80 Ta = 25°C 0.01 0.1 0.3 1 100 4.4 V VDS = 10 V Pulse Test 6V 10 V 4.0 V 60 40 VGS = 3.6 V 20 Drain Current ID (A) 0 Drain Current ID (A) 0µ s 80 10 10 m Drain Current ID (A) 300 1 Channel Dissipation Pch (W) 160 80 60 40 –40°C 20 25°C Pulse Test 2 4 6 8 0 10 1 2 3 4 5 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Static Drain to Source on State Resistance vs. Drain Current Static Drain to Source on State Resistance vs. Temperature 100 Pulse Test 30 10 VGS = 4.5 V 10 V 3 1 1 3 10 30 Drain Current ID (A) Rev.1.00 Sep 25, 2006 page 3 of 7 100 Static Drain to Source on State Resistance RDS(on) (mΩ) Drain to Source On State Resistance RDS(on) (mΩ) 0 Tc = 150°C 15 Pulse Test 10 10, 20, 50 A 4.5 V 5 10, 20, 50 A VGS = 10 V 0 –50 0 50 100 Case Temperature Tc (°C) 150 H7N0405LD, H7N0405LS, H7N0405LM Typical Capacitance vs. Drain to Source Voltage 1000 Coss 300 Crss 100 30 V = 0 GS f = 1 MHz 10 0 10 20 30 40 Reverse Drain Current IDR (A) 40 VGS VDD = 40 V 25 V 10 V 60 8 4 VDD = 40 V 25 V 10 V 40 80 120 160 0 200 Drain to Source Voltage VDS (V) Gate Charge Qg (nc) Reverse Drain Current vs. Source to Drain Voltage Maximum Avalanche Energy vs. Channel Temperature Derating 10 V 60 5V 40 VGS = 0, –5 V 20 Pulse Test 0 0.4 0.8 1.2 1.6 2.0 250 Normalized Transient Thermal Impedance γs (t) IAP = 40 A VDD = 25 V duty < 0.1 % Rg ≥ 50 Ω 200 150 100 50 0 25 50 75 100 125 Normalized Transient Thermal Impedance vs. Pulse Width 3 Tc = 25°C D=1 0.5 0.3 0.2 0.1 0.1 0.03 θch - c(t) = γs (t) • θch - c θch - c = 1.56°C/ W, Tc = 25°C 0.05 2 0.0 1 0.0 h 1s 0.01 10 µ ot p PDM e uls D= PW T PW T 100 µ 1m 10 m 100 m Pulse Width PW (s) Rev.1.00 Sep 25, 2006 page 4 of 7 150 Channel Temperature Tch (°C) Source to Drain Voltage VSD (V) 1 16 12 VDS 20 0 100 80 80 50 Repetitive Avalanche Energy EAR (mJ) Capacitance C (pF) 3000 20 ID = 80 A Drain to Source Voltage VDS (V) Ciss 1 10 100 Gate to Source Voltage VGS (V) 10000 Dynamic Input Characteristics 100 H7N0405LD, H7N0405LS, H7N0405LM Avalanche Test Circuit Avalanche Waveform EAR = L VDS Monitor 1 2 VDSS • L • IAP2 • VDSS – VDD IAP Monitor V(BR)DSS IAP Rg VDS VDD D. U. T ID Vin 15 V 50 Ω 0 VDD Switching Time Test Circuit Switching Time Waveform Vout Monitor Vin Monitor 90% D.U.T. Rg RL Vin Vout Vin 10 V 10% 10% VDS = 30 V 90% td(on) Rev.1.00 Sep 25, 2006 page 5 of 7 10% tr 90% td(off) tf H7N0405LD, H7N0405LS, H7N0405LM Package Dimensions • H7N0405LD JEITA Package Code RENESAS Code PRSS0004AE-A MASS[Typ.] 1.40g Unit: mm 10.2 ± 0.3 8.6 ± 0.3 11.3 ± 0.5 0.3 10.0 +– 0.5 Previous Code LDPAK(L) / LDPAK(L)V 4.44 ± 0.2 (1.4) Package Name LDPAK(L) 1.3 ± 0.15 1.3 ± 0.2 1.37 ± 0.2 2.49 ± 0.2 11.0 ± 0.5 0.2 0.86 +– 0.1 0.76 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 0.4 ± 0.1 • H7N0405LS JEITA Package Code SC-83 RENESAS Code PRSS0004AE-B Previous Code LDPAK(S)-(1) / LDPAK(S)-(1)V MASS[Typ.] 1.30g (1.5) 10.0 Rev.1.00 Sep 25, 2006 page 6 of 7 2.54 ± 0.5 0.4 ± 0.1 0.3 3.0 +– 0.5 2.54 ± 0.5 0.2 0.86 +– 0.1 7.8 7.0 2.49 ± 0.2 0.2 0.1 +– 0.1 1.37 ± 0.2 1.3 ± 0.2 7.8 6.6 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 Package Name LDPAK(S)-(1) 2.2 H7N0405LD, H7N0405LS, H7N0405LM • H7N0405LM JEITA Package Code RENESAS Code PRSS0004AE-C Previous Code LDPAK(S)-(2) / LDPAK(S)-(2)V MASS[Typ.] 1.35g 7.8 6.6 (2.3) 10.0 2.49 ± 0.2 0.2 0.1 +– 0.1 7.8 7.0 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 Package Name LDPAK(S)-(2) 2.2 1.37 ± 0.2 2.54 ± 0.5 0.2 0.86 +– 0.1 2.54 ± 0.5 0.4 ± 0.1 0.3 5.0 +– 0.5 1.3 ± 0.2 Ordering Information Part Name H7N0405LD-E H7N0405LSTL-E H7N0405LMTL-E Quantity 500 pcs 1000 pcs 1000 pcs Shipping Container Box (Conductive Sack) Taping Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.1.00 Sep 25, 2006 page 7 of 7 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. 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