Anpec APL515650DI-TRG High input voltage, low quiescent current, 150ma ldo regulator Datasheet

APL5156
High Input Voltage, Low Quiescent Current, 150mA LDO Regulator
Features
General Description
•
Wide Operating Voltage : 6.5V~25V
•
Ultra Low Ground Current : 70µA
The APL5156 is a low ground current linear regulator,
which operates with input voltage from 6.5V to 25V and
•
High Output Accuracy : ±2% Over Temperature
•
Excellent Load/Line Transient
•
Low Dropout Voltage : 1900mv @ 150mA
•
Fixed Output Voltages for 5V/3.3V or Adjustable
delivers output current up to 150mA. Typical dropout voltage is only 1.9V at 150mA loading. This combination of
the high voltage and the low ground current makes the
APL5156 ideal for USB and portable devices, using 2cell or 3-cell Li-Ion battery inputs.
The APL5156 is stable with aluminum, tantalum, and
Voltage
•
Built-In Reverse Battery Protection
•
Built-In Reverse Leakage Protection
•
Built-In Current-Limit Protection
•
Built-In Over-Temperature Protection
•
Zero Shutdown Current
•
Internal Soft-Start Function 0.5ms~1.5ms (max)
ceramic capacitors. It requires a 2.2µF or greater capacitor for stability.
The APL5156 has many protection functions, including
over-temperature, current-limit, reverse battery, and
reverse leakage protections which prevent the device from
thermal over-load, current over-load, reverse connection
of the battery and output current reversing to the VIN.
The APL5156 regulator is available in miniature SOT-23-
Over Temperature
•
POR Scheme to Prevent VOUT Spike
•
Stable with Aluminum, Tantalum, or Ceramic
5, SOT-89, and SOP-8P packages.
Capacitors
•
SOT-23-5, SOT-89, and SOP-8P Packages
•
Lead Free and Green Devices Available
Simplified Application Circuit
(RoHS Compliant)
VIN
Applications
VOUT
APL5156
CIN
EN
1µF
•
USB Power Supply
•
Keep-Alive Supply in Notebook and Portable
•
Logic Supply for High-Voltage Batteries
•
Battery Powered Systems
COUT
ADJ
2.2µF
GND
Computers
Adjustable Output Voltage (SOT-23-5/SOP-8P)
Pin Configuration
SOT-23-5
VIN 1
GND 2
EN 3
SOT-89
SOP-8P
GND 1
5 VOUT
TAB: VIN
VIN 2
4 NC/ADJ
VOUT 3
VOUT
NC
NC
NC/ADJ
1
2
3
4
8
7
6
5
VIN
GND
NC
EN
Thermal Pad (connected to GND
plane for better dissipation)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
1
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APL5156
Ordering and Marking Information
Package Code
B : SOT-23-5
D : SOT-89
KA : SOP-8P
Operating Ambient Temperature Range
I : -40 to 85 oC
Handling Code
TR : Tape & Reel
Voltage Code :
33 : 3.3V
50 : 5.0V
Blank : Adjustable Version
Assembly Material
G : Halogen and Lead Free Device
APL5156
Assembly Material
Handling Code
Temperature Range
Package Code
Voltage Code
APL5156
B:
L56X
X - Date Code
APL5156
33B :
56RX
X - Date Code
APL5156
50B :
56ZX
X - Date Code ;
APL5156
D:
APL5156
XXXXX33
XXXXX - Date Code
APL5156
KA :
APL5156
XXXXX
XXXXX - Date Code
;
33 - 3.3V
50 - 5.0V
;
33 - 3.3V
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings
Symbol
VIN,VEN
VOUT,VADJ
PD
TJ
TSTG
TSDR
(Note 1)
Rating
Unit
VIN, EN to GND Voltage
Parameter
- 27 to 27
V
EN to VIN Voltage
-27 to 27
V
VOUT, ADJ to GND Voltage
- 0.3 to 27
V
VOUT, ADJ to VIN Voltage
-27 to 27
V
Power Dissipation
Internally Limited
W
Operating Junction Temperature
-40 to 125
o
Storage Temperature Range
-65 to +150
o
260
o
Maximum Lead Soldering Temperature, 10 Seconds
C
C
C
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Thermal Characteristics
Symbol
Parameter
Typical Value
Unit
Thermal Resistance-Junction to Ambient (Note 2)
SOT-23-5
SOT-89
SOP-8P
θJA
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
2
235
180
50
o
C/W
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APL5156
Thermal Characteristics (Cont.)
Symbol
Parameter
Typical Value
Unit
Thermal Resistance-Junction to Case
130
SOT-23-5
38
SOT-89
20
SOP-8P
Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
θJC
o
C/W
Electrical Characteristics
Unless otherwise noted, these specifications apply over VIN=VOUT+2.5V, CIN=1µF, COUT=2.2µF, TA=-40oC to 85oC. Typical values refer
to TA=25oC.
Symbol
VIN
VOUT
IQ
Parameter
Test Conditions
APL5156
Unit
Min.
Typ.
Max.
Input Voltage
6.5
-
25
V
Output Voltage Accuracy
-2
-
2
%
Output Voltage Range
3
-
20
V
Quiescent Current
IOUT
Load Current Range
VREF
Reference Voltage
IOUT=0.1mA
-
70
100
µA
IOUT=50mA
-
0.5
1
mA
IOUT=100mA
-
2
3.5
mA
IOUT=150mA
-
5
7
mA
0
-
150
mA
-2%
1.24
+2%
V
REGLINE
Line Regulation
VOUT+2.5V<VIN<25V, IOUT=1mA
-
0.01
-
%
REGLOAD
Load Regulation
0.1mA<IOUT<150mA
-
0.4
1
%
IOUT=0.1mA
-
1300
1900
IOUT=50mA
-
1600
2000
IOUT=100mA
-
1700
2100
IOUT=150mA
-
1900
2300
4
5
6
Over-Temperature Shutdown
-
150
-
o
OTS
Over-Temperature Shutdown
Hysteresis
-
10
-
o
ILIMIT
Circuit Current Limit
VIN =VOUT +2.5V
250
350
500
mA
ISHORT
Short Current
VOUT=0V
-
50
-
mA
Output Leakage,
Reverse Polarity Input
Load=500Ω,VIN= -15V, EN=GND
-
-3
-5
µA
Load=500Ω, VIN=VEN= -15V
-
-4
-5
mA
From enable to VOUT = 90%
ms
VDROP
Dropout Voltage
mV
POWER-ON-RESET (POR)
Rising VIN Threshold
V
PROTECTIONS
C
C
SOFT-START AND SHUTDOWN
TSS
VEN
Soft-Start Interval
0.5
1
1.5
Input High Voltage
2.5
-
-
Input Low Voltage
-
-
0.6
V
IEN
EN Pin Input Bias Current
VEN=25V
-
1
5
µA
IQSHDN
Shutdown Supply Current
EN=Low, VIN=19V
-
0.1
1
µA
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
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APL5156
Typical Operating Characteristics
PSRR vs. Frequency
Dropout Voltage vs. Output Current
2.5
0
TA=25°
C
IOUT=100mA
2
Dropout Voltage (V)
PSRR (dB)
-20
IOUT=10mA
-40
-60
-80
10
100
1K
10K
1.5
1
0.5
0
100K
0
20
40
Frequency (Hz)
60
80
100
120
Output Current (mA)
Dropout Voltage vs. Temperature
Quiescent Current vs. Output Current
2.5
6000
IOUT=150mA
VIN=6V
5000
Quiescent Current (µA)
Dropout Voltage (V)
2
1.5
1
0.5
0
-40
-20
0
20
40
60
80
4000
3000
2000
1000
0
100 120
0
20
40
o
Temperature ( C)
80
100
140
100
IOUT=10mA
IOUT=10mA
85
120
Quiescent Current vs. Input Voltage
Quiescent Current vs. Temperature
90
80
Quiescent Current (µA)
Quiescent Current (µA)
60
Output Current (mA)
90
75
70
65
60
55
50
-40
140
-20
0
20
40
60
80
100
70
60
50
40
120
o
Temperature ( C)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
80
6
8
10
12
14
16
18
20
22
24
Input Voltage (V)
4
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APL5156
Typical Operating Characteristics (Cont.)
Output Voltage vs. Temperature
3.4
Output Voltage (V)
3.35
3.3
3.25
3.2
3.15
3.1
-40
-20
0
20
40
60
80
100 120
Temperature ( oC)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
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APL5156
Operating Waveforms
Load Transient
Line Transient
VIN=12V ; V OUT=3.3V ; CIN=1µF ; COUT=2.2µF
VOUT(100mV/div)
VIN=11.5V~12.5V ; TR=1µs
IOUT(1~150mA)
VOUT(200mV/div) ; COUT=2.2µF ; IOUT=10mA
Time (50µs/div)
Time (50µs/div)
Entering Shutdown Delay
Exiting Shutdown Waveform
VIN=6V ; CIN=1µF ; COUT=2.2µF ; IOUT=100mA
VIN=6V ; CIN=1µF ; COUT=2.2µF ; IOUT=100mA
VEN(2V/div)
VEN(2V/div)
VOUT(2V/div)
VOUT(2V/div)
Time (0.5ms/div)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
Time (0.5ms/div)
6
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APL5156
Pin Description
PIN
NO.
FUNCTION
NAME
SOT-23-5
SOT-89
SOP-8P
1
2
8
VIN
Voltage supply input pin
2
1
7
GND
Ground
3
-
5
EN
4
-
4
NC/ADJ
5
3
1
VOUT
Enable pin, Logic low=shutdown; Logic high=enable
NC: No Connection
ADJ: Output voltage feedback pin
Regulator output pin
Block Diagram
VIN
VOUT
EN
ENABLE
R1
VREF
ADJ
R2
Adjustable Output Voltage (SOT-23-5/SOP-8P) GND
VOUT
VIN
EN
ENABLE
R1
VREF
R2
Fixed Output Voltage (SOT-23-5/SOP-8P) GND
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
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APL5156
Block Diagram (Cont.)
VIN
VOUT
R1
VREF
R2
GND
Fixed Output Voltage (SOT-89)
Typical Application Circuit
CIN
1µF
VIN
VOUT
EN
ADJ
2.2µF
GND
Enable signal
COUT
Adjustable Output Voltage (SOT-23-5/SOP-8P)
CIN
1µF
VIN
VOUT
EN
NC
GND
Enable signal
COUT
2.2µF
Fixed Output Voltage (SOT-23-5/SOP-8P)
VIN
VOUT
CIN
GND
1µF
COUT
2.2µF
Fixed Output Voltage (SOT-89)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
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APL5156
Application Information
Enable/Shutdown
PD(MAX ) =
The APL5156 features an active-high enable pin that allows the regulator to be disabled. Forcing the enable pin
TJ − TA
θJA
low disables the regulator, so current consumed by the
regulator goes nearly to zero. Forcing the enable pin high
where TJ-TA is the temperature difference between the
junction and ambient air. θJA is the thermal resistance
enables the output voltage. The enable pin can not float.
between junction and ambient air.
For continual operation, do not exceed the absolute maxi-
Input Capacitor
o
The APL5156 has high input voltage up to 25V. The input
mum junction temperature rating of TJ=125 C.
For example:
capacitor must be rated to sustain voltages that may be
used on the input. An input capacitor may be required
In SOT-23-5 package θJA=235 C/W. When operates the
o
APL5156 at TA=50 C, the maximum power dissipation
when the device is not near the source power supply or
when supplied by a battery. Small and surface-mounted
can be determined as below:
o
o
o
o
PD(MAX)=(125 C-50 C)/(235 C/W)
PD(MAX)=319.1mW
ceramic capacitors can be used for bypassing. A larger
value may be required if the source supply has high ripple.
Output Capacitor
Thermal Pad Consideration
The APL5156 requires an output capacitor for stability.
The design requires 2.2µF or greater on the output to
The SOP-8P is a cost-effective package which features a
small size, like a standard SOP-8, and a bottom thermal
maintain stability. It is optimized by using low-ESR ceramic chip capacitors. The maximum allowable ESR is
pad to minimize the thermal resistance of the package is
applicable to high current applications. The thermal pad
must be soldered down to the copper plane on circuit
3Ω. More capacitance improves transient response. Place
the output capacitor as close to the VOUT pin as possible.
board. Heat can be conducted away from the thermal
pad through the copper plane to ambient. If the copper
X7R/X5R dielectric-type ceramic capacitors are recommended because of their temperature performance. X7R
plane is not on the top surface of the circuit board, 4 or 6
vias should be used to thermally couple the thermal pad
type capacitors change capacitance by 15% over their
operating temperature ranges. To use a ceramic chip
to the bottom plane.
For good thermal conduction, the vias must be plated
capacitor with Y5V dielectric, the value must be much
higher than an X7R ceramic capacitor to ensure the same
through and solder filled. The copper plane used to conduct heat away from the thermal pad should be as large
minimum capacitance over the equivalent operating temperature range.
as practical.
No-Load Stability
0.072
0.118
The APL5156 will remain stable and in regulation with no
0.024
load unlike many other voltage regulators. This is especially important in CMOS RAM keep-alive applications.
0.150
Thermal Consideration
The thermal resistance of junction to ambient controls
the APL5156's maximum power dissipation. The power
dissipation across the device is PD=IOUT (VIN-VOUT), and the
ground
plane for
thermal
pad
0.212
maximum power dissipation is:
SOP-8P Layout Recommendation
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
9
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APL5156
Application Information (Cont.)
SOP-8P
Adjustable Regulator Application
The output voltage of APL5156 can be adjusted from 3V
to 20V by using two external resistors. The resistors set
0.024




6
5
0.138
where VREF=1.24V
Feedback resistor R2 should be larger than 100kΩ and
smaller than 1MΩ. The resistors should be placed as
0.118
0.212
 R
VOUT = VREF 1 +  1

  R2
7
0.072
8
the output voltage based on the following equation:
close the device as possible to avoid noise.
1
Recommended Minimum Footprint
2
0.050
3
4
Unit : Inch
SOT-23-5
0.05
0.1
0.076
0.038
0.02
Unit : Inch
SOT-89
0.067
0.104
0.140
0.076
0.059
0.022
Unit : Inch
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
10
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APL5156
Package Information
SOT-23-5
D
e
E
E1
SEE
VIEW A
b
c
0.25
A
L
0
GAUGE PLANE
SEATING PLANE
A1
A2
e1
VIEW A
S
Y
M
B
O
L
SOT-23-5
INCHES
MILLIMETERS
MIN.
MAX.
MIN.
A
MAX.
1.45
0.057
A1
0.00
0.15
0.000
0.006
A2
0.90
1.30
0.035
0.051
b
0.30
0.50
0.012
0.020
c
0.08
0.22
0.003
0.009
D
2.70
3.10
0.106
0.122
E
2.60
3.00
0.102
0.118
E1
1.40
1.80
0.055
e
0.95 BSC
e1
0.071
0.037 BSC
1.90 BSC
0.075 BSC
L
0.30
0.60
0
0°
8°
0.012
0°
0.024
8°
Note : 1. Follow JEDEC TO-178 AA.
2. Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
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APL5156
Package Information
SOT-89
A
C
L
H
E
E1
D
D1
e
e1
B
B1
S
Y
M
B
O
L
A
SOT-89
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
1.40
1.60
0.055
0.063
0.022
B
0.44
0.56
0.017
B1
0.36
0.48
0.014
0.019
0.017
C
0.35
0.44
0.014
D
4.40
4.60
0.173
0.181
D1
1.62
1.83
0.064
0.072
E
2.29
2.60
0.090
0.102
E1
2.13
2.29
0.084
0.090
e
1.50 BSC
e1
3.00 BSC
0.059 BSC
0.118 BSC
H
3.94
4.25
0.155
0.167
L
0.89
1.20
0.035
0.047
Note : Follow JEDEC TO-243 AA.
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
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APL5156
Package Information
SOP-8P
D
SEE VIEW A
h X 45o
E
THERMAL
PAD
E1
E2
D1
c
A1
0.25
A2
A
b
e
GAUGE PLANE
SEATING PLANE
θ
L
VIEW A
S
Y
M
B
O
L
SOP-8P
INCHES
MILLIMETERS
MIN.
MIN.
MAX.
A
MAX.
1.60
0.063
0.000
0.15
A1
0.00
A2
1.25
b
0.31
0.51
0.006
0.049
0.012
0.020
c
0.17
0.25
0.007
0.010
D
4.80
5.00
0.189
0.197
D1
2.50
3.50
0.098
0.138
E
5.80
6.20
0.228
0.244
0.157
0.118
E1
3.80
4.00
0.150
E2
2.00
3.00
0.079
h
0.25
0.50
0.010
0.020
L
0.40
1.27
0.016
0.050
e
0
1.27 BSC
o
0C
0.050 BSC
o
o
8C
0C
8oC
Note : 1. Followed from JEDEC MS-012 BA.
2. Dimension "D" does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion or gate burrs shall not exceed 6 mil per side .
3. Dimension "E" does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 10 mil per side.
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
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APL5156
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
SOT-23-5
Application
SOT-89
Application
SOP-8P
A
H
T1
C
d
D
W
E1
F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20
3.10±0.20
1.50±0.20
4.0±0.10
4.0±0.10
A
H
T1
C
d
D
W
E1
F
178.0±2.00
50 MIN.
12.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
12.0±0.30
1.75±0.10
5.50±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
4.0±0.10
8.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
4.80±0.20
4.50±0.20
1.80±0.20
A
H
T1
C
d
D
W
E1
F
330.0±2.00
50 MIN.
12.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
12.0±0.30
1.75±0.10
5.5±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
6.40±0.20
5.20±0.20
2.10±0.20
4.0±0.10
8.0±0.10
(mm)
Copyright  ANPEC Electronics Corp.
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APL5156
Devices Per Unit
Package Type
Unit
Quantity
SOT-23-5
Tape & Reel
3000
SOT-89
Tape & Reel
1000
SOP-8P
Tape & Reel
2500
Taping Direction Information
SOT-23-5
USER DIRECTION OF FEED
SOT-89
USER DIRECTION OF FEED
Copyright  ANPEC Electronics Corp.
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APL5156
Taping Direction Information
SOP-8P
USER DIRECTION OF FEED
Classification Profile
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
16
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APL5156
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3°C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
3
Package
Thickness
<2.5 mm
Volume mm
<350
235 °C
Volume mm
≥350
220 °C
≥2.5 mm
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
17
Description
5 Sec, 245°C
1000 Hrs, Bias @ 125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
www.anpec.com.tw
APL5156
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
18
www.anpec.com.tw
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