OPA170 OPA2170 OPA4170 SBOS557A – AUGUST 2011 – REVISED SEPTEMBER 2011 www.ti.com 36V, Single-Supply, SOT553, Low-Power OPERATIONAL AMPLIFIERS Check for Samples: OPA170, OPA2170, OPA4170 FEATURES DESCRIPTION • • • • • • • • • • • The OPA170, OPA2170 and OPA4170 (OPAx170) are a family of 36V, single-supply, low-noise operational amplifiers that feature micro packages with the ability to operate on supplies ranging from +2.7V (±1.35V) to +36V (±18V). They offer good offset, drift, and bandwidth with low quiescent current. The single, dual, and quad versions all have identical specifications for maximum design flexibility. 1 2 • Supply Range: +2.7V to +36V, ±1.35V to ±18V Low Noise: 19nV/√Hz RFI Filtered Inputs Input Range Includes the Negative Supply Input Range Operates to Positive Supply Rail-to-Rail Output Gain Bandwidth: 1.2MHz Low Quiescent Current: 110µA per Amplifier High Common-Mode Rejection: 120dB Low Bias Current: 15pA (max) Industry-Standard Packages: – 8-Pin SOIC – 8-Pin MSOP – 14-Pin TSSOP microPackages: – Single in 5-Pin SOT553 – Dual in 8-Pin VSSOP APPLICATIONS • • • • • • • • • Tracking Amplifier in Power Modules Merchant Power Supplies Transducer Amplifiers Bridge Amplifiers Temperature Measurements Strain Gauge Amplifiers Precision Integrators Battery-Powered Instruments Test Equipment Unlike most op amps, which are specified at only one supply voltage, the OPAx170 family of op amps is specified from +2.7V to +36V. Input signals beyond the supply rails do not cause phase reversal. The OPAx170 family is stable with capacitive loads up to 300pF. The input can operate 100mV below the negative rail and within 2V of the positive rail for normal operation. Note that these devices can operate with full rail-to-rail input 100mV beyond the positive rail, but with reduced performance within 2V of the positive rail. The OPA170 is available in SOT553, SOT23-5, and SO-8 packages. The dual OPA2170 comes in VSSOP-8, MSOP-8, and SO-8 packages. The quad OPA4170 is offered in TSSOP-14 and SO-14 packages. The OPAx170 op amps are specified from –40°C to +125°C. Package Footprint Comparison (to Scale) Product Family DEVICE PACKAGE OPA170 (single) SOT553, SOT23-5, SO-8 OPA2170 (dual) VSSOP-8, MSOP-8, SO-8 OPA4170 (quad) TSSOP-14, SO-14 Package Height Comparison (to Scale) . D (SO-8) DBV (SOT23-5) DRL (SOT553) Smallest Packaging for 36V Op Amps 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2011, Texas Instruments Incorporated OPA170 OPA2170 OPA4170 SBOS557A – AUGUST 2011 – REVISED SEPTEMBER 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION (1) PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING SOT553-5 DRL DAQ OPA170 OPA2170 SOT23-5 DBV OSVI SO-8 D O170A MSOP-8 DGK OPNI VSSOP-8 DCU OPQC SO-8 D 2170A SO-14 D OPA4170 TSSOP-14 PW OPA4170 OPA4170 (1) ORDERING NUMBER TRANSPORT MEDIA, QUANTITY OPA170AIDRLT Tape and Reel, 250 OPA170AIDRLR Tape and Reel, 4000 OPA170AIDBVT Tape and Reel, 250 OPA170AIDBVR Tape and Reel, 3000 OPA170AID Rail, 75 OPA170AIDR Tape and Reel, 2500 OPA2170AIDGK Rail, 80 OPA2170AIDGKR Tape and Reel, 2500 OPA2170AIDCUT Tape and Reel, 250 OPA2170AIDCUR Tape and Reel, 3000 OPA2170AID Rail, 75 OPA2170AIDR Tape and Reel, 2500 OPA4170AID Rail, 50 OPA4170AIDR Tape and Reel, 2500 OPA4170AIPW Rail, 90 OPA4170AIPWR Tape and Reel, 2000 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range, unless otherwise noted. Supply voltage Signal input terminals OPA170, OPA2170, OPA4170 UNIT ±20, +40 (single supply) V Voltage (V–) – 0.5 to (V+) + 0.5 V Current ±10 mA Output short circuit (2) Continuous Operating temperature –55 to +150 °C Storage temperature –65 to +150 °C Junction temperature +150 °C 4 kV 750 V ESD ratings (1) (2) 2 Human body model (HBM) Charged device model (CDM) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. Short-circuit to ground, one amplifier per package. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA170 OPA2170 OPA4170 OPA170 OPA2170 OPA4170 SBOS557A – AUGUST 2011 – REVISED SEPTEMBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS Boldface limits apply over the specified temperature range, TA = –40°C to +125°C. At TA = +25°C, VCM = VOUT = VS/2, and RL = 10kΩ connected to VS/2, unless otherwise noted. OPA170, OPA2170, OPA4170 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 0.25 ±1.8 mV ±2 mV OFFSET VOLTAGE Input offset voltage VOS Over temperature Drift vs power supply ±0.3 ±2 µV/°C VS = +4V to +36V 1 ±5 µV/V dc 5 dVOS/dT PSRR Channel separation, dc µV/V INPUT BIAS CURRENT Input bias current ±8 IB Over temperature Input offset current ±4 IOS Over temperature ±15 pA ±3.5 nA ±15 pA ±3.5 nA NOISE Input voltage noise Input voltage noise density en f = 0.1Hz to 10Hz 2 µVPP f = 100Hz 22 nV/√Hz f = 1kHz 19 nV/√Hz INPUT VOLTAGE Common-mode voltage range (1) Common-mode rejection ratio (V–) – 0.1V VCM CMRR (V+) – 2V V VS = ±2V, (V–) – 0.1V < VCM < (V+) – 2V 90 104 dB VS = ±18V, (V–) – 0.1V < VCM < (V+) – 2V 104 120 dB INPUT IMPEDANCE Differential 100 || 3 Common-mode MΩ || pF 6 || 3 1012 Ω || pF 130 dB OPEN-LOOP GAIN Open-loop voltage gain VS = +4V to +36V, (V–) + 0.35V < VO < (V+) – 0.35V AOL 110 FREQUENCY RESPONSE Gain bandwidth product Slew rate Settling time GBP SR tS MHz 0.4 V/µs To 0.1%, VS = ±18V, G = +1, 10V step 20 µs To 0.01% (12 bit), VS = ±18V, G = +1, 10V step 28 µs 2 µs 0.0002 % VIN × Gain > VS Overload recovery time Total harmonic distortion + noise 1.2 G = +1 THD+N G = +1, f = 1kHz, VO = 3VRMS OUTPUT Voltage output swing from rail VO Positive rail Negative Rail Over temperature Short-circuit current Capacitive load drive Open-loop output resistance IL = 0mA, VS = +4V to +36V 10 IL sourcing 1mA, VS = +4V to +36V 115 mV mV IL = 0mA, VS = +4V to +36V 8 mV IL sinking 1mA, VS = +4V to +36V 70 mV VS = 5V, RL = 10kΩ (V–) + 0.03 (V+) – 0.05 RL = 10kΩ, AOL ≥ 110dB (V–) + 0.35 (V+) – 0.35 ISC +17/–20 CLOAD f = 1MHz, IO = 0A V mA See Typical Characteristics RO V pF Ω 900 POWER SUPPLY Specified voltage range VS Quiescent current per amplifier IQ +2.7 IO = 0A Over temperature (1) IO = 0A 110 +36 V 145 µA 155 µA The input range can be extended beyond (V+) – 2V up to V+. See the Typical Characteristics and Application Information sections for additional information. Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA170 OPA2170 OPA4170 Submit Documentation Feedback 3 OPA170 OPA2170 OPA4170 SBOS557A – AUGUST 2011 – REVISED SEPTEMBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Boldface limits apply over the specified temperature range, TA = –40°C to +125°C. At TA = +25°C, VCM = VOUT = VS/2, and RL = 10kΩ connected to VS/2, unless otherwise noted. OPA170, OPA2170, OPA4170 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TEMPERATURE Specified range –40 +125 °C Operating range –55 +150 °C THERMAL INFORMATION: OPA170 OPA170 THERMAL METRIC (1) D (SO) DBV (SOT23) DRL (SOT553) 8 PINS 5 PINS 5 PINS 208.1 θJA Junction-to-ambient thermal resistance 149.5 245.8 θJC(top) Junction-to-case(top) thermal resistance 97.9 133.9 0.1 θJB Junction-to-board thermal resistance 87.7 83.6 42.4 ψJT Junction-to-top characterization parameter 35.5 18.2 0.5 ψJB Junction-to-board characterization parameter 89.5 83.1 42.2 θJC(bottom) Junction-to-case(bottom) thermal resistance N/A N/A N/A (1) UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. THERMAL INFORMATION: OPA2170 OPA2170 THERMAL METRIC (1) D (SO) DCU (VSSOP) DGK (MSOP) 8 PINS 8 PINS 8 PINS 180 θJA Junction-to-ambient thermal resistance 134.3 175.2 θJC(top) Junction-to-case(top) thermal resistance 72.1 74.9 55 θJB Junction-to-board thermal resistance 60.6 22.2 130 ψJT Junction-to-top characterization parameter 18.2 1.6 5.3 ψJB Junction-to-board characterization parameter 53.8 22.8 120 θJC(bottom) Junction-to-case(bottom) thermal resistance N/A N/A N/A (1) UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. THERMAL INFORMATION: OPA4170 OPA4170 THERMAL METRIC (1) D (SO) PW (TSSOP) 14 PINS 14 PINS θJA Junction-to-ambient thermal resistance 93.2 106.9 θJC(top) Junction-to-case(top) thermal resistance 51.8 24.4 θJB Junction-to-board thermal resistance 49.4 59.3 ψJT Junction-to-top characterization parameter 13.5 0.6 ψJB Junction-to-board characterization parameter 42.2 54.3 θJC(bottom) Junction-to-case(bottom) thermal resistance N/A N/A (1) 4 UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA170 OPA2170 OPA4170 OPA170 OPA2170 OPA4170 SBOS557A – AUGUST 2011 – REVISED SEPTEMBER 2011 www.ti.com PIN CONFIGURATIONS DRL PACKAGE: OPA170 SOT-553 (TOP VIEW) IN+ 1 V- 2 IN- 3 5 4 D, DGK, AND DCU PACKAGES: OPA2170 MSOP-8, SO-8, AND VSSOP-8 (TOP VIEW) V+ 1 V- 2 +IN 3 NC (1) 1 8 V+ -IN A 2 7 OUT B +IN A 3 6 -IN B V- 4 5 +IN B 5 V+ 4 -IN D AND PW PACKAGES: OPA4170 SO-14 AND TSSOP-14 (TOP VIEW) D PACKAGE: OPA170 SO-8 (TOP VIEW) (1) 1 OUT DBV PACKAGE: OPA170 SOT23-5 (TOP VIEW) OUT OUT A 8 NC(1) -IN 2 7 V+ +IN 3 6 OUT V- 4 5 NC(1) OUT A 1 14 OUT D -IN A 2 13 -IN D +IN A 3 12 +IN D V+ 4 11 V- +IN B 5 10 +IN C -IN B 6 9 -IN C OUT B 7 8 OUT C No internal connection. Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA170 OPA2170 OPA4170 Submit Documentation Feedback 5 OPA170 OPA2170 OPA4170 SBOS557A – AUGUST 2011 – REVISED SEPTEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS TABLE OF GRAPHS Table 1. Characteristic Performance Measurements 6 DESCRIPTION FIGURE Offset Voltage Production Distribution Figure 1 Offset Voltage Drift Distribution Figure 2 Offset Voltage vs Temperature Figure 3 Offset Voltage vs Common-Mode Voltage Figure 4 Offset Voltage vs Common-Mode Voltage (Upper Stage) Figure 5 Offset Voltage vs Power Supply Figure 6 IB and IOS vs Common-Mode Voltage Figure 7 Input Bias Current vs Temperature Figure 8 Output Voltage Swing vs Output Current (Maximum Supply) Figure 9 CMRR and PSRR vs Frequency (Referred-to Input) Figure 10 CMRR vs Temperature Figure 11 PSRR vs Temperature Figure 12 0.1Hz to 10Hz Noise Figure 13 Input Voltage Noise Spectral Density vs Frequency Figure 14 THD+N Ratio vs Frequency Figure 15 THD+N vs Output Amplitude Figure 16 Quiescent Current vs Temperature Figure 17 Quiescent Current vs Supply Voltage Figure 18 Open-Loop Gain and Phase vs Frequency Figure 19 Closed-Loop Gain vs Frequency Figure 20 Open-Loop Gain vs Temperature Figure 21 Open-Loop Output Impedance vs Frequency Figure 22 Small-Signal Overshoot vs Capacitive Load (100mV Output Step) Figure 23, Figure 24 No Phase Reversal Figure 25 Positive Overload Recovery Figure 26 Negative Overload Recovery Figure 27 Small-Signal Step Response (100mV) Figure 28, Figure 29 Large-Signal Step Response Figure 30, Figure 31 Large-Signal Settling Time (10V Positive Step) Figure 32 Large-Signal Settling Time (10V Negative Step) Figure 33 Short-Circuit Current vs Temperature Figure 34 Maximum Output Voltage vs Frequency Figure 35 EMIRR IN+ vs Frequency Figure 36 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA170 OPA2170 OPA4170 OPA170 OPA2170 OPA4170 SBOS557A – AUGUST 2011 – REVISED SEPTEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS VS = ±18V, VCM = VS/2, RLOAD = 10kΩ connected to VS/2, and CL = 100pF, unless otherwise noted. OFFSET VOLTAGE PRODUCTION DISTRIBUTION OFFSET VOLTAGE DRIFT DISTRIBUTION 25 20 Distribution Taken From 400 Amplifiers Distribution Taken From 104 Amplifiers Percentage of Amplifiers (%) Percentage of Amplifiers (%) 18 16 14 12 10 8 6 4 20 15 10 5 2 0 −1200 −1100 −1000 −900 −800 −700 −600 −500 −400 −300 −200 −100 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 0 Offset Voltage (µV) Offset Voltage Drift (µV/°C) G001 G002 Figure 1. Figure 2. OFFSET VOLTAGE vs TEMPERATURE OFFSET VOLTAGE vs COMMON-MODE VOLTAGE 1000 800 5 Typical Units Shown Offset Voltage (mV) Offset Voltage (µV) 600 400 200 0 −200 −400 VCM = - 18.1V −600 −800 −1000 −50 −25 0 25 50 75 Temperature (°C) 100 125 150 Common-Mode Voltage (V) G003 Figure 3. Figure 4. OFFSET VOLTAGE vs COMMON-MODE VOLTAGE (Upper Stage) OFFSET VOLTAGE vs POWER SUPPLY 500 VSUPPLY = ±1.35V to ± 18V 5 Typical Units Shown 5 Typical Units Shown Offset Voltage (µV) Offset Voltage (mV) 300 Normal Operation 100 −100 −300 −500 0 2 4 Common-Mode Voltage (V) Figure 5. 6 8 10 12 VSUPPLY (V) 14 16 18 20 G006 Figure 6. Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA170 OPA2170 OPA4170 Submit Documentation Feedback 7 OPA170 OPA2170 OPA4170 SBOS557A – AUGUST 2011 – REVISED SEPTEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) VS = ±18V, VCM = VS/2, RLOAD = 10kΩ connected to VS/2, and CL = 100pF, unless otherwise noted. IB AND IOS vs COMMON-MODE VOLTAGE INPUT BIAS CURRENT vs TEMPERATURE 12 2000 10 1500 +IB 8 6 IOS 4 -IB IBIOS Input Bias Current (pA) IB and IOS (pA) IB+ 1000 500 0 2 -500 VCM = 16.1V VCM = -18.1V 0 -1000 -20 -15 -10 0 -5 5 10 15 20 -75 -50 -25 0 VCM (V) 100 OUTPUT VOLTAGE SWING vs OUTPUT CURRENT (Maximum Supply) CMRR AND PSRR vs FREQUENCY (Referred-to Input) 125 150 140 Common-Mode Rejection Ratio (dB), Power-Supply Rejection Ratio (dB) 16 15 14.5 -14.5 -15 -40°C +25°C +125°C -16 -17 120 100 80 60 40 +PSRR -PSRR CMRR 20 0 -18 0 1 2 3 4 5 6 7 8 9 1 10 10 100 1k 10k 100k 1M Frequency (Hz) Output Current (mA) Figure 9. Figure 10. CMRR vs TEMPERATURE PSRR vs TEMPERATURE VS = ±1.35V VS = ±2V 25 VS = ±18V 20 15 10 5 -75 -50 -25 0 25 50 75 100 125 150 Power−Supply Rejection Ratio (µV/V) 3 30 0 2 1 0 −1 −2 −3 −75 VS = 2.7V to 36V VS = 4V to 36V −50 −25 0 25 50 75 Temperature (°C) Temperature (°C) Figure 11. 8 75 Figure 8. 17 Output Voltage (V) 50 Figure 7. 18 Common-Mode Rejection Ratio (mV/V) 25 Temperature (°C) 100 125 150 G012 Figure 12. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA170 OPA2170 OPA4170 OPA170 OPA2170 OPA4170 SBOS557A – AUGUST 2011 – REVISED SEPTEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) VS = ±18V, VCM = VS/2, RLOAD = 10kΩ connected to VS/2, and CL = 100pF, unless otherwise noted. INPUT VOLTAGE NOISE SPECTRAL DENSITY vs FREQUENCY 0.1Hz TO 10Hz NOISE 1mV/div Voltage Noise Density (nV/ Hz) 1000 100 10 1 1 10 100 Figure 13. 0.0001 -120 1k -140 100k 10k Total Harmonic Distortion + Noise (%) Total Harmonic Distortion + Noise (%) G014 BW = 80kHz G = +1 RL = 10kW -60 0.01 -80 0.001 -100 0.0001 -120 0.00001 0.01 0.1 1 10 Total Harmonic Distortion + Noise (dB) -100 0.1 Total Harmonic Distortion + Noise (dB) 0.001 100 1M THD+N vs OUTPUT AMPLITUDE -80 VOUT = 3VRMS BW = 80kHz G = +1 RL = 10kW 0.00001 10 100k Figure 14. THD+N RATIO vs FREQUENCY 0.01 1k 10k Frequency (Hz) -140 20 Output Amplitude (VRMS) Frequency (Hz) Figure 15. Figure 16. QUIESCENT CURRENT vs TEMPERATURE QUIESCENT CURRENT vs SUPPLY VOLTAGE 140 130 VS = ±18V 120 IQ (mA) 110 100 90 80 70 VS = ±1.35V 60 −50 −25 0 25 50 75 Temperature (°C) 100 125 150 G017 Figure 17. Figure 18. Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA170 OPA2170 OPA4170 Submit Documentation Feedback 9 OPA170 OPA2170 OPA4170 SBOS557A – AUGUST 2011 – REVISED SEPTEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) VS = ±18V, VCM = VS/2, RLOAD = 10kΩ connected to VS/2, and CL = 100pF, unless otherwise noted. OPEN-LOOP GAIN AND PHASE vs FREQUENCY 140 120 90 Gain 100 40 45 30 0 -45 40 -90 20 -135 0 -180 -20 -225 -40 0.1 1 10 100 1k 10k 100k 1M Phase (°) Phase 60 Gain (dB) 80 Gain (dB) CLOSED-LOOP GAIN vs FREQUENCY 50 135 20 10 0 G = −1 G=1 G = 10 −10 −20 -270 10M 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) Figure 19. 10M 100M G020 Figure 20. OPEN-LOOP GAIN vs TEMPERATURE OPEN-LOOP OUTPUT IMPEDANCE vs FREQUENCY 10k 3 VS = 2.7V VS = 4V 2.5 1k VS = 36V ZO (W) AOL (mV/V) 2 1.5 100 10 1 1 0.5 1m 0 -75 -50 -25 0 25 50 75 100 125 150 1 10 100 1k 10k 100k 10M Figure 21. Figure 22. SMALL-SIGNAL OVERSHOOT vs CAPACITIVE LOAD (100mV Output Step) SMALL-SIGNAL OVERSHOOT vs CAPACITIVE LOAD (100mV Output Step) W W G = +1 +18V RI = 10kW RF = 10kW ROUT W W W G = -1 +18V OPA170 RL CL -18V Figure 23. 10 1M Frequency (Hz) Temperature (°C) W W W ROUT OPA170 CL -18V Figure 24. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA170 OPA2170 OPA4170 OPA170 OPA2170 OPA4170 SBOS557A – AUGUST 2011 – REVISED SEPTEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) VS = ±18V, VCM = VS/2, RLOAD = 10kΩ connected to VS/2, and CL = 100pF, unless otherwise noted. NO PHASE REVERSAL POSITIVE OVERLOAD RECOVERY +18V OPA170 20kW 5V/div 5V/div -18V 37VPP Sine Wave (±18.5V) +18V 2kW OPA170 VOUT VIN -18V G = -10 Time (10ms/div) Time (100ms/div) Figure 25. Figure 26. NEGATIVE OVERLOAD RECOVERY SMALL-SIGNAL STEP RESPONSE (100mV) 20kW 2kW RL = 10kW CL = 10pF +18V OPA170 VOUT VIN 5V/div G = -10 20mV/div -18V +18V -18V Time (10ms/div) RL CL Time (5ms/div) Figure 27. Figure 28. SMALL-SIGNAL STEP RESPONSE (100mV) LARGE-SIGNAL STEP RESPONSE G = +1 RL = 10kW CL = 10pF RI = 2kW RF 2V/div RL = 10kW CL = 10pF 20mV/div G = +1 OPA170 = 2kW +18V OPA170 CL -18V G = -1 Time (50ms/div) Time (5ms/div) Figure 29. Figure 30. Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA170 OPA2170 OPA4170 Submit Documentation Feedback 11 OPA170 OPA2170 OPA4170 SBOS557A – AUGUST 2011 – REVISED SEPTEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) VS = ±18V, VCM = VS/2, RLOAD = 10kΩ connected to VS/2, and CL = 100pF, unless otherwise noted. LARGE-SIGNAL SETTLING TIME (10V Positive Step) LARGE-SIGNAL STEP RESPONSE 10 G = -1 RL = 10kW CL = 10pF 8 2V/div D From Final Value (mV) 6 4 12-Bit Settling 2 0 -2 (±1/2LSB = ±0.012%) -4 -6 -8 -10 Time (50ms/div) 0 10 20 30 40 50 60 70 80 90 100 Time (ms) Figure 31. Figure 32. LARGE-SIGNAL SETTLING TIME (10V Negative Step) 10 SHORT-CIRCUIT CURRENT vs TEMPERATURE G = -1 8 D From Final Value (mV) 6 4 12-Bit Settling ISC (mA) 2 0 -2 (±1/2LSB = ±0.012%) -4 -6 -8 −25 −30 −50 -10 0 10 20 30 40 50 30 25 20 15 10 5 0 −5 −10 −15 −20 60 ISC, Source ISC, Sink −25 0 25 50 75 Temperature (°C) 100 125 150 G034 Time (ms) Figure 33. Figure 34. MAXIMUM OUTPUT VOLTAGE vs FREQUENCY EMIRR IN+ vs FREQUENCY 15 140 VS = ±15 V 120 Maximum output range without slew−rate induced distortion 10 EMIRR IN+ (dB) Output Voltage (VPP ) 12.5 7.5 VS = ±5 V 5 2.5 0 VS = ±1.35 V 1k 10k 100 80 60 40 PRP = -10dBm VS = ±18V VCM = 0V 20 100k Frequency (Hz) 1M 10M 0 10M 100M G035 Figure 35. 12 1G 10G Frequency (Hz) Figure 36. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA170 OPA2170 OPA4170 OPA170 OPA2170 OPA4170 SBOS557A – AUGUST 2011 – REVISED SEPTEMBER 2011 www.ti.com APPLICATION INFORMATION The OPAx170 family of operational amplifiers provides high overall performance. These devices are ideal for many general-purpose applications. The excellent offset drift of only 2µV/°C provides excellent stability over the entire temperature range. In addition, the device offers very good overall performance with high CMRR, PSRR, and AOL. As with all amplifiers, applications with noisy or high-impedance power supplies require decoupling capacitors placed close to the device pins. In most cases, 0.1µF capacitors are adequate. OPERATING CHARACTERISTICS The OPAx170 family of amplifiers is specified for operation from 2.7V to 36V (±1.35V to ±18V). Many of the specifications apply from –40°C to +125°C. Parameters that can exhibit significant variance with regard to operating voltage or temperature are presented in the Typical Characteristics. This device can operate with full rail-to-rail input 100mV beyond the positive rail, but with reduced performance within 2V of the positive rail. The typical performance in this range is summarized in Table 2. PHASE-REVERSAL PROTECTION The OPAx170 family has an internal phase-reversal protection. Many op amps exhibit a phase reversal when the input is driven beyond its linear common-mode range. This condition is most often encountered in noninverting circuits when the input is driven beyond the specified common-mode voltage range, causing the output to reverse into the opposite rail. The input of the OPAx170 prevents phase reversal with excessive common-mode voltage. Instead, the output limits into the appropriate rail. This performance is shown in Figure 37. +18V OPA170 GENERAL LAYOUT GUIDELINES -18V 37VPP Sine Wave (±18.5V) 5V/div For best operational performance of the device, good printed circuit board (PCB) layout practices are recommended. Low-loss, 0.1µF bypass capacitors should be connected between each supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable to single-supply applications. Time (100ms/div) COMMON-MODE VOLTAGE RANGE The input common-mode voltage range of the OPAx170 series extends 100mV below the negative rail and within 2V of the positive rail for normal operation. Figure 37. No Phase Reversal Table 2. Typical Performance Range PARAMETER MIN TYP (V+) – 2 Input Common-Mode Voltage Offset voltage MAX (V+) + 0.1 UNIT V 7 mV vs Temperature 12 µV/°C Common-mode rejection 65 dB Open-loop gain 60 dB Gain-bandwidth product 0.3 MHz Slew rate 0.3 V/µs Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA170 OPA2170 OPA4170 Submit Documentation Feedback 13 OPA170 OPA2170 OPA4170 SBOS557A – AUGUST 2011 – REVISED SEPTEMBER 2011 www.ti.com CAPACITIVE LOAD AND STABILITY or even the output pin. Each of these different pin functions have electrical stress limits determined by the voltage breakdown characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin. Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect them from accidental ESD events both before and during product assembly. The dynamic characteristics of the OPAx170 have been optimized for common operating conditions. The combination of low closed-loop gain and high capacitive loads decreases the phase margin of the amplifier and can lead to gain peaking or oscillations. As a result, heavier capacitive loads must be isolated from the output. The simplest way to achieve this isolation is to add a small resistor (for example, ROUT equal to 50Ω) in series with the output. Figure 38 and Figure 39 illustrate graphs of small-signal overshoot versus capacitive load for several values of ROUT. Also, refer to Applications Bulletin AB-028, Feedback Plots Define Op Amp AC Performance (literature number SBOA015, available for download from the TI website), for details of analysis techniques and application circuits. These ESD protection diodes also provide in-circuit, input overdrive protection, as long as the current is limited to 10mA as stated in the Absolute Maximum Ratings. Figure 40 shows how a series input resistor may be added to the driven input to limit the input current. The added resistor contributes thermal noise at the amplifier input and its value should be kept to a minimum in noise-sensitive applications. V+ W IOVERLOAD 10mA max OPA170 VOUT VIN 5kW G = +1 +18V ROUT Figure 40. Input Current Protection OPA170 RL W W W CL -18V Figure 38. Small-Signal Overshoot versus Capacitive Load (100mV Output Step, G = +1) W RI = 10kW RF = 10kW G = -1 +18V W W W ROUT OPA170 CL -18V Figure 39. Small-Signal Overshoot versus Capacitive Load (100mV Output Step, G = –1) ELECTRICAL OVERSTRESS Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress. These questions tend to focus on the device inputs, but may involve the supply voltage pins 14 An ESD event produces a short duration, high-voltage pulse that is transformed into a short duration, high-current pulse as it discharges through a semiconductor device. The ESD protection circuits are designed to provide a current path around the operational amplifier core to prevent it from being damaged. The energy absorbed by the protection circuitry is then dissipated as heat. When the operational amplifier connects into a circuit, the ESD protection components are intended to remain inactive and not become involved in the application circuit operation. However, circumstances may arise where an applied voltage exceeds the operating voltage range of a given pin. Should this condition occur, there is a risk that some of the internal ESD protection circuits may be biased on, and conduct current. Any such current flow occurs through ESD cells and rarely involves the absorption device. If there is an uncertainty about the ability of the supply to absorb this current, external zener diodes may be added to the supply pins. The zener voltage must be selected such that the diode does not turn on during normal operation. However, its zener voltage should be low enough so that the zener diode conducts if the supply pin begins to rise above the safe operating supply voltage level. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA170 OPA2170 OPA4170 PACKAGE OPTION ADDENDUM www.ti.com 7-Sep-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) OPA170AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR OPA170AIDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR OPA170AIDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR OPA170AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR OPA170AIDRLR ACTIVE SOT DRL 5 4000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA170AIDRLT ACTIVE SOT DRL 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM OPA2170AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR OPA2170AIDGK ACTIVE VSSOP DGK 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR OPA2170AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR OPA2170AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR OPA4170AID ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR OPA4170AIDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR OPA4170AIPW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR OPA4170AIPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1 Samples (Requires Login) PACKAGE OPTION ADDENDUM www.ti.com 7-Sep-2012 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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OTHER QUALIFIED VERSIONS OF OPA170 : • Enhanced Product: OPA170-EP NOTE: Qualified Version Definitions: • Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 8-Sep-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) OPA170AIDBVR SOT-23 DBV 5 3000 180.0 OPA170AIDBVT SOT-23 DBV 5 250 OPA170AIDR SOIC D 8 2500 OPA170AIDRLR SOT DRL 5 OPA170AIDRLT SOT DRL OPA2170AIDGKR VSSOP OPA2170AIDR SOIC OPA4170AIDR OPA4170AIPWR B0 (mm) K0 (mm) P1 (mm) 8.4 3.23 3.17 1.37 4.0 180.0 8.4 3.23 3.17 1.37 330.0 12.4 6.4 5.2 2.1 4000 180.0 8.4 1.98 1.78 5 250 180.0 8.4 1.98 DGK 8 2500 330.0 12.4 D 8 2500 330.0 12.4 SOIC D 14 2500 330.0 TSSOP PW 14 2000 330.0 W Pin1 (mm) Quadrant 8.0 Q3 4.0 8.0 Q3 8.0 12.0 Q1 0.69 4.0 8.0 Q3 1.78 0.69 4.0 8.0 Q3 5.3 3.4 1.4 8.0 12.0 Q1 6.4 5.2 2.1 8.0 12.0 Q1 16.4 6.5 9.0 2.1 8.0 16.0 Q1 12.4 6.9 5.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 8-Sep-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) OPA170AIDBVR SOT-23 DBV 5 3000 202.0 201.0 28.0 OPA170AIDBVT SOT-23 DBV 5 250 202.0 201.0 28.0 OPA170AIDR SOIC D 8 2500 367.0 367.0 35.0 OPA170AIDRLR SOT DRL 5 4000 202.0 201.0 28.0 OPA170AIDRLT SOT DRL 5 250 202.0 201.0 28.0 OPA2170AIDGKR VSSOP DGK 8 2500 366.0 364.0 50.0 OPA2170AIDR SOIC D 8 2500 367.0 367.0 35.0 OPA4170AIDR SOIC D 14 2500 367.0 367.0 38.0 OPA4170AIPWR TSSOP PW 14 2000 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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