LSI LS7560 Brushless dc motor controller Datasheet

LS7560
LS7561
LSI/CSI
UL
®
LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747
(631) 271-0400 FAX (631) 271-0405
A3800
BRUSHLESS DC MOTOR CONTROLLER
GENERAL DESCRIPTION
The LS7560/LS7561 are CMOS integrated circuits designed to
control three or four phase brushless DC motors in a closed or
open loop configuration. The IC consists of a decoder which
provides proper commutation sequencing, a frequency-topulse width converter and error amplifier for closed loop motor
speed control, a PWM comparator and sawtooth oscillator for
external driver power control and a 5.5V reference generator
for supplying power to motor sensors. Also included is Fault
detection and indication, overcurrent sensing, dynamic motor
braking, forward/reverse input, sensor spacing selections and
an enable input control. The overcurrent sense condition will
disable all output drivers when using the LS7560 and only the
bottom drivers when using the LS7561.
The IC operates from 10V to 18V and provides CMOS compatible outputs for interfacing with external power devices.
Operating below 10V will activate a Fault Indication Output
and disable all Output Drivers.
INPUT/OUTPUT DESCRIPTION: (See Figure 2)
SEQUENCE SELECT Input (Pin 1 )
A High on this input selects 60°/300° and a Low selects 120°/
240° electrical sensor separation. Use of a 300° or 240° motor
will cause opposite direction rotation as compared to a 60° or
120° motor.
F/R Input (Pin 27)
A High on this input selects Forward direction and a Low selects Reverse direction. The motor drive outputs are disabled
for 2 clock cycles at the onset of a direction change.
7560-030599-1
FIGURE 1. PIN CONNECTION DIAGRAM
TOP VIEW
SEQUENCE SELECT
1
28
V DD (+V)
ENABLE 2
27
F/R
3
26
S3
RC 4
25
S2
FAULT INDICATOR
HALL
SENSORS
TACHOMETER OUT
5
24
S1
ERROR AMP (+)
6
23
BRAKE
22
BRAKE SELECT
21
PWM CONTROL
9
20
TOP DRIVER POLARITY SELECT
CURRENT SENSE (+) 10
19
VR
CURRENT SENSE (-) 11
18
V SS (-V)
OUT 6 12
17
OUT 1
OUT 5 13
16
OUT 2
OUT 4 14
15
OUT 3
ERROR AMP (-) 7
ERROR AMP OUT 8
OSCILLATOR
LS7560
FEATURES
• Open loop motor control
• Tachometer output for closed loop motor control
• Error Amplifier and PWM Speed Comparator with full accessibility
• High noise immunity Schmitt Triggers on Sensor inputs
• 5.5V Reference Supply for external sensors
• Cycle-by-cycle current sensing
• Static, or current limited dynamic, motor braking
• Output enable delay on speed direction reversal
• Enable input with fault sensing capability
• Fault Indicator output
• 60°/300° or 120°/240° electrical sensor spacing selection
• Selectable PWM of top and bottom drivers or bottom drivers only
• CMOS compatible motor outputs with drive capability
• Selectable top driver polarity
• Low power dissipation
• +10V to +18V operation (VDD-Vss)
• LS7560, LS7561 (DIP); LS7560-SD, LS7561-SD (Skinny DIP);
LS7560-S, LS7561-S (SOIC); LS7560-TS, LS7561-TS (TSSOP)
See Figure 1
July 2002
S1, S2, S3 Inputs (Pins 24, 25, 26)
Hall Sensor inputs which are decoded to determine the Motor
Commutation Sequence. An invalid input code disables all motor
outputs. Inputs have Schmitt Trigger buffers for noise immunity.
BRAKE Input (Pin 23)
With the BRAKE SELECT input Low, a High on the BRAKE input
forces the Top Drivers to an OFF condition and the Bottom Drivers
to a PWM ON condition. If the Motor is under Closed Loop control,
the Loop is automatically opened and the error amplifier output is
connected to the Error Amp (-) input. By controlling the voltage at
teh Error Amp (+) input, the PWM duty cycle is controlled during
braking. This manner of braking prevents the Bottom Motor Drivers
from drawing excessive current, a condition which can occur during
normal braking, when the Bottom Drivers are turned ON unconditionally. With the BRAKE SELECT input High, a High on the
BRAKE input unconditionally causes the Top Drivers to turn OFF
and the Bottom Drivers to turn ON. The BRAKE function has priority over all other functions.
BRAKE SELECT Input (Pin 22)
A Low on this input selects PWM control of braking and a High selects unconditional braking.
ENABLE Input (Pin 2)
When the ENABLE input is above VR/2, all Output Drivers are enabled and when it is below VR/2.2, all Output Drivers are disabled.
This input has a nominal hysteresis of .05V R, where VR is the internally generated Reference Voltage available on Pin 19. Because
the ENABLE input is level sensitive, it can easily be used to control
operation of the IC based on an Analog Fault Condition.
ERROR AMPLIFIER Inputs (Pins 6, 7 ) Output (Pin 8)
For closed loop control, the TACHOMETER Output is applied
through a resistor to the negative input of the Error Amplifier on
Pin 7. A speed control potentiometer is connected to the positive
input of the Error Amplifier on Pin 6. A parallel RC Network is connected between the Output of the Error Amplifier on Pin 8 and Pin
7. The Amplifier, configured this way, enables the variable pulse
width to be converted to a DC voltage which is used to control the
motor speed. The potentiometer is used to set the desired motor
speed. For open loop control, configure the Error Amplifier as a
voltage follower by connecting Pin 7 directly to Pin 8 and do not
connect the TACHOMETER Output signal to the Error Amplifier.
OSCILLATOR (Pin 9)
An external RC network is connected to this input to set the frequency of the Sawtooth Schmitt Trigger Oscillator. The Sawtooth
is applied to the PWM Comparator along with the output of the Error Amplifier. The output of the PWM Comparator is a Pulse
Width Modulated Signal which is used to vary the effective drive
to the motor and, hence, the motor speed.
OVERCURRENT SENSE (Pins 10, 11)
The input to Pin 10 comes from the high side of a fractional ohm
current sensing resistor. The voltage at this input is compared to
an internal 100mV Reference. When the voltage exceeds the
100mV Reference, an Overcurrent Condition exists and the Output Drivers are switched OFF until the end of the sawtooth oscillator ramp-up. When the sawtooth switches low, the Overcurrent Condition is sampled, and if it no longer exists, the Output
Drivers are switched ON again. Otherwise, the Output Drivers remain OFF until the end of the next sawtooth. The input to Pin 11
comes from the low side (Gnd) of the current sensing resistor and
connects to the low side of the internal 100mV Reference.
TOP DRIVER POLARITY SELECT Input (Pin 20)
A High on this input selects a High Polarity for the Top Output
Drivers Motor ON condition and a Low selects a Low Polarity.
OUTPUT DRIVERS (Pins 12, 13, 14, 15, 16, 17)
Each Driver Output provides a CMOS compatible signal for driving Buffers/Power Transistors. The Outputs are capable of sinking/sourcing 25mA with a 1.5V drop across the IC, at VDD = 12V.
PWM CONTROL Input (Pin 21)
A High on this input causes only the Bottom Drivers to be Pulse
Width Modulated. A Low on this input causes both Top and Bottom Drivers to have PWM.
TACHOMETER Output (Pin 5)
The output of the Frequency To Pulse Width Converter is tied to
this pin. The Converter uses the three SENSOR Inputs and external RC Network to generate a variable frequency output with a
fixed positive pulse width.
FAULT INDICATOR Output (Pin 3)
Open drain output to provide sinking current for driving an external device such as an LED to indicate a malfunction condition.
The output occurs under any of the following conditions:
1) Overcurrent Sense condition
2) ENABLE Input below VR/2.2
3) Invalid Sensor code
4) Chip power supply less than 9V
5) VR Output less than 4.1V
RC Input (Pin 4)
The external RC network connected to this input programs the
positive pulse width of the Frequency to Pulse Width Converter.
VR Output (Pin 19)
5.5V Reference Voltage Output that can supply 20mA of current
at VDD =12V for powering input Sensors.
VSS (Pin 18)
VSS is Supply Voltage negative terminal.
VDD (Pin 28)
VDD is Supply Voltage positive terminal.
MAXIMUM RATINGS (Voltages referenced to Vss)
Power Supply Voltage
Voltage at any input
Operating Temperature
Storage Temperature
Output Drive Sink/Source Current
VR Output Source Current
SYMBOL
VDD
VIN
TA
TSTG
Io
IR
VALUE
20
Vss - 0.3 to VR
-25 to +85
-65 to +150
75
30
UNIT
V
V
°C
°C
mA
mA
ELECTRICAL CHARACTERISTICS
VDD = 12V, RT = 47kΩ, CT = 0.001µF, RS = 10kΩ, CS= 0.01µF (See Figure 3) TA = 25°C, unless otherwise specified
PARAMETER
Reference Voltage
Line Regulation
VDD = 10V to 18V, IREF =1.0mA
Temperature Stability
TA = 0°C to 70°C
TA = 0°C to 85°C
Error Amplifier:
Input Offset Voltage
Input Current
Input Common Mode Voltage Range
Open Loop Voltage Gain (RL=15KΩ)
Common Mode Rejection Ratio
Power Supply Rejection Ratio
7560-040198-2
SYMBOL
VR
∆VR
∆VR
∆VR
VIO
IIN
VICR
AVOL
CMRR
PSRR
MIN
4.75
-
-
(0 to VR)
70
60
60
TYP
5.5
100
MAX
6.25
200
UNIT
V
mV
+/- 1.0
+/- 1.3
-
%
%
5
0
15
10
80
-
-
mV
nA
V
dB
dB
dB
PARAMETER
Output High State (RL=15kΩ to Ground)
Output Low State (RL = 15kΩ to VR)
Output Source or Sink Current
SYMBOL
VOH
VOL
Io
MIN
TYP
MAX
VR
-
-
1.0
1.0
UNIT
V
V
mA
Oscillator:
Oscillator Frequency
Percentage Frequency Change per Volt
(VDD = 10V to 18V)
FOSC
∆F OSC ∆V
F
21
-
24
0.4
27
1.0
kHz
%/V
Sawtooth High Voltage
Sawtooth Low Voltage
Capacitor Discharge Current
VOSCP
VOSCV
ID
0.7
0.6
3.8
1.0
1.0
4.5
2.5
V
V
mA
Logic Inputs:
Input Threshold Voltage
(Pins 1, 20, 21, 22, 23, 24, 25, 26, 27)
VIH
VIL
3.0
-
2.3
1.8
1.4
V
V
Brake and Sensor (Pins 23, 24, 25, 26)
High State Input Current (VIN = 4V)
Low State Input Current (VIL = 0V)
IIH
IIL
-36
-50
-27
-40
-20
-30
µA
µA
Sequence Select, Top Driver Polarity
Select, PWM Control, Brake Select,
and F/R Select (Pins 1, 20, 21, 22, 27)
High State Input Current (VIN = 4V)
Low State Input Current (VIL = 0V)
IIH
IIL
-16
-25
-12
-17
-8
-10
µA
µA
ENABLE Input Threshold Voltage (Pin 2)
Hysteresis
ENABLE Input Current
VIH
VH
IIN
2.1
0.2
-
2.8
0.3
-
3.2
0.4
10
V
V
nA
Overcurrent Sense Comparator:
Input Threshold Voltage
Input Current
VIH
IIN
85
-
100
-
115
10
mV
nA
Outputs:
Closed Loop Control Section:
Tachometer Out
Output High Voltage (Isource = 1.5mA)
Output Low Voltage (ISINK = 5mA)
Pulse Width
Capacitor Discharge Current (RC Terminal)
VOH
VOL
TW
ID
VR - 0.8
0.18
95
1.8
VR - 0.5
0.27
105
3
VR-.3
0.40
115
7.5
V
V
µs
mA
Output Drivers (Pins 12, 13, 14, 15, 16, 17)
Sourcing 25mA
Sourcing 50mA
Sinking 25mA
Sinking 50mA
Switching Times
(CL = 250pF)
Switching Times
(CL = 1000pF)
FAULT Output Voltage (ISINK = 16mA)
FAULT Off-State Leakage
VOH
VOH
VOL
VOL
TR
TF
TR
TF
VFO
IF
9.5
8
1.0
2.75
30
35
100
130
47
-
10.5
8.8
1.30
3.40
45
50
150
180
10
11
9.5
2.0
4.2
60
65
200
230
-
V
V
V
V
ns
ns
ns
ns
kΩ
nA
Under Voltage Lockout:
For VDD
Hysteresis
For VR
Hysteresis
VUV
VH
VUVR
VH
7.0
0.45
3.5
0.16
8.5
0.65
4.1
0.3
10
0.85
4.8
0.4
V
V
V
V
Power Supply Current
VDD = 10V
VDD = 12V
VDD = 18V
IDD
IDD
IDD
-
2.0
3.0
7.0
2.5
4.0
11.0
mA
mA
mA
7560-040298-3
SEQUENCE
SELECT In
FAULT INDICATOR Out
3
1
VR VR VR
PWM CONTROL
In
21
VR
VR
VR
TOP DRIVER
20
POLARITY SELECT In
VDD
26
SENSOR
25
Inputs
DECODER
24
F/R
17 O1
VDD
VR
16 O2
27
VDD
ENABLE
2
In
VR/2
+
_
15 O3
FREQUENCY
TO
PULSE WIDTH
CONVERTER
VDD
REFERENCE
GENERATOR
VDD
VR 19
VDD
14 O4
CONTROL
VDD
SWITCH
4
RC In
13 O5
LOW VDD
DETECT
VDD
LOW VR DETECT
TACHOMETER
Out
12 O6
5
VDD
VR
SWITCH
ERROR AMP (-)
7
ERROR AMP (+)
6
ERROR AMP Out
8
EDGE TRIGGERED
DELAY
_
SWITCH
_
ERROR
AMP
+
PWM
GEN.
+
R
Q
22 BRAKE SELECT
CONTROL
VR
23
S
9
OSCILLATOR
10
OVERCURRENT
SENSE In
11
- +
100mV
S
28
VDD
-V
18
VSS
Q
INTERNAL BOND PAD
_
R
FIGURE 2. LS7560/LS7561 MOTOR CONTROLLER BLOCK DIAGRAM
7560/61-030599-4
+V
OSC.
+
TOP
DRIVER
Outputs
NC FOR LS7560
VDD FOR LS7561
BRAKE In
BOTTOM
DRIVER
Outputs
S2
S1
S3
VM
24
S1
17
S1
S2
16
S2
OUT2
26
S3
ROTOR
OUT1
25
FIGURE 3. The closed loop motor control operation is achieved
by applying the
Tachometer
Output at Pin 5 into the negative
terminal of the Error Amplifier
(Pin 7) through an R1-C1-R2 integrating network. The R1-C1
network is configured as a feedback circuit around the amplifier.
Since the Tachometer Output
has a fixed positive pulse width,
the average value of the pulse
train is directly proportional to
the motor speed. The desired
speed is selected by applying a
voltage at the positive input
(Pin 6) of the Error Amplifier.
The resultant output voltage of
the Error Amplifier is applied to
an internal Comparator along
with a ramp waveform generated by the RC Network at Pin
9. The PWM signal at the Comparator output is used to drive
outputs 1 thru 6 and complete
the closed loop. For this configuration, Pin 20, the Top Driver
Polarity Select must be tied to
Ground.
S3
27
21
20
OUT3
15
OUT4
14
F/R
PWM CNTRL
TOP DRV
POL SEL
OUT5
OUT6
13
12
22
BRAKE SEL
23
(+)
OVERCURRENT
SENSE
BRAKE
(-)
1
SEQ SEL
TACH OUT
2
11
(-)
ERROR OUT
AMP
(+)
**
* R2
5
100K
7
ENABLE
19
VR
10
*R1
1.0M
8
6
* C1
0.1µF
* TYPICAL
VALUES
* 10K
VR
18
VM
R3
V SS
9
OSC
28
RT
CT
V DD
4
VR
RC
3
CS
FAULT
Rs
FIGURE 3. THREE PHASE CLOSED LOOP FULL WAVE MOTOR CONTROLLER
VR
OUT6
19
12
ERROR AMP(-) 7
VM
VR
19 V R
OUT5
13
R
ENABLE
8
RT
9
2
ERROR AMP
OUT
CT
OSC
ERROR AMP(+)
6
14
C
OUT4
10
23
BRAKE
(+)
OVERCURRENT
S E N S E 11
(-)
FIGURE 4. THREE PHASE HALF WAVE MOTOR CONTROLLER
FIGURE 4. This three phase half wave motor controller has no top power transistor to disconnect the windings from the power supply when the BRAKE is applied. Instead, a switching transistor is used which will permit braking for a time
determined by the RC time constant. When the capacitor discharges past the
ENABLE input switching point, the outputs will be turned off.
7560-120497-5
FIGURE 5. OPEN LOOP CONTROLLER
FIGURE 5. In this configuration, the PWM output
duty cycle to the motor drivers is directly proportional to the DC voltage applied to Pin 6, since
Pins 7 and 8 are tied together.
VM
VM
S1
S1
OUT1
24
S2,S3
ROTOR
17
1
S1
3
S2,S3
25
VM
S2
15
OUT3
26
4
S3
20
TOP
OUT4
DRIVER
POLARITY
SELECT
2
14
12
23
BRAKE
OUT6
(+)
10
OVERCURRENT
SENSE
(+)
11
FIGURE 6.
FOUR PHASE FULL WAVE MOTOR CONTROLLER
FIGURE 6. Four phase motor control requires only two Hall Sensor inputs spaced 90 electrical
degrees apart. S1 is connected to one sensor and S2 and S3 are tied together and connected to
the other sensor (Refer to Table 1). The BRAKE input (Pin 23) is used to control the Top Driver
Select (Pin 20) and the Top Motor Drivers. When the BRAKE input is applied, the Top Motor drivers are turned off and the Top Driver Polarity Select is forced low turning on the Outputs 1 and 3.
Since Outputs 4 and 6 are also turned on, the motor windings become shorted together.
The information included herein is believed to be
accurate and reliable. However, LSI Computer Systems,
Inc. assumes no responsibilities for inaccuracies, nor for
any infringements of patent rights of others which may
result from its use.
7560-082197-6
19
VR
OUT1
2
ENABLE
OUT3
17
15
VM
20
TOP DRIVER
POLARITY
SELECT
OUT4
23
BRAKE
OUT6
(+)
OVERCURRENT
SENSE
(-)
14
12
10
11
FIGURE 7. FOUR PHASE HALFWAVE MOTOR CONTROLLER
FIGURE 7. This four phase half wave motor controller uses the same BRAKE circuit as in Figure 4 and switches
the Top Driver Select from a high to a low as in Figure 6.
* TYPICAL
VR
VALUES
BRAKE
22
BRAKE
SELECT
TACH OUT
5
*R2
BRAKE
23
(-)
BRAKE
ERROR
AMP
BRAKE
OUT
(+)
100K
BRAKE
7
*R1
1M
*C1
0.1µF
BRAKE
BRAKE
8
6
BRAKE
BRAKE
BRAKE
BRAKE
VR
SPEED
CONTROL
VR
PWM RATE
CONTROL
FIGURE 8. PWM BRAKING
FIGURE 8. Using an analog switch (such as the CD4066) PWM braking can be employed when the brake is
applied. At that time, the error amplifier is configured as a voltage follower and its input is switched from the
speed adjustment control to the PWM rate control. By adjusting the PWM rate control, the average motor
current during braking can be controlled.
7560-040198-7
TABLE 1. OUTPUT COMMUTATION SEQUENCE FOR THREE PHASE OPERATION
LS7560
SENSOR ELECTRICAL
SEPARATION
TOP
BOTTOM
60°
120°
DRIVERS DRIVERS
S1, S2, S3 S1, S2, S3
F/R EN
BRK
OCS
O1, O2, O3 O4, O5, O6 FAULT
0
1
1
1
0
0
0
1
0
1
1
1
0
0
0
1
X
X
X
0
0
1
1
1
0
1
0
0
0
1
1
1
0
1
0
X
X
X
0
0
0
1
1
1
0
1
0
0
0
1
1
1
0
1
X
X
X
0
1
1
1
0
0
0
1
0
1
1
1
0
0
0
1
X
X
X
0
0
0
1
1
1
0
1
0
0
0
1
1
1
0
1
X
X
X
1
1
0
0
0
1
0
1
1
1
0
0
0
1
0
1
X
X
X
1
1
1
1
1
1
X
X
0
0
0
0
0
0
X
X
X
X
X
1
1
1
1
1
1
X
X
1
1
1
1
1
1
X
X
X
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
X
X
0
0
0
0
0
0
X
X
X
1
X
0
1
1
1
1
0
1
1
1
1
0
0
1
1
1
1
1
1
1
1
1
1
0
0
1
1
1
0
0
1
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
1
0
0
1
1
0
0
0
0
1
0
0
0
0
1
0
0
1
0
0
1
1
0
0
0
0
0
0
0
0
0
1
1
0
0
0
1
0
0
0
0
0
0
1
1
0
0
0
1
1
0
0
0
0
0
1
0
0
1
1
1
1
1
1
0
0
1
1
1
1
1
1
0
0
1
0
0
EN = ENABLE
BRK = BRAKE
OCS = OVER
CURRENT
SENSE
NOTE 1: This Table assumes the TOP DRIVER POLARITY SELECT (Pin 20) = Logic 0. For Pin 20 = Logic 1,
invert the polarity of the top drivers.
NOTE 2: For the LS7561, the OVERCURRENT SENSE = Logic 1 only forces the bottom drivers to a Logic 0.
It has no effect on the top driver outputs which are determined by the other inputs as shown in the table.
TABLE 2. OUTPUT COMMUTATION SEQUENCE FOR FOUR PHASE OPERATION
LS7560
SENSOR ELECTRICAL
SEPARATION = 90°
TOP
BOTTOM
DRIVERS
DRIVERS
S1
S2, S3
F/R
EN
BRK
OCS
O1, O3
O4, O6
FAULT
0
1
1
0
0
1
1
0
X
X
X
0
0
1
1
0
0
1
1
X
X
X
1
1
1
1
0
0
0
0
X
X
X
1
1
1
1
1
1
1
1
X
X
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
X
1
X
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
1
0
0
0
1
0
0
0
0
0
1
0
1
0
0
1
0
0
1
1
1
1
1
1
1
1
1
0
0
EN = ENABLE
BRK = BRAKE
OCS = OVER
CURRENT
SENSE
NOTE 1: SEQUENCE Input (Pin 1) set at a Logic 1.
NOTE 2: This Table assumes theTOP DRIVER POLARITY SELECT (Pin 20) = Logic 1. For Pin 20 = Logic 0, invert the
polarity of the top drivers.
NOTE 3: For the LS7561, the OVERCURRENT SENSE = Logic 1 only forces the bottom drivers to a Logic 0. It has no
effect on the Top Driver Outputs which are determined by the other inputs as shown on the table.
7560-102597-8