NLASB3157 SPDT, 3 W RON Switch The NLASB3157 is an advanced CMOS analog switch fabricated with silicon gate CMOS technology. It achieves very low propagation delay and RDSON resistances while maintaining CMOS low power dissipation. Analog and digital voltages that may vary across the full power−supply range (from VCC to GND). This device is a drop in replacement for the NC7SB3157. The select pin has overvoltage protection that allows voltages above VCC, up to 7.0 V to be present on the pin without damage or disruption of operation of the part, regardless of the operating voltage. • • • • • • MARKING DIAGRAMS 6 Features • • • • • • • • • http://onsemi.com High Speed: tPD = 1.0 ns (Typ) at VCC = 5.0 V Low Power Dissipation: ICC = 2.0 mA (Max) at TA = 25°C Standard CMOS Logic Levels High Bandwidth, Improved Linearity Switches Standard NTSC/PAL Video, Audio, SPDIF and HDTV May be used for Clock Switching, Data Multiplexing, etc. RON Typical = 3 W @ VCC = 4.5 V Break Before Make Circuitry, Prevents Inadvertent Shorts 2 Devices can Switch Balanced Signal Pairs, e.g. LVDS u 200 Mb/s Latchup Performance Exceeds 300 mA Pin for Pin Drop in for NC7SB3157 Tiny SC88 and WDFN6 Packages ESD Performance: ♦ Human Body Model; u 2000 V; ♦ Machine Model; u 200 V NLVASB3157 Features Extended Automotive Temperature Range; −55°C to +125°C (See Appendix A) Pb−Free Packages are Available 1 SC−88 DF SUFFIX CASE 419B AF MG G WDFN6 MT SUFFIX CASE 506AS FM AF, F = Specific Device Code M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location. FUNCTION TABLE Select Input L H Function B0 Connected to A B1 Connected to A ORDERING INFORMATION Device Package Shipping† NLASB3157DFT2 SC−88 3000 / Tape & Reel NLASB3157DFT2G SC−88 (Pb−Free) 3000 / Tape & Reel NLVASB3157DFT2 SC−88 3000 / Tape & Reel NLVASB3157DFT2G SC−88 (Pb−Free) 3000 / Tape & Reel NLASB3157MTR2G WDFN6 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2013 August, 2013 − Rev. 13 1 Publication Order Number: NLASB3157/D NLASB3157 SC−88 B1 1 6 Select GND 2 5 VCC B0 3 4 WDFN6 A B1 1 6 Select GND 2 5 VCC B0 3 4 A (Top View) (Top View) Figure 1. Pin Assignment & Logic Diagram MAXIMUM RATINGS Rating Symbol Value Unit Supply Voltage VCC −0.5 to +7.0 V DC Switch Voltage (Note 1) VIS −0.5 to VCC + 0.5 V DC Input Voltage (Note 1) VIN −0.5 to + 7.0 V DC Input Diode Current @ VIN t 0 V IIK −50 mA IOUT 128 mA DC VCC or Ground Current ICC/IGND +100 mA Storage Temperature Range Tstg −65 to +150 °C Junction Temperature Under Bias TJ 150 °C Junction Lead Temperature (Soldering, 10 Seconds) TL 260 °C Power Dissipation @ +85°C PD 180 mW DC Output Current Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. RECOMMENDED OPERATING CONDITIONS (Note 2) Characteristic Symbol Min Max Unit Supply Voltage Operating VCC 1.65 5.5 V Select Input Voltage VIN 0 5.5 V Switch Input Voltage VIS 0 VCC V VOUT 0 VCC V Operating Temperature TA −55 +125 Input Rise and Fall Time Control Input VCC = 2.3 V−3.6 V Control Input VCC = 4.5 V−5.5 V tr, tf Thermal Resistance qJA Output Voltage 2. Select input must be held HIGH or LOW, it must not float. http://onsemi.com 2 0 0 10 5.0 − 350 °C ns/V °C/W NLASB3157 DC ELECTRICAL CHARACTERISTICS − NLASB3157 Symbol Parameter VCC (V) Test Conditions TA = +255C Min Typ VIH HIGH Level Input Voltage 1.65−1.95 2.3−5.5 VIL LOW Level Input Voltage 1.65−1.95 2.3−5.5 IIN Input Leakage Current 0 v VIN v 5.5 V 0−5.5 "0.05 IOFF OFF State Leakage Current 0 v A, B v VCC 1.65−5.5 "0.05 RON Switch On Resistance (Note 3) VIN = 0 V, IO = 30 mA VIN = 2.4 V, IO = −30 mA VIN = 4.5 V, IO = −30 mA 4.5 VIN = 0 V, IO = 24 mA VIN = 3 V, IO = −24 mA ICC Quiescent Supply Current All Channels ON or OFF On Resistance Over Signal Range (Note 3) (Note 7) Max Min Max 0.75 VCC 0.7 VCC Unit V 0.25 VCC 0.3 VCC V "0.1 "1 mA "0.1 "1 mA 3.0 5.0 7.0 7.0 12 15 W 3.0 4.0 10 9.0 20 W VIN = 0 V, IO = 8 mA VIN = 2.3 V, IO = −8 mA 2.3 5.0 13 12 30 W VIN = 0 V, IO = 4 mA VIN = 1.65 V, IO = −4 mA 1.65 6.5 17 20 50 W VIN = VCC or GND 5.5 10 mA VCC V 4.5 25 W 3.0 50 2.3 100 1.65 300 1.0 IOUT = 0 Analog Signal Range RRANGE TA = −405C to +855C VCC IA = −30 mA, 0 v VBn v VCC IA = −24 mA, 0 v VBn v VCC IA = −8 mA, 0 v VBn v VCC IA = −4 mA, 0 v VBn v VCC 0 VCC 0 DRON On Resistance Match Between Channels (Note 3) (Note 4) (Note 5) IA = −30 mA, VBn = 3.15 IA = −24 mA, VBn = 2.1 IA = −8 mA, VBn = 1.6 IA = −4 mA, VBn = 1.15 4.5 3.0 2.3 1.65 0.15 0.2 0.5 0.5 W Rflat On Resistance Flatness (Note 3) (Note 4) (Note 6) IA = −30 mA, 0 v VBn v VCC IA = −24 mA, 0 v VBn v VCC IA = −8 mA, 0 v VBn v VCC IA = −4 mA, 0 v VBn v VCC 5.0 6.0 W 3.3 12 2.5 28 1.8 125 3. Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A or B Ports). 4. Parameter is characterized but not tested in production. 5. DRON = RON max − RON min measured at identical VCC, temperature and voltage levels. 6. Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions. 7. Guaranteed by Design. http://onsemi.com 3 NLASB3157 AC ELECTRICAL CHARACTERISTICS − NLASB3157 Symbol Parameter VCC (V) Test Conditions TA = +255C Min Typ TA = −405C to +855C Max Min tPHL tPLH Propagation Delay Bus to Bus (Note 9) VI = OPEN 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 tPZL tPZH Output Enable Time Turn On Time (A to Bn) VI = 2 VCC for tPZL VI = 0 V for tPZH 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 23 13 6.9 5.2 7.0 3.5 2.5 1.7 tPLZ tPHZ Output Disable Time Turn Off Time (A Port to B Port) VI = 2 VCC for tPLZ VI = 0 V for tPHZ 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 12.5 7.0 5.0 3.5 3.0 2.0 1.5 0.8 tB−M Break Before Make Time (Note 8) Q Charge Injection (Note 8) CL = 0.1 nF, VGEN = 0 V RGEN = 0 W OIRR Off Isolation (Note 10) Xtalk Max Unit ns Figures 2, 3 24 14 7.6 5.7 ns Figures 2, 3 13 7.5 5.3 3.8 ns Figures 2, 3 ns Figure 4 1.2 0.8 0.3 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 Figure Number 0.5 0.5 0.5 0.5 5.0 3.3 7.0 3.0 pC Figure 5 RL = 50 W f = 10 MHz 1.65−5.5 −57 dB Figure 6 Crosstalk RL = 50 W f = 10 MHz 1.65−5.5 −54 dB Figure 7 BW −3 dB Bandwidth RL = 50 W 1.65−5.5 250 MHz Figure 10 THD Total Harmonic Distortion (Note 8) RL = 600 W 0.5 VP−P f = 600 Hz to 20 kHz 5.0 0.011 % CAPACITANCE − NLASB3157 (Note 11) Symbol Parameter Test Conditions Typ Max Unit Figure Number CIN Select Pin Input Capacitance VCC = 0 V 2.3 pF CIO−B B Port Off Capacitance VCC = 5.0 V 6.5 pF Figure 8 CIOA−ON A Port Capacitance when Switch is Enabled VCC = 5.0 V 18.5 pF Figure 9 8. Guaranteed by Design. 9. This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance). 10. Off Isolation = 20 log10 [VA/VBn]. 11. TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested in production. http://onsemi.com 4 NLASB3157 APPENDIX A DC ELECTRICAL EXTENDED AUTOMOTIVE TEMPERATURE RANGE CHARACTERISTICS − NLVASB3157 Symbol Parameter VCC (V) Test Conditions TA = +255C Min Typ VIH HIGH Level Input Voltage 1.65−1.95 2.3−5.5 VIL LOW Level Input Voltage 1.65−1.95 2.3−5.5 IIN Input Leakage Current 0 v VIN v 5.5 V 0−5.5 "0.05 IOFF OFF State Leakage Current 0 v A, B v VCC 1.65−5.5 "0.05 RON Switch On Resistance (Note 12) VIN = 0 V, IO = 30 mA VIN = 2.4 V, IO = −30 mA VIN = 4.5 V, IO = −30 mA 4.5 VIN = 0 V, IO = 24 mA VIN = 3 V, IO = −24 mA ICC Quiescent Supply Current All Channels ON or OFF On Resistance Over Signal Range (Note 12) (Note 14) Max Min Max 0.75 VCC 0.7 VCC Unit V 0.25 VCC 0.3 VCC V "0.1 "1 mA "0.1 "1 mA 3.0 5.0 7.0 8.5 13.0 15.0 W 3.0 4.0 10 11 20 VIN = 0 V, IO = 8 mA VIN = 2.3 V, IO = −8 mA 2.3 5.0 13 12 30 VIN = 0 V, IO = 4 mA VIN = 1.65 V, IO = −4 mA 1.65 6.5 17 20 50 VIN = VCC or GND 5.5 1.0 10 mA VCC V 4.5 25 W 3.0 50 2.3 100 1.65 300 IOUT = 0 Analog Signal Range RRANGE TA = −555C to +1255C VCC IA = −30 mA, 0 v VBn v VCC IA = −24 mA, 0 v VBn v VCC IA = −8 mA, 0 v VBn v VCC IA = −4 mA, 0 v VBn v VCC 0 VCC 0 12. Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A or B Ports). 13. Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions. 14. Guaranteed by Design. * For DRON, RFLAT, Q, OIRR, Xtalk, BW, THD, and CIN see −405C to 855C section. http://onsemi.com 5 NLASB3157 APPENDIX A AC ELECTRICAL EXTENDED AUTOMOTIVE TEMPERATURE RANGE CHARACTERISTICS − NLVASB3157 Symbol Parameter Test Conditions VCC (V) TA = +255C Min Typ Max TA = −555C to +1255C Min tPHL tPLH Propagation Delay Bus to Bus (Note 16) VI = OPEN 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 tPZL tPZH Output Enable Time Turn On Time (A to Bn) VI = 2 VCC for tPZL VI = 0 V for tPZH 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 23 13 6.9 5.2 7.0 3.5 2.5 1.7 tPLZ tPHZ Output Disable Time Turn Off Time (A Port to B Port) VI = 2 VCC for tPLZ VI = 0 V for tPHZ 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 12.5 7.0 5.0 3.5 3.0 2.0 1.5 0.8 tB−M Break Before Make Time (Note 15) Max Unit ns Figures 2, 3 24 14 9.0 7.0 ns Figures 2, 3 13 7.5 6.5 5.0 ns Figures 2, 3 ns Figure 4 1.2 0.8 0.3 1.65−1.95 2.3−2.7 3.0−3.6 4.5−5.5 0.5 0.5 0.5 0.5 Figure Number 15. Guaranteed by Design. 16. This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance). * For DRON, RFLAT, Q, OIRR, Xtalk, BW, THD, and CIN see −405C to 855C section. http://onsemi.com 6 NLASB3157 AC LOADING AND WAVEFORMS VI RU FROM OUTPUT UNDER TEST NOTE: Input driven by 50 W source terminated in 50 W NOTE: CL includes load and stray capacitance NOTE: Input PRR = 1.0 MHz; tW = 500 ns RD CL Figure 2. AC Test Circuit tf = 2.5 ns tf = 2.5 ns VCC tr = 2.5 ns SWITCH INPUT 90% 50% 10% SELECT INPUT 90% 50% 10% GND tPHL OUTPUT VOH VOL OUTPUT GND tPLZ VTRI 50% tPZH 50% 50% 10% tPZL VCC 50% 10% 50% tW tPLH OUTPUT 90% tr = 2.5 ns 90% VOL + 0.3 V VOL tPHZ VOH VOH − 0.3 V 50% VTRI Figure 3. AC Waveforms VIN B0 B1 S A LOGIC INPUT VOUT RL CL VOUT LOGIC INPUT 0.9 × VOUT tD Figure 4. Break Before Make Interval Timing http://onsemi.com 7 NLASB3157 AC LOADING AND WAVEFORMS RGEN VGE BN A LOGIC INPUT VOUT S RL CL 1 MW 100 pF OFF ON OFF DVOUT VOUT Q = (DVOUT)(CL) LOGIC INPUT Figure 5. Charge Injection Test 10 nF 10 nF 50 W A Signal Generator 0 dBm VCC LOGIC INPUT 0 V or VIH S 50 W GND 50 W Figure 6. Off Isolation Figure 7. Crosstalk 10 nF 10 nF A Capacitance Meter VCC Capacitance Meter f = 1 MHz A S Analyzer GND 50 W VCC B1 BN Analyzer B0 LOGIC INPUT 0 V or VCC S A VCC f = 1 MHz S BN LOGIC INPUT 0 V or VCC BN GND GND Figure 8. Channel Off Capacitance Figure 9. Channel On Capacitance 10 nF Signal Generator 0 dBm VCC BN A 50 W LOGIC INPUT 0 V or VCC S GND Figure 10. Bandwidth http://onsemi.com 8 NLASB3157 PACKAGE DIMENSIONS SC−88/SOT−363/SC−70 DF SUFFIX CASE 419B−02 ISSUE Y 2X aaa H D D A D 6 5 GAGE PLANE 4 2 L L2 E1 E 1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END. 4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY AND DATUM H. 5. DATUMS A AND B ARE DETERMINED AT DATUM H. 6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP. 7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDITION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OF THE FOOT. H DETAIL A 3 aaa C 2X bbb H D 2X 3 TIPS e B 6X ddd TOP VIEW A2 A 6X ccc C A1 SIDE VIEW DIM A A1 A2 b C D E E1 e L L2 aaa bbb ccc ddd b C M C A-B D DETAIL A SEATING PLANE END VIEW c MILLIMETERS MIN NOM MAX −−− −−− 1.10 0.00 −−− 0.10 0.70 0.90 1.00 0.15 0.20 0.25 0.08 0.15 0.22 1.80 2.00 2.20 2.00 2.10 2.20 1.15 1.25 1.35 0.65 BSC 0.26 0.36 0.46 0.15 BSC 0.15 0.30 0.10 0.10 RECOMMENDED SOLDERING FOOTPRINT* 6X 6X 0.30 0.66 2.50 0.65 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 9 INCHES NOM MAX −−− 0.043 −−− 0.004 0.035 0.039 0.008 0.010 0.006 0.009 0.078 0.086 0.082 0.086 0.049 0.053 0.026 BSC 0.010 0.014 0.018 0.006 BSC 0.006 0.012 0.004 0.004 MIN −−− 0.000 0.027 0.006 0.003 0.070 0.078 0.045 NLASB3157 PACKAGE DIMENSIONS WDFN6 1.2x1.0, 0.4P CASE 506AS ISSUE D D L A B L NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. L1 PIN ONE REFERENCE 2X 0.10 C 2X DETAIL A ÍÍÍ ÍÍÍ ÍÍÍ ALTERNATE TERMINAL CONSTRUCTIONS E ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÇÇÇ EXPOSED Cu 0.10 C A3 MOLD CMPD A1 DETAIL B DETAIL B 0.10 C ALTERNATE CONSTRUCTIONS A3 DIM A A1 A3 b D E e L L1 L2 MILLIMETERS MIN MAX 0.70 0.80 0.00 0.05 0.20 REF 0.15 0.25 1.20 BSC 1.00 BSC 0.40 BSC 0.30 0.40 0.00 0.15 0.40 0.50 A 7X 0.08 C MOUNTING FOOTPRINT* A1 C 6X 6X 0.42 SEATING PLANE 0.22 4X DETAIL A e 1 5X L 3 L2 0.40 PITCH 6 4 BOTTOM VIEW b 1.07 DIMENSIONS: MILLIMETERS 6X 0.10 C A 0.05 C *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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