BOARDCOM HSMS-2818 Surface mount rf schottky barrier diode Datasheet

HSMS-281x
Surface Mount RF Schottky Barrier Diodes
Data Sheet
Description/Applications
Features
These Schottky diodes are specifically designed for both
analog and digital applications. This series offers a wide
range of specifica­tions and package con­figura­tions to
give the ­designer wide flexi­bility. The HSMS‑281x series of
diodes features very low flicker (1/f ) noise.
• Surface Mount Packages
Note that Avago’s manufacturing techniques assure that
dice found in pairs and quads are taken from adjacent
sites on the wafer, assuring the highest degree of match.
• Single, Dual and Quad Versions
• Low Flicker Noise
• Low FIT (Failure in Time) Rate*
• Six-sigma Quality Level
• Tape and Reel Options Available
• Lead-free
• For more information see the Surface Mount Schottky
Reliability Data Sheet.
Pin Connections and Package Marking
GUx
1
2
3
6
Package Lead Code Identification, SOT-23/SOT-143
(Top View)
SINGLE
3
SERIES
3
1
1
COMMON
ANODE
3
5
4
Notes:
1. Package marking provides orientation and identification.
2. See “Electrical Specifications” for appropriate package marking.
2
#0
UNCONNECTED
PAIR
3
4
1
1
RING
QUAD
3
4
2
#5
2
#2
1
#7
#3
2
BRIDGE
QUAD
3
4
2
1
#8
2
Package Lead Code Identification, SOT-323
Package Lead Code Identification, SOT-363
(Top View)
(Top View)
SINGLE
B
COMMON
ANODE
E
COMMON
CATHODE
3
SERIES
C
COMMON
CATHODE
HIGH ISOLATION
UNCONNECTED PAIR
6
5
1
2
4
K
3
COMMON
CATHODE QUAD
6
5
1
2
4
UNCONNECTED
TRIO
6
5
1
2
4
L
3
COMMON
ANODE QUAD
6
5
1
2
4
F
6
1
M
3
BRIDGE
QUAD
5
4
6
2
3
1
N
3
RING
QUAD
5
4
2
3
1
#4
2
Absolute Maximum Ratings[1] TC = 25°C
Symbol
Parameter
Unit
SOT-23/SOT-143
SOT-323/SOT-363
If
Forward Current (1 μs Pulse)
Amp
1
1
PIV
Peak Inverse Voltage
V
Same as VBR
Same as VBR
Tj
Junction Temperature
°C
150
150
Tstg
Storage Temperature
°C
-65 to 150
-65 to 150
θjc
Thermal Resistance[2]
°C/W
500
150
Notes:
1. Operation in excess of any one of these conditions may result in permanent damage to the device.
2. TC = +25°C, where TC is defined to be the temperature at the package pins where contact is made to the circuit board.
ESD WARNING: Handling Precautions Should Be Taken To Avoid Static Discharge.
Electrical Specifications TC = 25°C, Single Diode[3]
Minimum Maximum
Part
Package
Breakdown Forward
Number Marking Lead
Voltage
Voltage
HSMS[4]
Code
Code Configuration
VBR (V)
VF (mV)
Maximum
Forward
Voltage
VF (V) @
IF (mA)
Maximum
Reverse
Leakage
Maximum
IR (nA) @ Capacitance
VR (V)
CT (pF)
2810
B0
0
2812
B2
2
2813
B3
3
2814
B4
4
2815
B5
5
2817
B7
7
2818
B8
8
281B
B0
B
281C
B2
C
281E
B3
E
281F
B4
F
281K
BK
K
281L
BL
L
1.0
200
Single
Series
Common Anode
Common Cathode
Unconnected Pair
Ring Quad[4]
Bridge Quad[4]
Single
Series
Common Anode
Common Cathode
High Isolation
Unconnected Pair
Unconnected Trio
20
410
35
15
Test Conditions
IR = 10 mA IF = 1 mA
Notes:
1. ∆VF for diodes in pairs and quads in 15 mV maximum at 1 mA.
2. ∆C TO for diodes in pairs and quads is 0.2 pF maximum.
3. Effective Carrier Lifetime (τ) for all these diodes is 100 ps maximum measured with Krakauer method at 5 mA.
4. See section titled “Quad Capacitance.”
5. RD = RS + 5.2 Ω at 25°C and I f = 5 mA.
Typical
Dynamic
Resistance
RD (Ω)[5]
1.2
15
VF = 0 V
f = 1 MHz
IF = 5 mA
Quad Capacitance
Linear Equivalent Circuit Model Diode Chip
Capacitance of Schottky diode quads is measured using
an HP4271 LCR meter. This instrument effectively isolates
individual diode branches from the others, allowing ac‑
curate capacitance measurement of each branch or each
diode. The conditions are: 20 mV R.M.S. voltage at 1 MHz.
Avago defines this measurement as “CM”, and it is equiva‑
lent to the capaci­tance of the diode by itself. The equiva‑
lent diagonal and adja­cent capaci-tances can then be cal‑
culated by the formulas given below.
In a quad, the diagonal capaci­tance is the capacitance be‑
tween points A and B as shown in the figure below. The
diagonal capacitance is calculated using the following
formula
C DIAGONAL
C3 x C 4
C1 x C 2
= _______
+ _______
C1 + C 2
C3 + C4
The equivalent adjacent
C 13 x C 4 is the capacitance
C 1 x C 2 capacitance
C DIAGONAL
_______
Cand
ADJACENT
1 + ____________
between
points==A_______
C in+the
figure below. This capaci‑
1 following
C13 + C 14 formula
1 + C 2the
tance is calculatedCusing
–– + –– + ––
C 2 C 3 C4
1
C ADJACENT = C 1 + ____________
1
1
8.33 X 101 -5 nT
Rj=
I b + ––
I s + –– + ––
C 2 C 3 C4
This information does not apply
to cross-over quad di‑
8.33 X 10 -5 nT
odes.
Rj=
I
b+ Is
Rj
RS
Cj
RS = series resistance (see Table of SPICE parameters)
C j = junction capacitance (see Table of SPICE parameters)
Rj =
8.33 X 10-5 nT
Ib + Is
where
Ib = externally applied bias current in amps
Is = saturation current (see table of SPICE parameters)
T = temperature, °K
n = ideality factor (see table of SPICE parameters)
Note:
To effectively model the packaged HSMS-281x product,
please refer to Application Note AN1124.
ESD WARNING:
Handling Precautions Should Be Taken To Avoid Static Discharge.
SPICE Parameters
Parameter
Units
BV
V
25
CJ0
pF
1.1
EG
eV
0.69
IBV
A
E-5
IS
A
4.8E-9
N
HSMS-281x
1.08
RS
Ω
10
PB
V
0.65
PT
2
M
0.5
Typical Performance, TC = 25°C (unless otherwise noted), Single Diode
100,000
10,000
10
1
TA = +125C
TA = +75C
TA = +25C
TA = –25C
0
1000
100
TA = +125C
TA = +75C
TA = +25C
10
1
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
0
Figure 1. Forward Current vs. Forward Voltage at
Temperatures.
30
IF - FORWARD CURRENT (mA)
CT – CAPACITANCE (pF)
1
0.75
0.50
0.25
0
2
4
6
8
10
12
14
16
VR – REVERSE VOLTAGE (V)
Figure 4. Total Capacitance vs. Reverse Voltage.
IF (Left Scale)
10
VF (Right Scale)
1
0.3
0.2
1
0.4
0.6
0.8
1.0
1.2
VF - FORWARD VOLTAGE (V)
Figure 5. Typical Vf Match, Pairs and Quads.
10
1
10
IF – FORWARD CURRENT (mA)
30
10
100
1
0.1
15
Figure 2. Reverse Current vs. Reverse Voltage at
Temperatures.
1.25
10
VR – REVERSE VOLTAGE (V)
VF – FORWARD VOLTAGE (V)
0
5
0.3
1.4
Figure 3. Dynamic Resistance vs. Forward
Current.
VF - FORWARD VOLTAGE DIFFERENCE (mV)
0.1
0.01
1000
RD – DYNAMIC RESISTANCE ()
IR – REVERSE CURRENT (nA)
IF – FORWARD CURRENT (mA)
100
100
Applications Information
Assembly Instructions
Introduction — Product Selection
SOT-323 PCB Footprint
Avago’s family of Schottky products provides unique solu‑
tions to many design problems.
A recommended PCB pad layout for the miniature SOT323 (SC-70) package is shown in Figure 6 (dimensions are
in inches). This layout provides ample allowance for pack‑
age placement by automated assembly equipment with‑
out adding parasitics that could impair the performance.
The first step in choosing the right product is to select
the diode type. All of the products in the HSMS‑282x fam‑
ily use the same diode chip, and the same is true of the
HSMS-281x and HSMS-280x families. Each family has a dif‑
ferent set of characteristics which can be compared most
easily by consulting the SPICE parameters in Table 1.
A review of these data shows that the HSMS-280x family
has the highest breakdown voltage, but at the expense of
a high value of series resistance (Rs). In applications which
do not require high voltage the HSMS-282x family, with a
lower value of series resistance, will offer higher current
carrying capacity and better performance. The HSMS-281x
family is a hybrid Schottky (as is the HSMS-280x), offering
lower 1/f or flicker noise than the HSMS-282x family.
In general, the HSMS-282x family should be the designer’s
first choice, with the -280x family reserved for high volt‑
age applications and the HSMS-281x family for low flicker
noise applications.
Table 1. Typical SPICE Parameters.
Parameter
Units
HSMS-280x HSMS-281x HSMS-282x
BV
V
75
25
15
CJ0
pF
1.6
1.1
0.7
EG
eV
0.69
0.69
0.69
IBV
A
1 E-5
1 E-5
1 E-4
IS
A
3 E-8
4.8 E-9
2.2 E-8
1.08
1.08
1.08
N
RS
Ω
30
10
6.0
PB (VJ)
V
0.65
0.65
0.65
PT (XTI)
2
2
2
M
0.5
0.5
0.5
0.026
0.079
0.039
0.022
Dimensions in inches
Figure 6. Recommended PCB Pad Layout for Avago’s SC70 3L/SOT‑323 Products.
Assembly Instructions
SOT-363 PCB Footprint
A recommended PCB pad layout for the miniature SOT363 (SC-70, 6 lead) package is shown in Figure 7 (dimen‑
sions are in inches). This layout provides ample allowance
for package placement by automated assembly equip‑
ment without adding parasitics that could impair the per‑
formance.
0.026
0.079
0.039
0.018
Dimensions in inches
Figure 7. Recommended PCB Pad Layout for Avago’s SC70 6L/SOT‑363 Products.
SMT Assembly
Reliable assembly of surface mount components is a com‑
plex process that involves many material, process, and
equipment factors, including: method of heating (e.g., IR
or vapor phase reflow, wave soldering, etc.) circuit board
material, conductor thickness and pattern, type of solder
alloy, and the thermal conductivity and thermal mass of
components. Components with a low mass, such as the
SOT package, will reach solder reflow temperatures faster
than those with a greater mass.
Avago’s SOT diodes have been qualified to the time-tem‑
perature profile shown in Figure 8. This profile is repre‑
sentative of an IR reflow type of surface mount assembly
process.
After ramping up from room temperature, the circuit
board with components attached to it (held in place with
solder paste) passes through one or more preheat zones.
The preheat zones increase the temperature of the board
and components to prevent thermal shock and begin
evaporating solvents from the solder paste. The reflow
zone briefly elevates the temperature sufficiently to pro‑
duce a reflow of the solder.
The rates of change of temperature for the ramp-up and
cool-down zones are chosen to be low enough to not
cause deformation of the board or damage to compo‑
nents due to thermal shock. The maximum temperature
in the reflow zone (TMAX) should not exceed 260°C.
These parameters are typical for a surface mount assem‑
bly process for Avago diodes. As a general guideline, the
circuit board and components should be exposed only
to the minimum temperatures and times necessary to
achieve a uniform reflow of solder.
tp
Tp
Critical Zone
T L to Tp
Ramp-up
Temperature
TL
Ts
Ts
tL
max
min
Ramp-down
ts
Preheat
25
t 25° C to Peak
Time
Figure 8. Surface Mount Assembly Profile.
Lead-Free Reflow Profile Recommendation (IPC/JEDEC J-STD-020C)
Reflow Parameter
Lead-Free Assembly
Average ramp-up rate (Liquidus Temperature (TS(max) to Peak)
3°C/ second max
Preheat
Temperature Min (TS(min))
150°C
Temperature Max (TS(max))
200°C
Time (min to max) (tS)
60-180 seconds
Ts(max) to TL Ramp-up Rate
Time maintained above:
3°C/second max
Temperature (TL)
217°C
Time (tL)
60-150 seconds
Peak Temperature (TP)
260 +0/-5°C
Time within 5 °C of actual Peak temperature (tP)
20-40 seconds
Ramp-down Rate
6°C/second max
Time 25 °C to Peak Temperature
8 minutes max
Note 1: All temperatures refer to topside of the package, measured on the package body surface
Part Number Ordering Information
Part Number
No. of
Devices
Container
HSMS-281x-TR2G
10000
13" Reel
HSMS-281x-TR1G
3000
7" Reel
HSMS-281x-BLKG
100
antistatic bag
x = 0, 2, 3, 4, 5, 7, 8, B, C, E, F, K, L
Package Dimensions
Outline 23 (SOT-23)
Outline SOT-323 (SC-70 3 Lead)
e1
e2
e1
XXX
E
XXX
E
E1
e
e
DIMENSIONS (mm)
C
DIMENSIONS (mm)
D
A
C
D
B
Notes:
XXX-package marking
Drawings are not to scale
L
B
L
A1
E1
SYMBOL
A
A1
B
C
D
E1
e
e1
e2
E
L
MIN.
0.79
0.000
0.30
0.08
2.73
1.15
0.89
1.78
0.45
2.10
0.45
MAX.
1.20
0.100
0.54
0.20
3.13
1.50
1.02
2.04
0.60
2.70
0.69
A
A1
Notes:
XXX-package marking
Drawings are not to scale
SYMBOL
A
A1
B
C
D
E1
e
e1
E
L
MIN.
MAX.
0.80
1.00
0.00
0.10
0.15
0.40
0.08
0.25
1.80
2.25
1.10
1.40
0.65 typical
1.30 typical
1.80
2.40
0.26
0.46
Outline 143 (SOT-143)
Outline SOT-363 (SC-70 6 Lead)
e2
e1
HE
B1
XXX
E
E
E1
L
e
c
D
DIMENSIONS (mm)
L
B
e
C
A1
A2
DIMENSIONS (mm)
D
A
A1
Notes:
XXX-package marking
Drawings are not to scale
SYMBOL
A
A1
B
B1
C
D
E1
e
e1
e2
E
L
MIN.
0.79
0.013
0.36
0.76
0.086
2.80
1.20
0.89
1.78
0.45
2.10
0.45
Device Orientation
MAX.
1.097
0.10
0.54
0.92
0.152
3.06
1.40
1.02
2.04
0.60
2.65
0.69
A
b
SYMBOL
E
D
HE
A
A2
A1
e
b
c
L
MIN.
MAX.
1.15
1.35
1.80
2.25
1.80
2.40
0.80
1.10
0.80
1.00
0.00
0.10
0.650 BCS
0.15
0.30
0.08
0.25
0.10
0.46
For Outlines SOT-23, -323
REEL
TOP VIEW
END VIEW
4 mm
8 mm
CARRIER
TAPE
USER
FEED
DIRECTION
ABC
For Outline SOT-143
ABC
For Outline SOT-363
END VIEW
TOP VIEW
TOP VIEW
4 mm
END VIEW
4 mm
ABC
ABC
ABC
ABC
Note: "AB" represents package marking code.
"C" represents date code.
ABC
Note: "AB" represents package marking code.
"C" represents date code.
COVER TAPE
8 mm
ABC
8 mm
ABC
ABC
ABC
ABC
Note: "AB" represents package marking code.
"C" represents date code.
Tape Dimensions and Product Orientation
For Outline SOT-23
P
P2
D
E
P0
F
W
D1
t1
Ko
9° MAX
13.5° MAX
8° MAX
B0
A0
DESCRIPTION
SYMBOL
SIZE (mm)
SIZE (INCHES)
CAVITY
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
A0
B0
K0
P
D1
3.15 ± 0.10
2.77 ± 0.10
1.22 ± 0.10
4.00 ± 0.10
1.00 + 0.05
0.124 ± 0.004
0.109 ± 0.004
0.048 ± 0.004
0.157 ± 0.004
0.039 ± 0.002
PERFORATION
DIAMETER
PITCH
POSITION
D
P0
E
1.50 + 0.10
4.00 ± 0.10
1.75 ± 0.10
0.059 + 0.004
0.157 ± 0.004
0.069 ± 0.004
CARRIER TAPE
WIDTH
THICKNESS
W
t1
8.00 + 0.30 – 0.10
0.229 ± 0.013
0.315 +0.012 – 0.004
0.009 ± 0.0005
DISTANCE
BETWEEN
CENTERLINE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
F
3.50 ± 0.05
0.138 ± 0.002
CAVITY TO PERFORATION
(LENGTH DIRECTION)
P2
2.00 ± 0.05
0.079 ± 0.002
For Outline SOT-143
P
D
P2
P0
E
F
W
D1
t1
9° M A X
9° MAX
K0
A0
B0
DESCRIPTION
SYMBOL
SIZE (mm)
SIZE (INCHES)
CAVITY
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
A0
B0
K0
P
D1
3.19 ± 0.10
2.80 ± 0.10
1.31 ± 0.10
4.00 ± 0.10
1.00 + 0.25
0.126 ± 0.004
0.110 ± 0.004
0.052 ± 0.004
0.157 ± 0.004
0.039 + 0.010
PERFORATION
DIAMETER
PITCH
POSITION
D
P0
E
1.50 + 0.10
4.00 ± 0.10
1.75 ± 0.10
0.059 + 0.004
0.157 ± 0.004
0.069 ± 0.004
CARRIER TAPE
WIDTH
THICKNESS
W
t1
8.00 +0.30 – 0.10
0.254 ± 0.013
0.315+0.012 – 0.004
0.0100 ± 0.0005
DISTANCE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
F
3.50 ± 0.05
0.138 ± 0.002
CAVITY TO PERFORATION
(LENGTH DIRECTION)
P2
2.00 ± 0.05
0.079 ± 0.002
Tape Dimensions and Product Orientation
For Outlines SOT-323, -363
P
P2
D
P0
E
F
W
C
D1
t 1 (CARRIER TAPE THICKNESS)
K0
An
A0
DESCRIPTION
SYMBOL
SIZE (mm)
SIZE (INCHES)
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
A0
B0
K0
P
D1
2.40 ± 0.10
2.40 ± 0.10
1.20 ± 0.10
4.00 ± 0.10
1.00 + 0.25
0.094 ± 0.004
0.094 ± 0.004
0.047 ± 0.004
0.157 ± 0.004
0.039 + 0.010
PERFORATION
DIAMETER
PITCH
POSITION
D
P0
E
1.55 ± 0.05
4.00 ± 0.10
1.75 ± 0.10
0.061 ± 0.002
0.157 ± 0.004
0.069 ± 0.004
CARRIER TAPE
WIDTH
THICKNESS
W
t1
8.00 ± 0.30
0.254 ± 0.02
0.315 ± 0.012
0.0100 ± 0.0008
COVER TAPE
WIDTH
TAPE THICKNESS
C
Tt
5.4 ± 0.10
0.062 ± 0.001
0.205 ± 0.004
0.0025 ± 0.00004
DISTANCE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
F
3.50 ± 0.05
0.138 ± 0.002
CAVITY TO PERFORATION
(LENGTH DIRECTION)
P2
2.00 ± 0.05
0.079 ± 0.002
FOR SOT-323 (SC70-3 LEAD)
An
FOR SOT-363 (SC70-6 LEAD)
An
B0
CAVITY
ANGLE
Tt (COVER TAPE THICKNESS)
8 °C MAX
10 °C MAX
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Data subject to change. Copyright © 2005-2009 Avago Technologies. All rights reserved. Obsoletes 5989-4021EN
AV02-1367EN - May 29, 2009