SLLS636D – DECEMBER 2004 – REVISED MARCH 2005 D D D D D Precision Internal Reference . . . 2% D Short-Circuit Current Limiting D Low Standby Current Wide Input Voltage Range . . . 3 V to 40 V High Output Switch Current . . . Up to 1.5 A Adjustable Output Voltage Oscillator Frequency . . . Up to 100 kHz D (SOIC) OR P (PDIP) PACKAGE (TOP VIEW) Switch Collector Switch Emitter Timing Capacitor GND 1 8 2 7 3 6 4 5 Driver Collector Ipk VCC Comparator Inverting Input DRJ (QFN) PACKAGE (TOP VIEW) Switch Collector 1 Switch Emitter 2 Timing Capacitor 3 GND 4 VOUT 8 Driver Collector 7 Ipk 6 VCC 5 Comparator Inverting Input description/ordering information The MC33063A and MC34063A are easy-to-use ICs containing all the primary circuitry needed for building simple dc-dc converters. These devices primarily consist of an internal temperature-compensated reference, a comparator, an oscillator, a PWM controller with active current limiting, a driver, and a high-current output switch; thus, the devices require minimal external components to build converters in the boost, buck, and inverting topologies. The MC33063A is characterized for operation from −40°C to 85°C, while the MC34063A is characterized for operation from 0°C to 70°C. ORDERING INFORMATION PACKAGE† TA ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP (P) Tube of 50 MC33063AP MC33063AP QFN (DRJ) Reel of 1000 MC33063ADRJR PREVIEW Tube of 75 MC33063AD Reel of 2500 MC33063ADR PDIP (P) Tube of 50 MC34063AP MC34063AP QFN (DRJ) Reel of 1000 MC34063ADRJR PREVIEW Tube of 75 MC34063AD Reel of 2500 MC34063ADR −40°C to 85°C SOIC (D) 0°C to 70°C SOIC (D) M33063A M34063A † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2005, Texas Instruments Incorporated !"#$%&'#! ( )*$$+!' &( #" ,*-.)&'#! /&'+ $#/*)'( )#!"#$% '# (,+)")&'#!( ,+$ '0+ '+$%( #" +1&( !('$*%+!'( ('&!/&$/ 2&$$&!'3 $#/*)'#! ,$#)+((!4 /#+( !#' !+)+((&$.3 !).*/+ '+('!4 #" &.. ,&$&%+'+$( POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SLLS636D – DECEMBER 2004 – REVISED MARCH 2005 functional block diagram Drive Collector 8 1 Switch Collector 2 Switch Emitter 3 Timing Capacitor Q2 S Q Q1 R 100 Ω Ipk Sense 7 Ipk Oscillator CT 6 VCC + _ Comparator Inverting Input 1.25-V Reference Regulator 4 5 GND absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 V Comparator Inverting Input voltage range, VIR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 40 V Switch Collector voltage, VC(switch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V Switch Emitter voltage (VPIN1 = 40 V), VE(switch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V Switch Collector to Switch Emitter voltage, VCE(switch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V Driver Collector voltage, VC(driver) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V Driver Collector current, IC(driver) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Switch current, ISW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 A Package thermal impedance, θJA (see Notes 1 and 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W DRJ package . . . . . . . . . . . . . . . . . . . . . . . TBD°C/W P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS636D – DECEMBER 2004 – REVISED MARCH 2005 recommended operating conditions VCC TA Supply voltage Operating free-air temperature range MIN MAX 3 40 MC33063A −40 85 MC34063A 0 70 UNIT V °C electrical characteristics, VCC = 5 V, TA = full operating range (unless otherwise noted) (see block diagram) OSCILLATOR PARAMETER fosc Ichg Oscillator frequency Idischg Idischg/Ichg Discharge current VIpk TEST CONDITIONS TA MIN TYP MAX UNIT VPIN5 = 0 V, CT = 1 nF VCC = 5 V to 40 V 25°C 24 33 42 kHz 25°C 24 35 42 µA 25°C 140 220 260 µA Discharge-to-charge current ratio VCC = 5 V to 40 V VPIN7 = VCC 25°C 5.2 6.5 7.5 Current-limit sense voltage Idischg = Ichg 25°C 250 300 350 mV MIN TYP MAX UNIT Charge current OUTPUT SWITCH (see Note 3) PARAMETER TEST CONDITIONS TA VCE(sat) Saturation voltage – Darlington connection ISW = 1 A, pins 1 and 8 connected Full range 1 1.3 V VCE(sat) Saturation voltage – non-Darlington connection (see Note 4) ISW = 1 A, RPIN8 = 82 Ω to VCC, forced 20 Full range 0.45 0.7 V DC current gain ISW = 1 A, VCE = 5 V VCE = 40 V 100 µA hFE IC(off) Collector off-state current 25°C 50 Full range 75 0.01 NOTES: 3. Low duty-cycle pulse testing is used to maintain junction temperature as close to ambient temperature as possible. 4. In the non-Darlington configuration, if the output switch is driven into hard saturation at low switch currents (≤300 mA) and high driver currents (≥30 mA), it may take up to 2 µs for the switch to come out of saturation. This condition effectively shortens the off time at frequencies ≥30 kHz, becoming magnified as temperature increases. The following output drive condition is recommended in the non-Darlington configuration: Forced of output switch = IC,SW / (IC,driver − 7 mA) ≥ 10, where 7 mA is required by the 100-Ω resistor in the emitter of the driver to forward bias the Vbe of the switch. COMPARATOR PARAMETER TEST CONDITIONS Vth Threshold voltage ∆Vth IIB Threshold-voltage line regulation Input bias current VCC = 5 V to 40 V VIN = 0 V TA MIN TYP MAX 25°C 1.225 1.25 1.275 Full range 1.21 1.29 UNIT V Full range 1.4 5 mV Full range −20 −400 nA MIN MAX UNIT TOTAL DEVICE PARAMETER ICC Supply current TEST CONDITIONS VCC = 5 V to 40 V, CT = 1 nF, VPIN7 = VCC, VPIN5 > Vth, VPIN2 = GND, all other pins open POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TA Full range 4 mA 3 SLLS636D – DECEMBER 2004 – REVISED MARCH 2005 TYPICAL CHARACTERISTICS 100 1.8 VCC = 5 V Pin 7 = VCC Pin 5 = GND TA = 25°C VCE(SAT), Output Switch Saturation Voltage (V) tON-OFF, Output Switch On-Off Time (µs) 1000 tON tOFF 10 1 0.01 0.1 1 CT, Oscillator Timing Capacitor (nF) 1.5 1.4 1.3 1.2 1.1 0.4 340 1.0 Force Beta = 20 0.6 VCC = 5 V Pin 7 = VCC Pin 2, 3, 5 = GND TA = 25°C 0.2 0.2 0.4 0.6 0.8 1.0 1.2 1 IC, Collector Current (A) 1.4 1.6 Figure 3. Output Switch Saturation Voltage vs Collector Current (Common-Emitter Configuration) 260 240 220 200 −50 −25 ICC, Supply Current (mA) 2.0 1.6 CT = 1 nF Pin 7 = VCC Pin 2 = GND TA = 25°C 0.0 5 10 15 20 25 30 VCC, Supply Voltage (V) 35 40 Figure 5. Standby Supply Current vs Supply Voltage 4 POST OFFICE BOX 655303 0 25 50 75 100 TA, Ambient Temperature (°C) 125 Figure 4. Current-Limit Sense Voltage vs Temperature 2.4 0 1.6 280 2.8 0.4 1.4 300 3.2 0.8 1.2 320 3.6 1.2 1 1.0 VCC = 5 V ICHG=DISCHG I 360 0.4 0.8 380 Darlington Connection 0.8 0.6 Figure 2. Output Switch Saturation Voltage vs Emitter Current (Emitter-Follower Configuration) 1.2 0.0 0 0.0 0 0.2 IE, Emitter Current (A) VIPK, Current Limit Sense Voltage (mV) VCE(SAT), Output Switch Saturation Voltage (V) 1.6 1.0 1 0 0.0 10 Figure 1. Output Switch On-Off Time vs Oscillator Timing Capacitor 1.4 VCC = 5 V Pin 1, 7, 8 = VCC Pin 3, 5 = GND TA = 25°C 1.7 • DALLAS, TEXAS 75265 SLLS636D – DECEMBER 2004 – REVISED MARCH 2005 TYPICAL CHARACTERISTICS 170 µH L 1 8 180 Ω S Q Q2 1N5819 Q1 R 2 7 Ipk RSC 0.22 Ω Vin 12 V 6 + 3 CT VCC + _ Comparator 100 µF 1.25-V Reference Regulator CT 1500 pF 4 5 1.0 µH R2 R1 2.2 kΩ CO 330 µF 47 kΩ + Vout 28 V/175 mA Vout 100 µF + Optional Filter TEST RESULTS CONDITIONS Line Regulation VIN = 8 V to 16 V, IO = 175 mA 30 mV ± 0.05% Load Regulation VIN = 12 V, IO = 75 mA to 175 mA 10 mV ± 0.017% Output Ripple VIN = 12 V, IO = 175 mA 400 mVPP Efficiency VIN = 12 V, IO = 175 mA 87.7% Output Ripple With Optional Filter VIN = 12 V, IO = 175 mA 40 mVPP Figure 6. Step-Up Converter POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SLLS636D – DECEMBER 2004 – REVISED MARCH 2005 TYPICAL CHARACTERISTICS R* 8 1 7 7 2 1 Vout 2 RSC RSC Vin 8 Vout 6 Vin 6 *R " 0 for constant Vin 2a. External npn Switch 2b. External pnp Saturated Switch (see Note 5) NOTE A: If the output switch is driven into hard saturation (non-Darlington configuration) at low switch currents (≤300 mA) and high driver currents (≥30 mA), it may take up to 2 µs to come out of saturation. This condition will shorten the off time at frequencies ≥30 kHz and is magnified at high temperatures. This condition does not occur with a Darlington configuration because the output switch cannot saturate. If a non-Darlington configuration is used, the output drive configuration in Figure 2b is recommended. Figure 7. External Current-Boost Connections for IC Peak Greater Than 1.5 A 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS636D – DECEMBER 2004 – REVISED MARCH 2005 TYPICAL CHARACTERISTICS 1 8 S Q Q2 Q1 R 2 7 Vin 25 V Oscillator 6 + 1N5819 Ipk RSC 0.33 Ω CT 3 VCC + _ Comparator 100 µF 1.25-V Reference Regulator L 220 µH CT 470 pF 4 5 1.0 µH R2 R1 1.2 kΩ Vout 5 V/500 mA 3.8 kΩ CO 470 µF + Vout 100 µF + Optional Filter TEST RESULTS CONDITIONS Line Regulation VIN = 15 V to 25 V, IO = 500 mA 12 mV ± 0.12% Load Regulation VIN = 25 V, IO = 50 mA to 500 mA 3 mV ± 0.03% Output Ripple VIN = 25 V, IO = 500 mA 120 mVPP Short-Circuit Current VIN = 25 V, RL = 0.1 Ω 1.1 A Efficiency VIN = 25 V, IO = 500 mA 83.7% Output Ripple With Optional Filter VIN = 25 V, IO = 500 mA 40 mVPP Figure 8. Step-Down Converter POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SLLS636D – DECEMBER 2004 – REVISED MARCH 2005 TYPICAL CHARACTERISTICS 8 1 1 8 7 2 Vout RSC RSC Vin 7 2 Vout 6 Vin 6 4b. External pnp Saturated Switch 4a. External npn Switch Figure 9. External Current-Boost Connections for IC Peak Greater Than 1.5 A 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS636D – DECEMBER 2004 – REVISED MARCH 2005 TYPICAL CHARACTERISTICS 1 8 S Q Q2 Q1 R 2 7 Vin Oscillator 6 4.5 V to 6.0 V + L 88 µH Ipk RSC 0.24 Ω CT 3 VCC + _ Comparator 100 µF 1.25-V Reference Regulator 1N5819 + 1500 pF 4 5 1.0 µH R1 R2 8.2 kΩ Vout −12 V/100 mA 953 Ω CO 1000 µF Vout 100 µF + + Optional Filter TEST RESULTS CONDITIONS Line Regulation VIN = 4.5 V to 6 V, IO = 100 mA 3 mV ± 0.12% Load Regulation VIN = 5 V, IO = 10 mA to 100 mA 0.022 V ± 0.09% Output Ripple VIN = 5 V, IO = 100 mA 500 mVPP Short-Circuit Current VIN = 5 V, RL = 0.1 Ω 910 mA Efficiency VIN = 5 V, IO = 100 mA 62.2% Output Ripple With Optional Filter VIN = 5 V, IO = 100 mA 70 mVPP Figure 10. Voltage-Inverting Converter POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SLLS636D – DECEMBER 2004 – REVISED MARCH 2005 TYPICAL CHARACTERISTICS 8 1 1 8 Vout 7 2 7 2 Vout Vin 6 Vin 6a. External npn Switch 6 6b. External pnp Saturated Switch Figure 11. External Current-Boost Connections for IC Peak Greater Than 1.5 A 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS636D – DECEMBER 2004 – REVISED MARCH 2005 APPLICATION INFORMATION calculations of key parameters CALCULATION ton/toff (ton + toff) toff ton V out ) V F * V in(min) V in(min) * V sat 1 f t on ) t off t on t off ǒt on *5 4 Ipk(switch) 2I out(max) Rsc 0.3 I pk(switch) CO 10 V in * V sat 1 f t on ) t off ǒ ǒt on t on 4 Ǔ t on )1 t off ǒ ǒVin(min) * VsatǓ 9 I outt on V rippleǒppǓ I pk(switch) Ǔ t on(max) ŤV Ť ) V out F 1 f t on ) t off t on t off ) t offǓ * t off VOLTAGE INVERTING V out ) V F V in(min) * V sat * V out ) 1 CT L(min) STEP DOWN STEP UP t on t off ) 1 ) t offǓ * t off 10 *5 t on ) 1 ǒt on ) t offǓ * t off 4 10 *5 t on ǒ 2I out(max) 2I out(max) 0.3 I pk(switch) 0.3 I pk(switch) ǒ I pk(switch) I pk(switch)ǒt on ) t offǓ 8V rippleǒppǓ POST OFFICE BOX 655303 Ǔ ǒVin(min) * Vsat * VoutǓ • DALLAS, TEXAS 75265 t on(max) ǒ 9 Ǔ t on )1 t off Ǔ ǒVin(min) * VsatǓ I pk(switch) t on(max) I outt on V rippleǒppǓ 11 PACKAGE OPTION ADDENDUM www.ti.com 9-Mar-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) MC33063AD ACTIVE SOIC D 8 75 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1 YEAR/ Level-1-235C-UNLIM MC33063ADR ACTIVE SOIC D 8 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1 YEAR/ Level-1-235C-UNLIM MC33063AP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC MC34063AD ACTIVE SOIC D 8 75 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1 YEAR/ Level-1-235C-UNLIM MC34063ADR ACTIVE SOIC D 8 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1 YEAR/ Level-1-235C-UNLIM MC34063AP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 MECHANICAL DATA MPDI001A – JANUARY 1995 – REVISED JUNE 1999 P (R-PDIP-T8) PLASTIC DUAL-IN-LINE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.020 (0,51) MIN 0.015 (0,38) Gage Plane 0.200 (5,08) MAX Seating Plane 0.010 (0,25) NOM 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.430 (10,92) MAX 0.010 (0,25) M 4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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