SEMICONDUCTOR TECHNICAL DATA The MC10186 contains six high–speed, master slave type “D” flip–flops. Clocking is common to all six flip–flops. Data is entered into the master when the clock is low. Master to slave data transfer takes place on the positive–going Clock transition. Thus, outputs may change only on a positive–going Clock transition. A change in the information present at the data (D) input will not affect the output information any other time due to the master–slave construction of this device. A COMMON RESET IS INCLUDED IN THIS CIRCUIT. RESET ONLY FUNCTIONS WHEN CLOCK IS LOW. L SUFFIX CERAMIC PACKAGE CASE 620–10 P SUFFIX PLASTIC PACKAGE CASE 648–08 PD = 460 mW typ/pkg (No Load) ftoggle = 150 MHz (typ) tr, tf = 2.0 ns typ (20%–80%) FN SUFFIX PLCC CASE 775–02 LOGIC DIAGRAM DIP PIN ASSIGNMENT D0 D1 D2 5 6 7 D3 10 2 3 4 Q0 Q1 Q2 RESET 1 16 VCC Q0 2 15 Q5 Q1 3 14 Q4 Q2 4 13 Q3 D0 5 12 D5 D1 6 11 D4 D2 7 10 D3 VEE 8 9 CLOCK 13 Q3 Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6–11 of the Motorola MECL Data Book (DL122/D). D4 11 14 Q4 CLOCKED TRUTH TABLE D5 12 15 Q5 CLOCK 9 RESET 1 VCC = PIN 16 VEE = PIN 8 R C D Qn + 1 L L X Qn L H* L L L H* H H H L X L *A clock H is a clock transition from a low to a high state. 3/93 Motorola, Inc. 1996 3–147 REV 5 MC10186 ELECTRICAL CHARACTERISTICS Test Limits Characteristic Power Supply Drain Current Input Current Symbol Pin Pi Under Test IE 8 121 IinH 5 9 1 350 495 920 IinL 5 0.5 –30°C Min +25°C Max Min +85°C Max Unit 110 121 mAdc 220 310 575 220 310 575 µAdc Typ Max 88 0.5 Min µAdc 0.3 Output Voltage Logic 1 VOH 2[ 15[ –1.060 –1.060 –0.890 –0.890 –0.960 –0.960 –0.810 –0.810 –0.890 –0.890 –0.700 –0.700 Vdc Output Voltage Logic 0 VOL 2[ 15[ –1.890 –1.890 –1.675 –1.675 –1.850 –1.850 –1.650 –1.650 –1.825 –1.825 –1.615 –1.615 Vdc Threshold Voltage Logic 1 VOHA 2[ 15[ –1.080 –1.080 Threshold Voltage Logic 0 VOLA 2[ 15[ Switching Times –0.980 –0.980 –0.910 –0.910 –1.655 –1.655 –1.630 –1.630 Vdc –1.595 –1.595 (50Ω Load) Propagation Delay Vdc ns t1+3– t1+4– t9+2+ t9+2– 3 4 2 2 1.6 1.6 1.6 1.6 4.6 4.6 4.6 4.6 1.6 1.6 1.6 1.6 2.5 2.5 3.5 3.5 4.5 4.5 4.5 4.5 1.6 1.6 1.6 1.6 5.0 5.0 5.0 5.0 Rise Time (20 to 80%) t2+ 2 1.0 4.1 1.1 1.8 4.0 1.1 4.4 Fall Time (20 to 80%) t2– 2 1.0 4.1 1.1 1.8 4.0 1.1 4.4 Setup Time tsetup 2 2.5 2.5 2.5 2.5 ns Hold Time thold 2 1.5 1.5 –1.5 1.5 ns Toggle Frequency (Max) ftog 2 125 125 150 125 MHz [ Output level to be measured after clock pulse. MOTOROLA VIL VIH appears at clock input (Pin 9). 3–148 MECL Data DL122 — Rev 6 MC10186 ELECTRICAL CHARACTERISTICS (continued) TEST VOLTAGE VALUES (Volts) Characteristic Power Supply Drain Current Input Current @ Test Temperature VIHmax VILmin VIHAmin VILAmax VEE –30°C –0.890 –1.890 –1.205 –1.500 –5.2 +25°C –0.810 –1.850 –1.105 –1.475 –5.2 +85°C –0.700 –1.825 –1.035 –1.440 –5.2 Symbol Pin Under Test IE 8 IinH 5 9 1 IinL 5 Output Voltage Logic 1 VOH 2[ 15[ Output Voltage Logic 0 VOL 2[ 15[ Threshold Voltage Logic 1 VOHA 2[ 15[ Threshold Voltage Logic 0 VOLA 2[ 15[ Switching Times (50Ω Load) Propagation Delay TEST VOLTAGE APPLIED TO PINS LISTED BELOW VIHmax 3 4 2 2 VEE (VCC) Gnd 8 16 8 8 8 16 16 16 8 16 8 8 16 16 8 8 16 16 8 8 16 16 5 12 8 8 16 16 Pulse In Pulse Out –3.2 V +2.0 V 1, 9 1, 9 5, 9 5, 9 3 4 2 2 8 8 8 8 16 16 16 16 VIHAmin VILAmax 5 9 1 5 5 12 5 12 5 12 +1.11Vdc t1+3– t1+4– t9+2+ t9+2– VILmin 6 7 +0.31V Rise Time (20 to 80%) t2+ 2 5, 9 2 8 16 Fall Time (20 to 80%) t2– 2 5, 9 2 8 16 Setup Time tsetup 2 5, 9 2 8 16 Hold Time thold 2 5, 9 2 8 16 Toggle Frequency (Max) ftog 2 8 16 [ Output level to be measured after clock pulse. VIL VIH appears at clock input (Pin 9). Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner. MECL Data DL122 — Rev 6 3–149 MOTOROLA MC10186 OUTLINE DIMENSIONS FN SUFFIX PLASTIC PLCC PACKAGE CASE 775–02 ISSUE C 0.007 (0.180) M T L–M B Y BRK –N– U N S 0.007 (0.180) M T L–M S S N S D –L– –M– Z W 20 D 1 V 0.010 (0.250) G1 X S T L–M N S S VIEW D–D A 0.007 (0.180) M T L–M S N S R 0.007 (0.180) M T L–M S N S Z C H –T– SEATING PLANE F VIEW S G1 0.010 (0.250) S T L–M S 0.007 (0.180) M T L–M S N S VIEW S S N S NOTES: 1. DATUMS –L–, –M–, AND –N– DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM –T–, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). MOTOROLA N K 0.004 (0.100) J S K1 E G 0.007 (0.180) M T L–M 3–150 DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.385 0.395 0.385 0.395 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 ––– 0.025 ––– 0.350 0.356 0.350 0.356 0.042 0.048 0.042 0.048 0.042 0.056 ––– 0.020 2_ 10 _ 0.310 0.330 0.040 ––– MILLIMETERS MIN MAX 9.78 10.03 9.78 10.03 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 ––– 0.64 ––– 8.89 9.04 8.89 9.04 1.07 1.21 1.07 1.21 1.07 1.42 ––– 0.50 2_ 10 _ 7.88 8.38 1.02 ––– MECL Data DL122 — Rev 6 MC10186 OUTLINE DIMENSIONS L SUFFIX CERAMIC DIP PACKAGE CASE 620–10 ISSUE V –A– 16 9 1 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. –B– C L DIM A B C D E F G H K L M N –T– K N SEATING PLANE M E F J G D 16 PL 0.25 (0.010) 16 PL 0.25 (0.010) M T A T B M –A– 9 1 8 B F C L S –T– SEATING PLANE K H G D M J 16 PL 0.25 (0.010) M MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 ––– 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01 S P SUFFIX PLASTIC DIP PACKAGE CASE 648–08 ISSUE R 16 S INCHES MIN MAX 0.750 0.785 0.240 0.295 ––– 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15 _ 0.020 0.040 T A M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. 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Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 MFAX: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 ◊ MECL Data DL122 — Rev 6 3–151 *MC10186/D* MC10186/D MOTOROLA