E-CMOS EC9232NNQ1R Multi-channel tft lcd supply Datasheet

Multi-Channel TFT LCD Supply
EC9232
General Description
The EC9232 is an integrated power supply solution optimized for small to medium size thin-film transistor (TFT)
liquid crystal displays (LCD’s). The boost converter operates at the frequency of 1.2MHz. The integrated N
channel FET has a typical current limit of 3.0A and can support output voltages up to 20V. The gate-on and
gate-off charge pumps provide regulated TFT-LCD gate-on and gate-off supplies. Both outputs can be adjusted
by external resistive voltage-dividers. The GPM is a flicker compensation circuit to reduce the coupling effect of
gate lines; the gate-shaping timing is controlled by the timing-controller to modulate the Gate-On voltage, VGHM.
It also can delay the Gate-On voltage during power-on to achieve a correct power-on sequence for gate driver
ICs. Both the power-on delay time and the falling time of the Gate-On voltage are programmable by external
capacitor and resistor. The integrated operational amplifier is typically used for LCD VCOM driving; the output can
sink or source up to 350mA short-circuit current. This operational amplifier features fast slew rate (40V/us), wide
bandwidth (20MHz), and rail-to-rail outputs as well. A built-in voltage detector generates a reset signal when the
input voltage drops below a specified level. The reset signal is active low, and the detecting level is decided by
an external resistor divider. The EC9232 is available in a thin 24-pin 4x4 mm VQFN green package.
Features
VQFN-24 Pin Configuration
◆ 2.5V to 5.5V input supply
◆ Current-mode boost regulator
- 1.2MHz switching frequency
- Integrated 20V/3.0A 160mΩ FET
- Fast transient response to pulsed load
- High efficiency up to 90%
- Adjustable high-accuracy output voltage(±1%)
- Over current protection
- Over voltage protection
◆ VGH positive charge pump controller
◆ VGL negative charge pump controller
◆ Integrated high performance operational amplifier
- ±350mA output short-circuit current
- 40V/us fast slew rate
- 20MHz Bandwidth
- rail-to-rail output
◆ Low-voltage detection circuit
◆ GPM controller
- Adjustable falling time
- Adjustable delay
◆ Thermal shutdown
◆ Thin 4x4 mm 24-lead VQFN package
Applications
◆ TFT LCD for Notebooks
◆ TFT LCD for Monitors
◆ Car Navigation Display
◆ Portable equipment
E-CMOS Corp. (www.ecmos.com.tw)
1/14
5E26N-Rev. F001
EC9232
Multi-Channel TFT LCD Supply
Pin Description
Number
Name
Pin Description
1
OPA+
Operational amplifier non-inverting input.
2
OPA-
Operational amplifier inverting input.
3
OPAO
Operational amplifier output.
4
BGND
Ground for operational amplifier and charge pumps.
5
AVDD
Charge pump supply and operational amplifier supply.
6
DRVP
Positive charge pump driving output.
7
DRVN
Negative charge pump driving output.
8
VFLK
Timing control pin for charging or discharging VGHM.
9
RSTnn
Voltage detector output for reset, active low. RSTnn is an open-drain output.
10
FBP
Positive charge pump feedback sense input.
11
FBN
Negative charge pump feedback sense input.
12
REF
13
VIN
Reference output. All power outputs are disabled until REF exceeds its UVLO
threshold.
Supply for PWM, reference and other circuits.
14
AGND
Analog ground.
15
VDIV
Voltage detector divider input.
16
COMP
Boost converter error amplifier compensation node.
17
FB
Boost converter feedback voltage sense input.
PGND
Boost converter power ground (source of the internal NMOS switch).
20
LX
Boost converter switching node (drain of the internal NMOS switch).
21
RE
Switch input to discharge VGHM.
22
VGHM
Supply voltage for Gate Driver.
23
VGH
Input to charge VGHM.
24
VDPM
GPM startup delay input; charged with a constant 5µA current.
TP
Thermal Pad, connect to AGND.
18,19
-
Ordering Information
EC9232 NN XX X
R:Tape & Reel
Q1:VQFN
Part Number
Package
Marking
EC9232NNQ1R
VQFN 24L
9232
LLLLL
E-CMOS Corp. (www.ecmos.com.tw)
Marking Information
1. LLLLL:Lot No
5E26N-Rev. F001
2/14
Multi-Channel TFT LCD Supply
EC9232
Function Block Diagram
E-CMOS Corp. (www.ecmos.com.tw)
5E26N-Rev. F001
3/14
Multi-Channel TFT LCD Supply
EC9232
Typical Application Diagram
E-CMOS Corp. (www.ecmos.com.tw)
5E26N-Rev. F001
4/14
EC9232
Multi-Channel TFT LCD Supply
Absolute Maximum Ratings
Input Supply Voltage, VIN
-0.3V to 6.5V
Voltages on RSTnn, VDIV, VFLK
-0.3V to 6.5V
Voltages on AVDD, LX
-0.3V to 22V
Voltages on VGH, VGHM, RE
-0.3V to 38V
Voltages on FB, FBP, FBN, COMP, REF, VDPM
-0.3V to (VIN+0.3V)
Voltages on DRVP, DRVN, OPA+,OPA-, OPAO
-0.3V to (AVDD+0.3V)
Storage temperature range
-65°C to 150°C
Lead temperature (soldering, 10s maximum)
260°C
ESD, Human body mode
2kV
ESD, Machine mode
200V
Note1: All voltages are referenced to ground with PGND and AGND pins grounded.
Note2: “ABSOLUTE MAXIMUM RATINGS” indicate limits beyond which permanent damage to the device
may occur. These are stress ratings only, and functional operation of the device at these or any other
conditions beyond those indicated under "Recommended Operating Conditions" is not implied. For
guaranteed specifications and test conditions, see the “ELECTRICAL SPECIFICATIONS”.
Recommended Operation Conditions
Junction temperature range
-40°C to 125°C
Ambient temperature range
-40°C to 85°C
Power Dissipation Ratings
Package
24-ld QFN
Thermal Resistance,
Power Rating
Power Rating
Power Rating
ΘJA
(TA < 25 °C )
(25 < TA < 85 °C )
(TA = 85°C )
44°C /W
2.28W
(125 - TA) / 44 W
0.9W
E-CMOS Corp. (www.ecmos.com.tw)
5E26N-Rev. F001
5/14
EC9232
Multi-Channel TFT LCD Supply
Electrical Specifications
(VIN=5V, AVDD = 13V, TA=25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
System Supply
Input Supply Voltage
VIN Under Voltage Lockout
Threshol
VIN
VUVLO
VIN Quiescent current
IQ
Thermal shutdown
TSHDN
2.5
--
5.5
V
VIN falling
2.05
2.15
2.25
V
VIN rising
2.15
2.25
2.35
V
VFB = 1.35V, LX no switching
--
0.6
0.9
mA
VFB = 1.15V, LX switching
--
3
4.5
mA
--
160
--
℃
Main Boost Regulator
Output Voltage Range
AVDD
FB Regulation Voltage
VFB
VIN
-
18
V
FB=COMP,CCOMP=1nF
1.238
1.25
1.262
V
0.95
1
1.05
FB Fault Trip Level
Falling edge
FB Load Regulation
0< ILOAD < full, transient only
FB Line Regulation
VIN = 2.5 to 5.5V
FB Input Bias Current
VFB = 1.25V
FB Transconductance
Gm
FB Voltage Gain
AV
LX Current Limit
LX On-Resistance
Rds_LX
-40
∆I=±5uA at COMP, FB = COMP
REF OUTPUT Voltage
VREF
REF under Voltage Lockout
Threshold
VREF_UVLO
REF Load Regulation
IREF
%/V
40
nA
uA/V
3
V/V
3.5
A
Ω
ILX = 200mA
0.16
0.01
20
uA
0.2
0.3
V/A
0.1
TSS1
0.15
0
VLX = 19V, TA = +25°C
Current-Sense Transresistance
Soft-Start Period
0.05
1500
2.5
V
%
85
FB to COMP
VFB =1.1V, duty cycle = 75%
LX Leakage Current
-1
14
ms
Reference
REF Line Regulation
IREF=50uA
1.238
1.25
1.262
V
VREF falling
0.86
VREF rising
1.08
0<ILOAD <100uA
1
5
mV
IREF = 100uA
2
5
mV
Oscillator and Timing
Frequency
FOSC
1000
1200
1400
KHz
Oscilllator Maximum Duty Cycle
DUTY
86
90
94
%
FB or FBP or FBN below
47
55
65
ms
VDPM Capacitor Charge Current
IDPM
During startup VVDPM
4
5
6
uA
VDPM Turn-on threshold
IvDPM
During startup VVDPM
1.22
1.25
1.28
v
Duration to Trigger Fault Condition
E-CMOS Corp. (www.ecmos.com.tw)
5E26N-Rev. F001
6/14
EC9232
Multi-Channel TFT LCD Supply
Positive Charge-Pump Regulator
AVDD Supply Range
VAVDD
6
18
V
Operating Frequency
FOSC_CP
500
600
700
KHz
FBP Regulation Voltage
VFBP
1.23
1.25
1.27
V
FBP Input Bias Current
IFBP_BIAS
-40
-
40
nA
DRVP P-Ch On-Resistance
RDRVPP
3
6
Ω
DRVP N-Ch On-Resistance
RDRVPN
3
6
Ω
1
1.05
V
FBP Fault Trip Level
Soft-Start Period
VFBP =1.5V, TA = +25°C
Falling edge
0.95
TSS2
3.4
ms
Negative Charge-Pump Regulator
AVDD Supply Range
VAVDD
6
18
V
Operating Frequency
FOSC_CP
500
600
700
KHz
FBN Regulation Voltage
VFBN
235
250
265
mV
FBN Input Bias Current
IFBN_BIAS
-40
-
40
nA
DRVN P-Ch On-Resistance
RDRVNP
3
6
Ω
DRVN N-Ch On-Resistance
RDRVNN
3
6
Ω
0.45
0.5
V
FBN Fault Trip Level
Soft-Start Period
VFBN = 0V, TA = +25°C
Rising edge
0.4
TSS3
3.4
ms
Operational Amplifier
AVDD Supply Range
VAVDD
6
VAVDD Overvoltage Threshold
VOVP
19
AVDD Under Voltage Lockout
Threshold
VAVDD_UVLO
3.8
AVDD Supply Current
IAVDD
Buffer configuration,
VOPA+=VAVDD/2,no load
2
Input Offset Voltage
VOS
VOPA-, VOPA+=VAVDD/2,
TA = +25°C
2
Input Bias Current
IBIAS
VOPA-, VOPA+=VAVDD/2,
TA = +25°C
Input Common-Mode Voltage
Range
18
V
20
21
V
4
4.2
V
mA
15
mV
-40
40
nA
0
VAVDD
V
Output-Voltage-Swing High
VOH
Buffer configuration,
OPAO IOUT =25 mA
Output-Voltage-Swing Low
VOL
Buffer configuration,
OPAO IOUT = -25µA
Slew Rate
SR
VOUT20% to 80% with
CL=10pF, RL=10k
40
V/us
-3dB Bandwidth
BW
CL=10pF, RL=10k
40
MHz
VOPA+=VAVDD/2 , short output to
BGND (sourcing)
350
mA
VOPA+=VAVDD/2 , short output to
AVDD (sinking)
350
mA
Short-Circuit Current
ISCC
E-CMOS Corp. (www.ecmos.com.tw)
VAVDD 350
mV
350
5E26N-Rev. F001
7/14
mV
EC9232
Multi-Channel TFT LCD Supply
Settling Time
Tsetling
Buffer configuration,
VOPA+=5.5V to7.5V,with
No output loading
220
ns
Reset Control
VDIV Threshold
VDIV
VDIV Input current
VDIV Hysteresis
△ VDIV
RSTnn Output Voltage
VRST
Reset Blanking Time
TBLK
Falling edge at VIN=5V
1.225
1.25
1.275
Falling edge at VIN=1.8V
1.213
1.25
1.287
TA=+25℃
-40
0
40
50
ISINK = 1mA
V
nA
mV
0.2
163
V
ms
GPM Control
VGH Input Voltage Range
VGH Input Current
VVGH
IVGH
VFLK Input Low Voltage
VIL
VFLK Input high Voltage
VIH
VFLK Input Current
36
VDPM=1.5V,VFLK=HIGH
600
VDPM=1.5V,VFLK=LOW
300
0.6
2
VFLK Input Current
V
uA
V
V
-40
40
nA
Propagation Delay of VFLK to
VGHM rising
Tdelay
VGH=25V
100
VGH to VGHM Switch on
Resistance
Rds_high
VDM=1.5V,VFLK=HIGH
15
30
Ω
RE to VGM Switch on
Resistance
Rds_low
VDM=1.5V,VFLK=LOW
30
60
Ω
VGHM-to –GND Pull-down
Resistance
RVGHM
VDPM=0V
2.5
ns
KΩ
Application Information
The EC9232 offers an all-in-one solution for TFT LCD. The chip includes a high-efficiency boost converter with a
20V/3A on-chip N-channel transistor for biasing of the LCD, a regulated positive charge pump, a regulated
negative charge pump, a VCOM buffer and a gate pulse modulation circuit. A voltage detector circuit generates
a reset signal when the input voltage falls below the preset threshold.
TFT LCD Boost Converter (AVDD)
The LCD panel AVDD supply is generated from a high-efficiency PWM boost converter operating with current
mode control, and the switching frequency is 1.2MHz. During the on-period, TON, the synchronous FET
connects one end of the inductor to ground, therefore increasing the inductor current. After the FET turns off, the
inductor switching node, LX, is charged to a positive voltage by the inductor current. The freewheeling diode
turns on and the inductor current flows to the output capacitor. The converter operates in the continuous
conduction mode (CCM) when the average input current IIN is at least one-half of the inductor peak- to-peak
ripple current, ∆ILPP.
E-CMOS Corp. (www.ecmos.com.tw)
5E26N-Rev. F001
8/14
Multi-Channel TFT LCD Supply
EC9232
The output voltage, AVDD, is determined by the duty cycle, D, of the power FET on-time and the input voltage,
VIN.
The average load current, ILOAD, can be calculated from the power conservation law.
η ×VIN × I IN = AVDD × I LOAD
where η is the power conversion efficiency. For a lower load current, the inductor current would decay to zero during the freewheeling period and the output node would be disconnected from the inductor for the remaining portion of the switching
period. The converter would operate in the discontinuous conduction mode (DCM). Current mode control is well known for its
robustness and fast transient response. An inner current feedback loop sets the on-time and the duty cycle such that the
current through the inductor equals to the current computed by the compensator. This loop acts within one switching cycle. A
slope compensation ramp is added to suppress sub-harmonic oscillations. An outer voltage feedback loop subtracts the
voltage on the FB pin from the internal reference voltage and feeds the difference to the compensator operational
transconductance (Gm) amplifier. This amplifier is compensated by an external R-C network to allow the user to optimize the
transient response and loop stability for the specific application conditions.
Compensator Selection
This current mode boost converter has a current sense loop and a voltage feedback loop. The current sense
loop does not need any compensation. The voltage feedback loop is compensated by an external series R-C
network RCOMP and CCOMP from COMP pin to ground. RCOMP sets the high-frequency loop gain and the
unity gain bandwidth of the loop which determines the transient response. CCOMP together with RCOMP determine
the phase margin which relates to loop stability.
Users can adjust RCOMP and CCOMP by the following equations to reach fast transient response and better
regulation.
For example, when VIN=5V, VBOOST=13.2V, COUT=40uF, LBOOST=10uH, IBOOST=1A, we put 84.5k for RCOMP and
820pF for CCOMP in Typical Application Diagram.
E-CMOS Corp. (www.ecmos.com.tw)
5E26N-Rev. F001
9/14
Multi-Channel TFT LCD Supply
EC9232
Output Capacitor Selection
The output voltage ripple due to converter switching is determined by the output capacitor total capacitance,
COUT, and the output capacitor total effective series resistance, ESR.
The first ripple component can be reduced by increasing COUT since FOSC is fixed 1.2MHz(typical).
Changing COUT may require adjustment of compensation R and C in order to provide adequate phase margin
and loop bandwidth. The second ripple component can be reduced by selecting low-ESR ceramic capacitors
and using several smaller capacitors in parallel instead of just one large capacitor.
Inductor Selection
To prevent magnetic saturation of the inductor core the inductor has to be rated for a maximum current larger
than IPK in a given application. Since the chip provides current limit protection of 3A (typ) it is generally
recommended that the inductor be rated at least for 3A.
Selection of the inductor requires trade-off between the physical size (footprint x height) and its electrical
properties (current rating, inductance, resistance). Within a given footprint and height, an inductor with larger
inductance typically comes with lower current rating and often larger series resistance. Larger inductance
typically requires more turns on the winding, a smaller core gap or a core material with a larger relative
permeability. An inductor with a larger physical size has better electrical properties than a smaller inductor.
It is desirable to reduce the ripple current ILPP in order to reduce voltage noise on the input and output capacitors.
In practice, the inductor is often much larger than the capacitors and it is easier and cheaper to increase the size
of the capacitors. The ripple current
ILPP is then chosen the largest possible while at the same time not
degrading the maximum input and output current that the converter can operate with before reaching the current
limit of the chip or the rated current of the inductor.
For example, ILPP could be set to 20% of IMAX.
Voltage Detector Circuit
During power-up, once VIN exceeds VUVLO (2.25V typical), the controller initiates a 163ms blanking period during
which the input voltage at VDIV is ignored and the RSTnn pin is floated to high impedance. An external pull up
resistor should pull RSTnn high. After this blanking period, the VDIV function is enabled, with RSTnn driven low if
VDIV falls below VDIV, or floated high if VDIV rises above VDIV.To the external voltage Vext, the rising and falling
detection thresholds VDET,High and VDET,Low, respectively are set by the external voltage divider R3, R4.
E-CMOS Corp. (www.ecmos.com.tw)
5E26N-Rev. F001
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Multi-Channel TFT LCD Supply
EC9232
Positive Charge Pump (VGH)
The positive charge pump is used to generate the TFT LCD gate on voltage. The output voltage, VGH, can be
set by an external resistive divider. Voltage VFBP is typically 1.25V. A single stage charge pump can produce an
output voltage less than approximately twice the charge pump input voltage AVDD. The maximum voltage VGH
should not exceed 36V if it is used to supply the GPM circuit. The output voltage VGH is regulated as the
following equation.
Negative Charge Pump (VGL)
The negative charge pump is used to generate the TFT LCD gate off voltage. The output voltage, VGL, is set
with an external resistive divider from its output to REF with the midpoint connected to FBN. The error amplifier
compares the feedback signal from FBN with an internal reference 250mV. The output voltage VGL is regulated
as the following equation.
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5E26N-Rev. F001
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EC9232
Multi-Channel TFT LCD Supply
Gate-pulse modulator (GPM)
The GPM is a flicker compensation circuit to reduce the coupling effect of gate lines, and is controlled by timing
controller to modulate VGHM, the Gate-On voltage. This block is not activated until the below 3 conditions are
satisfied:
1) The input voltage exceeds its UVLO,
2) No fault condition is detected, and 3) VDPM exceeds its turn-on threshold. Once GPM activates and VFLK is high,
the internal switch between VGH and VGHM turns on and the switch between VGHM and RE turns off. If VFLK is low,
the internal switch between VGH and VGHM turns off and the switch between VGHM and RE turns on. At that time,
the falling time and delay time of the Gate-On voltage are programmable by an external resistor connected
between RE and GND.
Operational Amplifier
The operational amplifier is typically used for LCD VCOM buffer. The VCOM buffer generates the bias supply for the
back plane of an LCD screen which is capacitively coupled to the pixel drive voltage. The purpose of the VCOM
buffer is to hold the bias voltage steady while pixel voltage changes dynamically. The buffer is designed to
sustain up to ±350mA of output short-circuit current. In transients, it can deliver up to 350mA at which point the
over current protection circuit limits the output current. Excessive current draw over a period of time may cause
the chip temperature to rise and set off the over temperature protection circuit.
Soft-Start Function
The IC employs a internal soft-start function to minimize inrush current and voltage overshoot, and ensure a
well-defined startup behaviour. The soft-start time of the boost controller is 14ms (typ), and the soft-start time of
positive and negative charge pump is 3.4ms (typ).
Under Voltage Protection
During steady-state operation, if the feedback voltage pin FB is below 1V of the nominal value, the EC9232
activates an internal fault timer. If any condition indicates a continuous fault for the fault timer duration (55ms
typ), the IC sets the fault latch to shut down all its outputs except the reference. Once the fault condition is
removed, cycle the VIN (below the UVLO falling threshold) to clear the fault latch and reactivate the device.
The fault-detection circuit is disabled during the soft-start ramp.
The positive and negative charge pump controller also provide the under voltage protection function during
steady-state operation. If FBP voltage is lower than 1V (typ) or FBN voltage is higher than 0.45V (typ), and the fault
duration is over 55ms (typ), the IC sets the fault latch to shut down all its outputs as well.
Thermal-Overload Protection
The EC9232 provides a Thermal-Overload Protection to prevents excessive power dissipation from overheating
the IC. When the junction temperature exceeds TJ = 160°C, a thermal sensor activates the fault protect ion,
which shuts down all outputs except the reference. To resume normal function, the temperature must cool down
by 15°C and cycle the IC power to clear the fault l atch.
E-CMOS Corp. (www.ecmos.com.tw)
5E26N-Rev. F001
12/14
Multi-Channel TFT LCD Supply
EC9232
Startup Sequence
Power-off Sequence
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5E26N-Rev. F001
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Multi-Channel TFT LCD Supply
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EC9232
5E26N-Rev. F001
14/14
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