LTC3900
Synchronous Rectifier Driver
for Forward Converters
Features
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Description
N-Channel Synchronous Rectifier MOSFET Driver
Programmable Timeout Protection
Reverse Inductor Current Protection
Pulse Transformer Synchronization
Wide VCC Supply Range: 4.5V to 11V
15ns Rise/Fall Times at VCC = 5V, CL = 4700pF
Undervoltage Lockout
Small SO-8 Package
The LTC®3900 is a secondary-side synchronous rectifier driver designed to be used in isolated forward converter power supplies. The chip drives N-channel rectifier
MOSFETs and accepts pulse sychronization from the
primary-side controller via a pulse transformer.
The LTC3900 incorporates a full range of protection for the
external MOSFETs. A programmable timeout function is
included that disables both drivers when the synchronization signal is missing or incorrect. Additionally, the chip
senses the output inductor current through the drain-source
resistance of the catch MOSFET, shutting off the MOSFET
if the inductor current reverses. The LTC3900 also shuts
off the drivers if the supply voltage is too low.
Applications
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48V Input Isolated DC/DC Converters
Isolated Telecom Power Supplies
High Voltage Distributed Power
Step-Down Converters
Industrial Control System Power Supplies
Automotive and Heavy Equipment
L, LT, LTC, LTM, Linear Technology, Burst Mode and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
Typical Application
ISOLATION
BARRIER
VIN
36V TO 72V
L0
D3
COUT
+
VOUT
3.3V
40A
Efficiency
T1
RCS2
Q1
RCS1
Q3
OUT
OC
ISENSE
FG
CSG
TIMER
T2
SG
CVCC
CTMR
SYNC GND
VIN = 36V
VIN = 72V
85
VIN = 48V
80
75
70
RSYNC
270Ω
65
VIN
OCI
VOUT = 3.3V
90
RTMR
LTC3900
RCS3
10mΩ
95
QREG
VCC
CS–
LT1952
SOUT
GND COMP
RB
DZ
CS+
CG
Q4
470Ω
RZ
EFFICIENCY (%)
CZ
GATE
GND
OC
OPTO
LT4430
R1
0
5
10
15 20 25 30
LOAD CURRENT (A)
35
40
3900 F10b
COMP
FB
R2
3900 F01
Figure 1. Simplified Isolated Synchronous Forward Converter
3900fb
1
LTC3900
Absolute Maximum Ratings
Pin Configuration
(Note 1)
Supply Voltage
VCC.........................................................................12V
Input Voltage
CS –, TIMER............................... – 0.3V to (VCC +0.3V)
SYNC....................................................... –12V to 12V
Input Current
CS+.....................................................................15mA
Operating Junction Temperature Range (Note 2)
LTC3900E............................................ –40°C to 125°C
LTC3900I............................................ –40°C to 125°C
LTC3900H........................................... –40°C to 150°C
LTC3900MP........................................ –55°C to 150°C
Storage Temperature Range.................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
TOP VIEW
CS+ 1
8
SYNC
CS–
2
7
TIMER
CG 3
6
GND
VCC 4
5
FG
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 130°C/W
order information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3900ES8#PBF
LTC3900ES8#TRPBF
3900
8-Lead Plastic Small Outline
–40°C to 125°C
LTC3900IS8#PBF
LTC3900IS8#TRPBF
3900
8-Lead Plastic Small Outline
–40°C to 125°C
LTC3900HS8#PBF
LTC3900HS8#TRPBF
3900
8-Lead Plastic Small Outline
–40°C to 150°C
LTC3900MPS8#PBF
LTC3900MPS8#TRPBF
3900
8-Lead Plastic Small Outline
–55°C to 150°C
LEAD BASED FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3900ES8
LTC3900ES8#TR
3900
8-Lead Plastic Small Outline
–40°C to 125°C
LTC3900IS8
LTC3900IS8#TR
3900
8-Lead Plastic Small Outline
–40°C to 125°C
LTC3900HS8
LTC3900HS8#TR
3900
8-Lead Plastic Small Outline
–40°C to 150°C
LTC3900MPS8
LTC3900MPS8#TR
3900
8-Lead Plastic Small Outline
–55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
Electrical Characteristics
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C. VCC = 5V unless otherwise specified. (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
4.5
TYP
MAX
UNITS
VCC
Supply Voltage Range
5
11
V
VUVLO
VCC Undervoltage Lockout Threshold
VCC Undervoltage Lockout Hysteresis
Rising Edge
Rising Edge to Falling Edge
l
4.1
0.5
4.5
V
V
IVCC
VCC Supply Current
VSYNC = 0V
fSYNC = 100kHz, CFG = CCG = 4700pF (Note 4)
l
l
0.5
7
1
15
mA
mA
VCC/5
10%
V
–6
–10
µA
l
Timer
V TMR
Timer Threshold Voltage
ITMR
Timer Input Current
l
V TMR = 0V
l
–10%
3900fb
2
LTC3900
Electrical Characteristics
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C. VCC = 5V unless otherwise specified. (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
tTMRDIS
Timer Discharge Time
CTMR = 1000pF, RTMR = 4.7k
MIN
V TMRMAX
Timer Pin Clamp Voltage
CTMR = 1000pF, RTMR = 4.7k
ICS+
CS+ Input Current
VCS+ = 0V
l
ICS –
CS – Input Current
VCS – = 0V
l
VCSMAX
CS+ Pin Clamp Voltage
IIN = 5mA, VSYNC = –5V
VCS
Current Sense Threshold Voltage
VCS – = 0V
LTC3900E/LTC3900I (Note 5)
LTC3900H/LTC3900MP (Note 5)
l
l
VSYNC = ±10V
l
l
TYP
MAX
UNITS
40
120
ns
2.5
V
Current Sense
±1
µA
±1
µA
11
V
7.5
3
1
10.5
13.5
18
20
mV
mV
mV
±1
±10
µA
l
1.0
1.4
0.2
1.8
V
V
l
–1.8
–1.4
0.2
–1.0
V
V
0.9
1.2
1.6
2.0
Ω
Ω
Ω
0.9
1.2
1.6
2.0
Ω
Ω
Ω
SYNC Input
ISYNC
SYNC Input Current
VSYNCP
SYNC Input Positive Threshold
SYNC Positive Input Hysteresis
(Note 6)
VSYNCN
SYNC Input Negative Threshold
SYNC Negative Input Hysteresis
(Note 6)
Driver Output
RONH
RONL
IPK
Driver Pull-Up Resistance
Driver Pull-Down Resistance
Driver Peak Output Current
IOUT = –100mA
LTC3900E/LTC3900I
LTC3900H/LTC3900MP
l
l
IOUT = 100mA
LTC3900E/LTC3900I
LTC3900H/LTC3900MP
l
l
(Note 6)
2
A
Switching Characteristics (Note 7)
td
SYNC Input to Driver Output Delay
CFG = CCG = 4700pF, VSYNC = ±5V
LTC3900E/LTC3900I
LTC3900H/LTC3900MP
l
l
l
tSYNC
Minimum SYNC Pulse Width
VSYNC = ±5V
t r, t f
Driver Rise/Fall Time
CFG = CCG = 4700pF, VSYNC = ±5V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3900 is tested under pulsed load conditions such that
TJ ≈ TA. The LTC3900E is guaranteed to meet performance specifications
from 0°C to 85°C operating junction temperature. Specifications over
the –40°C to 125°C operating junction temperature range are assured
by design, characterization and correlation with statistical process
controls. The LTC3900I is guaranteed over the –40°C to 125°C operating
junction temperature range. The LTC3900H is guaranteed over the full
–40°C to 150°C operating junction temperature range. The LTC3900MP
is guaranteed and tested over the full –55°C to 150°C operating junction
temperature range. High junction temperatures degrade operating
lifetimes; operating lifetime is derated for junction temperatures greater
than 125°C. Note that the maximum ambient temperature consistent
with these specifications is determined by specific operating conditions
in conjunction with board layout, the rated package thermal impedance
and other environmental factors. The junction temperature (TJ, in °C) is
60
75
120
150
ns
ns
ns
15
ns
calculated from the ambient temperature (TA, in °C) and power dissipation
(PD, in watts) according to the formula:
TJ = TA + (PD • θJA), where θJA (in °C/W) is the package thermal
impedance.
Note 3: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 4: Supply current in normal operation is dominated by the current
needed to charge and discharge the external MOSFET gates. This current
will vary with supply voltage, switching frequency and the external
MOSFETs used.
Note 5: The current sense comparator threshold has a 0.33%/°C
temperature coefficient (TC) to match the TC of the external MOSFET
RDS(ON).
Note 6: Guaranteed by design, not subject to test.
Note 7: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured from ±1.4V at SYNC input to 20%/80% levels at the
driver output.
3900fb
3
LTC3900
Typical Performance Characteristics
Timeout vs Temperature
Timeout vs VCC
5.25
TA = 25°C
RTMR = 51k
CTMR = 470pF
5.20
5.15
5.15
TIMEOUT (µs)
4.95
7
5.05
5.00
4.95
6
5
4
4.90
4.90
3
4.85
4.85
2
4.80
4.80
1
4.75
4.75
–75 –50 –25
5
8
7
VCC (V)
6
9
10
11
3900 G01
VCS(MAX) Clamp Voltage vs CS+
Input Current
18
VCC = 5V, 11V
VCS(MAX) CLAMP VOLTAGE (V)
13
11
9
7
5
25
16
15
14
13
12
10
50
75 100 125 150
TEMPERATURE (°C)
0
CS
SYNC Negative Threshold vs
Temperature
–1.1
120
VCC = 5V, 11V
–1.3
–1.4
–1.5
–1.6
–1.7
25
25
1.6
1.5
50
75 100 125 150
TEMPERATURE (°C)
1.2
1.1
3900 G07
110
70
SYNC TO FG
6
7
8
9
50
75 100 125 150
3900 G06
VCC = 5V
CLOAD = 4.7nF
100
90
80
70
60
SYNC TO FG
SYNC TO CG
50
SYNC TO CG
5
25
Propagation Delay vs
Temperature
80
4
0
TEMPERATURE (°C)
3900 G05
90
40
VCC = 5V
1.3
120
60
VCC = 11V
1.4
1.0
–75 –50 –25
30
100
50
0
20
TA = 25°C
CLOAD = 4.7nF
110
–1.2
–1.8
–75 –50 –25
15
+ INPUT CURRENT (mA)
1.7
Propagation Delay vs VCC
PROPAGATION DELAY (ns)
–1.0
10
5
3900 G04
10 20 30 40 50 60 70 80 90 100
RTMR (kΩ)
3900 G03
1.8
TA = 25°C
11
0
0
SYNC Positive Threshold vs
Temperature
17
15
3
–75 –50 –25
0
0 25 50 75 100 125 150
TEMPERATURE (°C)
3900 G02
SYNC POSITIVE THRESHOLD (V)
4
PROPAGATION DELAY (µs)
TIMEOUT (µs)
5.00
17
SYNC NEGATIVE THRESHOLD (V)
TA = 25°C
9 VCC = 5V
= 470pF
C
8 TMR
5.10
5.05
Current Sense Threshold vs
Temperature
CURRENT SENSE THRESHOLD (mV)
VCC = 5V
RTMR = 51k
CTMR = 470pF
5.20
5.10
Timeout vs RTMR
10
TIMEOUT (µs)
5.25
10
11
VCC (V)
40
–75 –50 –25
0
25
50
75 100 125 150
TEMPERATURE (°C)
3900 G08
3900 G09
3900fb
4
LTC3900
Typical Performance Characteristics
Propagation Delay vs CLOAD
TA = 25°C
VCC = 5V
110
80
70
SYNC TO FG
60
25
20
15
RISE TIME
10
SYNC TO CG
4
5
6
7
CLOAD (nF)
8
9
0
10
5
4
6
7
8
9
10
UNDERVOLTAGE LOCKOUT THRESHOLD
VOLTAGE (V)
40
35
30
25
RISE TIME
15
FALL TIME
10
5
0
0
1
2
18
3
4
5 6
CLOAD (nF)
7
8
9
4.2
0
–75 –50 –25
11
3.8
3.6
FALLING EDGE
3.4
3.2
14
12
10
VCC = 5V
50
75 100 125 150
3900 G14
TA = 25°C
fSYNC = 100kHz
VCC = 11V
20
15
10
VCC = 5V
5
6
25
25
VCC Supply Current vs Load
Capacitance
25
75 100 125 150
TEMPERATURE (°C)
0
0
TEMPERATURE (°C)
3900 G13
VCC = 11V
8
3900 G12
4.0
30
16
0 25 50 75 100 125 150
TEMPERATURE (°C)
RISING EDGE
3.0
–75 –50 –25
10
CLOAD = 4.7nF
4
–75 –50 –25
FALL TIME
4.4
VCC Supply Current vs
Temperature
20
RISE TIME
15
Undervoltage Lockout Threshold
Voltage vs Temperature
TA = 25°C
VCC = 5V
20
20
3900 G11
Rise/Fall Time vs Load
Capacitance
45
25
VCC (V)
3900 G10
50
30
5
SUPPLY CURRENT (mA)
3
RISE/FALL TIME (ns)
2
35
10
FALL TIME
5
1
40
30
50
VCC = 5V
CLOAD = 4.7nF
45
35
RISE/FALL TIME (ns)
90
Rise/Fall Time vs Temperature
50
TA = 25°C
CLOAD = 4.7nF
40
100
40
Rise/Fall Time vs VCC
45
VCC SUPPLY CURRENT (mA)
PROPAGATION DELAY (ns)
50
RISE/FALL TIME (ns)
120
50
3900 G15
0
0
1
2
3
4
5 6
CLOAD (nF)
7
8
9
10
3900 G16
3900fb
5
LTC3900
Pin Functions
CS+, CS– (Pin 1, 2): Current Sense Differential Input.
Connect CS+ through a series resistor to the drain of the
external catch MOSFET, Q4. Connect CS– to the source.
The LTC3900 monitors the CS inputs 250ns after CG goes
high. If the inductor current reverses and flows into the
MOSFET causing CS+ to rise above CS– by more than
10.5mV, the LTC3900 pulls CG low. See the Current Sense
section for more details on choosing the resistance value
for RCS1 to RCS3.
GND (Pin 6): The VCC bypass capacitor should be connected directly to this GND pin.
CG (Pin 3): Catch MOSFET Gate Driver. This pin drives the
gate of the external N-channel catch MOSFET, Q4.
SYNC (Pin 8): Driver Synchronization Input. This input
is signal edge sensitive. A negative voltage slew at SYNC
forces FG to pull high and CG to pull low. A positive voltage slew at SYNC forces FG to pull low and CG to pull
high. The SYNC input can accept both pulse or square
wave signals.
VCC (Pin 4): Main Supply Input. This pin powers the drivers and the rest of the internal circuitry. Bypass this pin
to GND using a 4.7µF ceramic capacitor in close proximity
to the LTC3900.
TIMER (Pin 7): Timer Input. Connect this pin to an external
R-C network to program the timeout period. The LTC3900
resets the timer at every negative transition of the SYNC
input. If the SYNC signal is missing or incorrect, the
LTC3900 pulls both CG and FG low once the TIMER pin
goes above the timeout threshold. See the Timer section
for more details on programming the timeout period.
FG (Pin 5): Forward MOSFET Gate Driver. This pin drives
the gate of the external N-channel forward MOSFET, Q3.
Block Diagram
+1.4V
–1.4V
SYNC 8
CS+ 1
CS– 2
–+
10.5mV
S+
S–
SYNC+
DISABLE
DRIVER
ZCS
11V
SYNC
AND
DRIVER
LOGIC
5
FG
TIMER
RESET
3
CG
6
GND
UVLO
TMR
R1
180k
ZTMR
0.5 • VCC
MTMR
VCC
SYNC–
IS
TIMER 7
4
R2
45k
3900 BD
3900fb
6
LTC3900
Applications Information
Overview
In a typical forward converter topology, a power transformer is used to provide the functions of input/output
isolation and voltage step-down to achieve the required
low output voltage. Schottky diodes are often used on
the secondary-side to provide rectification. Schottky
diodes, though easy to use, result in a loss of efficiency
due to relatively high voltage drops. To improve efficiency,
synchronous output rectifiers utilizing N-channel MOSFETs
can be used instead of Schottky diodes. The LTC3900
provides all of the necessary functions required to drive
the synchronous rectifier MOSFETs.
Figure 1 shows a simplified forward converter application.
T1 is the power transformer; Q1 is the primary-side power
transistor driven by the primary controller, LT1952 output
(OUT). The pulse transformer T2 provides synchronization
and is driven by LT1952 synchronization signal, SOUT or SG
from the primary controller. Q3 and Q4 are secondary-side
synchronous switches driven by the LTC3900’s FG and CG
output. Inductor LO and capacitor COUT form the output
filter to provide a steady DC output voltage for the load.
Also shown in Figure 1 is the feedback path from VOUT
through the optocoupler driver LT4430 and an optocoupler,
back to the primary controller to regulate VOUT.
Each full cycle of the forward converter operation consists of two periods. In the first period, Q1 turns on and
the primary-side delivers power to the load through T1.
SG goes high and T2 generates a negative pulse at the
LTC3900 SYNC input. The LTC3900 forces FG to turn on
and CG to turn off, Q3 conducts. Current flows to the
load through Q3, T1 and LO. In the next period, Q1 turns
off, SG goes low and T2 generates a positive pulse at the
LTC3900 SYNC input. The LTC3900 forces FG to turn off
and CG to turn on, Q4 conducts. Current continues to
flow to the load through Q4 and LO. Figure 2 shows the
LTC3900 synchronization waveforms.
External MOSFET Protection
A programmable timer and a differential input current sense
comparator are included in the LTC3900 for protection
of the external MOSFET during power down and Burst
Mode® operation. The chip also shuts off the MOSFETs
if VCC < 4.1V.
When the primary controller is powering down, the primary
controller shuts down first and the LTC3900 continues to
operate for a while by drawing power from the VCC bypass
cap, CVCC. The SG signal stops switching and there is no
SYNC pulse to the LTC3900. The LTC3900 keeps one of
the drivers turned on depending on the polarity of the
last SYNC pulse. If the last SYNC pulse is positive, CG
will remain high and the catch MOSFET, Q4 will stay on.
The inductor current will start falling down to zero and
continue going in the negative direction due to the voltage
that is still present across the output capacitor (the current
now flows from COUT back to LO). If Q4 is turned off while
the inductor current is negative, the inductor current will
produce high voltage across Q4, resulting in a MOSFET
avalanche. Depending on the amount of energy stored in
the inductor, this avalanche energy may damage Q4.
GATE
(OUT)
SG
(SOUT)
SYNC
FG
CG
3900 F02
Figure 2. Synchronization Waveforms
3900fb
7
LTC3900
Applications Information
The timer circuit and current sense comparator in LTC3900
are used to prevent reverse current buildup in the output
inductor.
Timer
Figure 3 shows the LTC3900 timer internal and external
circuits. The timer operates by using an external R-C
charging network to program the time-out period. On
every negative transition at the SYNC input, the chip
generates a 200ns pulse to reset the timer cap. If the
SYNC signal is missing or incorrect, allowing the timer
cap voltage to go high, it shuts off both drivers once the
voltage reaches the time-out threshold. Figure 4 shows
the timer waveforms.
A typical forward converter cycle always turns on Q3
and Q4 alternately and the SYNC input should alternate
between positive and negative pulses. The LTC3900 timer
also includes sequential logic to monitor the SYNC input
sequence. If after one negative pulse, the SYNC comparator receives another negative pulse, the LTC3900 will not
reset the timer cap. If no positive SYNC pulse appears,
both drivers are shut off once the timer times out. Once
positive pulses reappear the timer resets and the drivers
start switching again. This is to protect the external components in situations where only negative SYNC pulse is
present and FG output remains high. Figure 5 shows the
timer waveforms with incorrect SYNC pulses.
The LTC3900 has two separate SYNC comparators (S+ and
S– in the Block Diagram) to detect the positive and negative
pulses. The threshold voltages of both comparators are
designed to be of the same magnitude (1.4V typical) but
opposite in polarity. In some situations, for example during power up or power down, the SYNC pulse magnitude
may be low, slightly higher or lower than the threshold of
the comparators. This can cause only one of the SYNC
comparators to trip. This also appears as incorrect SYNC
pulse and the timer will not reset.
The timeout period is determined by the external RTMR
and CTMR values and is independent of the VCC voltage.
This is achieved by making the timeout threshold a ratio
of VCC. The ratio is 0.2x, set internally by R1 and R2 (see
Figure 3). The timeout period should be programmed to
be around one period of the primary switching frequency
using the following formula:
TIMEOUT = 0.2 • RTMR • CTMR + 0.27E-6
To reduce error in the timeout setting due to the discharge
time, select CTMR between 100pF and 1000pF. Start with a
CTMR around 470pF and then calculate the required RTMR.
CTMR should be placed as close as possible to the LTC3900
with minimum PCB trace between CTMR, the TIMER pin
and GND. This is to reduce any ringing caused by the PCB
trace inductance when CTMR discharges. This ringing may
introduce error to the timeout setting.
The timer input also includes a current sinking clamp
circuit (ZTMR in Figure 3) that clamps this pin to about
0.5 • VCC if there is missing SYNC/timer reset pulse. This
clamp circuit prevents the timer cap from getting fully
charged up to the rail, which results in a longer discharge
SG
R2
LAST
PULSE
4
RTMR
TMR
TIMEOUT
TIMER
RESET
SYNC
VCC
R1
CG
7
ZTMR
CTMR
3900 F03
FG
TIMER RESET
(INTERNAL)
TIMEOUT
THRESHOLD
TIMER
Figure 3. Timer Circuit
3900 F04
Figure 4. Timer Waveforms
3900fb
8
LTC3900
Applications Information
time. The current sinking capability of the circuit is around
1mA. The timeout function can be disabled by connecting
the timer pin to GND.
Current Sense
The differential input current sense comparator is used
for sensing the voltage across the drain-to-source terminals of Q4 through the CS+ and CS– pins. If the inductor
current reverses into the Q4 causing CS+ to rise above
CS– by more than 10.5mV, the LTC3900 pulls CG low. This
comparator is used to prevent inductor reverse current
buildup during power down or Burst Mode operation, which
may cause damage to the MOSFET. The 10.5mV input
threshold has a positive temperature coefficient, which
closely matches the TC of the external MOSFET RDS(ON).
The current sense comparator is only active 250ns after
CG goes high; this is to avoid any ringing immediately
after Q4 is switched on.
Under light load conditions, if the inductor average current is less than half of its peak-to-peak ripple current,
the inductor current will reverse into Q4 during a portion
of the switching cycle, forcing CS+ to rise above CS–.
The current sense comparator input threshold is set at
MISSING/LOW
POSITIVE
SYNC PULSE
TIMER DO NOT RESET
AT SECOND NEGATIVE
SYNC PULSE
TIMER RESET AFTER
RECEIVING POSITIVE
SYNC PULSE
10.5mV to prevent tripping under light load conditions.
If the product of the inductor negative peak current and
MOSFET RDS(ON) is higher than 10.5mV, the LTC3900 will
operate in discontinuous current mode. Figure 6 shows
the LTC3900 operating in discontinuous current mode;
the CG output goes low before the next negative SYNC
pulse, as soon as the inductor current becomes negative.
Discontinuous current mode is sometimes undesirable.
To disable discontinuous current mode operation, add a
resistor divider, RCS1 and RCS2 at the CS+ pin to increase
the 10.5mV threshold so that the LTC3900 operates in
continuous mode at no load.
The LTC3900 CS+ pin has an internal current sinking
clamp circuit (ZCS in the Block Diagram) that clamps the
pin to 11V. The clamp circuit is to be used together with
the external series resistor, RCS1 to protect the CS+ pin
from high Q4 drain voltage in the power transfer cycle.
During the power transfer cycle, Q4 is off, the drain voltage of Q4 is determined by the primary input voltage and
the transformer turns ratio. This voltage can be high and
may damage the LTC3900 if CS+ is connected directly to
the drain of Q4. The current sinking capability of the clamp
circuit is 5mA minimum.
SG
SYNC
SYNC
FG
FG
CG
CG
TIMER RESET
(INTERNAL)
INDUCTOR
CURRENT
TIMEOUT
TIMEOUT
THRESHOLD
0A
CURRENT SENSE
COMPARATOR TRIP
3900 F06a
Figure 6a. Discontinuous Current Mode Operation at No Load
TIMER
3900 F05
Figure 5. Timer Waveforms with Incorrect SYNC Pulses
3900fb
9
LTC3900
Applications Information
The value of the resistors, RCS1, RCS2 and RCS3, should
be calculated using the following formulas to meet both
the threshold and clamp voltage requirements:
k = 48 • IRIPPLE • RDS(ON) –1
RCS2 = {200 • VIN(MAX) • (NS/NP) –2200 • (1 + k)} /k
RCS1 = k • RCS2
To minimize this delay and error, do not use resistance
value higher than required and make the PCB trace from
the resistors to the LTC3900 CS+/CS– pins as short as
possible. Add a series resistor, RCS3 with value equal to
parallel sum of RCS1 and RCS2 to the CS– pin and connect
the other end of RCS3 directly to the source of Q4.
SYNC Input
RCS3 = {RCS1 • RCS2} / {RCS1 + RCS2}
If k = 0 or less than zero, RCS2 is not needed and RCS1 = RCS3 = {VIN(MAX) • (NS/NP) – 11V} / 5mA
where:
IRIPPLE = Inductor peak-to-peak ripple current
RDS(ON) = On-resistance of Q4 at IRIPPLE/2
VIN(MAX) = Primary side main supply maximum input
voltage
NS/NP = Power transformer T1, turn ratio
If the LTC3900 still operates in discontinuous mode with
the calculated resistance value, increase the value of RCS1
to raise the threshold. The resistors RCS1 and RCS2 and the
CS+ pins input capacitance plus the PCB trace capacitance
form an R-C delay; this slows down the response time
of the comparator. The resistors and CS+ input leakage
currents also create an input offset error.
Figure 7 shows the external circuit for the LTC3900 SYNC
input. With a selected type of pulse transformers, the
values of the CSG and RSYNC should be adjusted to obtain
an optimum SYNC pulse amplitude and width. A bigger
capacitor, CSG, generates a higher and wider SYNC pulse.
The peak of this pulse should be much higher than the typical LTC3900 SYNC threshold of ±1.4V. Amplitudes greater
than ±5V will help to speed up the SYNC comparator and
reduce the SYNC to drivers propagation delay. The pulse
width should be wider than 75ns. Overshoot during the
pulse transformer reset interval must be minimized and
kept below the minimum SYNC threshold of ±1V. The
amount of overshoot can be reduced by having a smaller
RSYNC.
PRIMARY
CONTROLLER
SG
(SOUT)
CSG
220pF
T2
LTC3900
SYNC
RSYNC
470Ω
T2: COILCRAFT Q4470B
OR PULSE P0926
3900 F07
SYNC
Figure 7. SYNC Input Circuit
FG
CG
INDUCTOR
CURRENT
0A
ADJUSTED CURRENT
SENSE THRESHOLD
3900 F06b
Figure 6b. Continuous Current Mode Operation
with Adjusted Current Sense Threshold
3900fb
10
LTC3900
Applications Information
An alternative method of generating the SYNC pulse is
shown in Figure 8. This circuit produces square SYNC
pulses with amplitude dependent on the logic supply
voltage. The SYNC pulse width can be adjusted with R1
and C1 without affecting the pulse amplitude.
For nonisolated applications, the SYNC input can be driven
directly by a bipolar square pulse. To reduce the propagation delay, make the positive and negative magnitude
of the square wave much greater than the ±1.4V SYNC
threshold.
derived from the power transformer T1, the LTC3900 will
initially remain off. During that period (VCC < 4.1V), the
output rectifier MOSFETs Q3 and Q4 will remain off and
the MOSFETs body diodes will conduct. The MOSFETs
may experience very high power dissipation due to a high
voltage drop in the body diodes. To prevent MOSFET damage, VCC voltage greater than 4.1V should be provided
quickly. The VCC supply circuit shown in Figure 9 will provide power for the LTC3900 within the first few switching
pulses of the primary controller, preventing overheating
of the MOSFETs.
VCC Regulator
MOSFET Selection
The VCC supply for the LTC3900 can be generated by peak
rectifying the transformer secondary winding as shown
in Figure 9. The Zener diode DZ sets the output voltage to
(VZ – 0.7V). A resistor, RB (on the order of a few hundred
ohms), in series with the base of QREG may be required
to surpress high frequency oscillations depending on
QREG’s selection.
The required MOSFET RDS(ON) should be determined based
on allowable power dissipation and maximum required
output current.
The LTC3900 has an UVLO detector that pulls the drivers
output low if VCC < 4.1V. The UVLO detector has 0.5V of
hysteresis to prevent chattering.
In a typical forward converter, the secondary-side circuits
have no power until the primary-side controller starts
operating. Since the power for biasing the LTC3900 is
PRIMARY
CONTROLLER
SG
74HC132
The LTC3900 drivers dissipate power when switching
MOSFETs. The power dissipation increases with switching frequency, VCC and size of the MOSFETs. To calculate
T1
SECONDARY
WINDING
74HC14
R1
470Ω
The body diodes conduct during the power-up phase, when
the LTC3900 VCC supply is ramping up. The CG and FG
signals stay low and the inductor current flows through
the body diodes. The body diodes must be able to handle
the load current during start-up until VCC reaches 4.1V.
T2
LTC3900
SYNC
RSYNC
470Ω
74HC14
C1
220pF
D3
MBR0540
0.1µF
RZ
2k
RB
10Ω
DZ
7.5V
QREG
BCX55
VCC
CVCC
4.7µF
3900 F09
SG
SYNC
3900 F08
Figure 9. VCC Regulator
Figure 8. Symmetrical SYNC Drive
3900fb
11
LTC3900
Applications Information
the driver dissipation, the total gate charge QG is used.
This parameter is found on the MOSFET manufacturers
data sheet.
2. Connect the two MOSFET drain terminals directly to
the transformer. The two MOSFET sources should be as
close together as possible.
The power dissipated in each LTC3900 MOSFET driver
is:
3. Keep the timer, SYNC and VCC regulator circuit away
from the high current path of Q3, Q4 and T1.
PDRIVER = QG • VCC • fSW
4. Place the timer capacitor, CTMR, as close as possible
to the LTC3900.
where fSW is the switching frequency of the converter.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3900 for your layout:
5. Keep the PCB trace from the resistors RCS1, RCS2 and
RCS3 to the LTC3900 CS+/CS– pins as short as possible.
Connect the other ends of the resistors directly to the drain
and source of the MOSFET, Q4.
1. Connect the 4.7µF bypass capacitor as close as possible
to the VCC and GND pins.
typical applications
36V to 72V, 3.3V at 40A Synchronous Forward Converter
+VIN
36V TO 72V
47k
VB1
L1
PA0912.002
• •
82k
BCX55
0.1µF
18V
Q2
PH3230
2x
12V
2.2µF
5
115k
3
27k
0.22µF
9
5
59k
10k
6
0.1µF
33k
1
2
2.2k
FG
6
SD_VSEC
OUT
ROSC
VIN
BLANK
GND
SS_MAXDC
LT1952
VR = 2.5V
COMP
FB = 1.23V
PGND
DELAY
OC
ISENSE
SOUT
14
VB1
Si7846
15
8
12
39k
16
22k
470Ω
4
8V
BIAS
1nF
0.010R
11
10
1µF
BAT760
13
10k
8
CG
3
GND
10k
VCC
CS–
2
10k
SYNC TIMER
7
15k
1nF
1nF
8V
BIAS
560R
220pF
R22
270Ω
Q4470-B
VB1
L1: PA0713, PULSE ENGINEERING
ALL CAPACITORS X7R, CERAMIC, TDK
COUT
100µF
3x
1
CS+
• •
7
Q3
PH3230
2x
LTC3900
•
370k
13.2k
VOUT
3.3V, 40A
BAS516
NEC
PS2701
C16
10pF
8V BIAS
C13
1µF
C14
33nF
6
OPTO
LT4430
5
2
GND
COMP
1
3
VIN
OC
FB
C15
R23 6.8nF
3.3k
R24
27.4k
1%
4
R25
6.04k
1%
3900 TA01
3900fb
12
LTC3900
typical applications
36V to 72V Input to 12V and 24V (or ± 12V), 2A Output Converter in 1/8th Brick Footprint
VU1
•
BCX56
1.5mH
2
•
2.2µF
PDZ10B
BAS516
•
33k
22k
BC857BF
1
2
115k
1.2k
LT1952-1
3
4
5
0.1µF
6
7
13.3k
8
COMP
FB = 1.23V
SOUT
VIN
ROSC
OUT
SYNC
PGND
MAXDC
VR = 2.5V
SD
DELAY
OC
ISENSE
BLANK
GND
0.47µF
16
15
100pF
FG
VOUT1
12V
2A
Q5
CG
33µF
16V
0.030R
9
82k
VAUX
10k
1
10k
2
3
CG
4
VOUT1
22k
47k
Q4
680Ω
340k
VIN
150µF
16V
145k
11
10
8
T1
PA1577
1µF
+
BAS516
10k
10
VU1
13
12
CG
BAS516
L1B
SOUT
14
0.1µF
10k
•
Si7462
VOUT2
24V
2A
Q3
0.1µF
FG
4
VFB
Q2
9
1
3
VIN
•
L1A
•
82k
L1: DRQ127-220
7
•
VIN
36V TO 72V
56k
LTC3900
CS+
SYNC
CS–
TIMER
CG
VCC
BCX55
1k
GND
FG
8
7
5
220pF
470pF
6
560R
FG
38.3k
•
SOUT
•
PE-68386
1µF
PDZ7.5B
Q2, Q3, Q4, Q5 = Si7850
PS2801-1
VU1
470R
1
VAUX
2
VFB
3
BAS516
1µF
LT4430
VCC
OPTO
GND
COMP
OC
FB
6
5 3.92k
4
15nF
100k
5.23k
33pF
The LTC3900 can drive multiple synchronous output
rectifiers. The 12V and 24V or ±12V output converter
has good cross regulation due to low voltage drops in
VOUT1
3900 TA02
the output MOSFETs. Other combinations like 3.3V and
–5V or 1.5V and 5V can be easily achieved by changing
the transformer turns ratio.
3900fb
13
LTC3900
typical applications
18V to 40V Input to 14V at 14A Output Converter in 1/4 Brick Footprint
PZTA42
VIN
18V TO 40V
VU1
22k
1.5mH
6.8µF
×4
1
PDZ10B
BAS516
VIN
40R2-4421.003
1
2
220pF
3
BAS516
4
5
255R
BL
OUT
DRVCC
RBL
SGND
VIN
FB
IN PGND EN
10
332k
9
•
FG
8
VU1
7
255R
6
33k
1
2.2µF
57.6k
115k
3
4
0.47µF 5
0.1µF
6
7
13.3k
8
22k
165k
150µF
PXE
FB = 1.23V
SOUT
VIN
ROSC
OUT
SYNC
PGND
MAXDC
VR = 2.5V
DELAY
OC
SD
ISENSE
GND
BLANK
158k
16
0.22µF
1
10k
2
3
4
VAUX
LTC3900
CS+
SYNC
CS–
TIMER
CG
GND
VCC
FG
47k
8
7
5
220pF
470pF
6
FG
•
560R
GATE
•
1µF
PE-68386
VU1
PDZ7.5B
14
4.7µF
BAS516
13
158k
220R
PS2801-1
11
10
10k
CG
BCX55
1k
15
12
VAUX
82k
10k
SOUT
COMP
BAS521
0.004R
BAS516
LT1952-1
2
BC857BF
680µH
Si3459
GATE
22k
33µF
CG
HAT2266
×2
0.1µF
0.1µF
VR
VFB
HAT2266
4, 5
VOUT1
14V
14A
11
LTC4441
PGND
+
6
7
PA1494.362
2, 3
• •
270R
VAUX
2K
VFB
9
1µF
82k
1.2k
1
2
3
2.2nF
1µF
15nF
LT4430
VCC
OPTO
GND
COMP
OC
FB
6
5
4
1.96k
82.5k
VOUT1
3.65k
33pF
VIN
3900 TA03a
VR
By Using Active Reset and 60V MOSFETs Converter is Achieving 94% to 95%
Efficiency with Only Four MOSFETs.
96
94
EFFICIENCY (%)
92
90
88
86
84
82
VIN = 24V
VOUT = 14V
0
2
4
8
6
IOUT (A)
10
12
14
3900 TA03b
3900fb
14
LTC3900
typical applications
36V to 72V Input to 12V, 14A Output Converter in 1/8th Brick Footprint
VU1
PZTA42
T1
PA0423
1• • 7
L2
1.5mH
PDZ10B
BAS516
82k
VIN
36V TO 72V
10
6
2.2µF
2
L1
3µH
47k
HAT2244
•
560R
5
5
370k
7
133k
3
82k
9
5
22k
0.1µF
12.4k
SD/VSEC
ROSC
BLANK
SS
OUT
OC
ISENSE
VIN
GND
6
20k
1
47nF
2
97.6k
6
VR
PGND
COMP
DELAY
FB
SOUT
14
470pF 7
1nF
11
15
8
3
+ 1
SYNC
CS
GND
CS–
TIMER
VCC
2
10k
4
1µF
BCX55
4.7µF
13
12
•
0.010
VU1
CG
38.3k
PE-68386
2k
10
•
158k
Si7430
LT1952-1
13.3k
1µF
8
LTC3900
FB
33µF
10k
VOUT
12V
14A
PDZ7.5
1k
3900 TA04a
75k
220pF
16
VU1
L1: PULSE PA1393.302
L2: COILCRAFT DO1607B-155
ALL CERAMIC CAPS ARE X5R OR X7R
The Efficiency of 12V Output Converter is Over 95% at 8A Output.
96
94
EFFICIENCY (%)
92
90
88
86
84
82
VIN = 48V
VOUT = 12V
0
2
4
6
8
10
12
14
IOUT (A)
3900 TA04b
3900fb
15
LTC3900
typical applications
18V to 72V Input to 12V at 13A Active Reset Converter Fits in 1/8th Brick Size
PZTA42
VIN
18V TO 72V
33k
VU1
VR2
2.2µF
×3
40R2-4444.004
1• • 7
1.5mH
10V
BAS516
2
VIN
1, 6
3
2, 4
5
HAT2173
×2
LTC4440
220pF
33k
2
BC857
174k
3
4
1µF
0.1µF
39.2K
5
6
7
13.3k
8
189k
VR2
332k
CG
0.22µF
COMP
FB = 1.23V
ROSC
VIN
OUT
SYNC
PGND
MAXDC
DELAY
VR = 2.5V
SD
OC
ISENSE
GND
BLANK
BAS521
680µH
Si2325
BCX55
15
7.5V
10k
BAS516
16
14
0.1µF
237Ω
GATE
SOUT
VU1
1
10k
2
1µF
4.7µF
CG
12 137k
PS2801-1
1k
22k
3
4
LTC3900
CS+
SYNC
CS–
TIMER
CG
GND
VCC
FG
220pF
8
GATE
7
560R
•
6
5
•
PE-68386
FG
470pF
11
9
22k
10k
13
10
330µF
33µF
1k
LT1952-1
1
FG
0.006Ω
VFB
HAT2173
×2
33nF
57Ω
22k
•
5
VU1
BAS516
+
HAT2169
10
6
VOUT
12V
13A
PA2050.103
470R
LT4430
1
2
VFB
3
BAS516
1.2k
VB
VCC
OPTO
GND
COMP
OC
FB
6
5 7.87k
4
47k
10nF
348k
VOUT
1µF
18.2k
2.2nF
10pF
3900 TA05a
The High Efficiency of Converter is Achieved by Precise MOSFET Timing Provided
by LT1952 and LTC3900 Controllers.
96
94
EFFICIENCY (%)
92
90
88
86
84
82
80
24VIN
48VIN
0
2
4
8
6
IOUT (A)
10
12
14
3900 TA05b
3900fb
16
LTC3900
typical applications
Synchronous Forward Converter With Pulse Skip Mode
PZTA42
VIN
36V TO 72V
VU1
82k
2.2µF
1
PDZ10B
BAS516
PA1671
7
HA2165
•
FG
10nF
T1
PA0369
1.5nF
100µF
2.2R
10k
B0540W
R_DCM
33k
22k
BC857
2
115k
3
4
0.47µF
0.1µF
5
6
7
13.3k
0.22µF
LT1952-1
1
8
22.1k
COMP
FB = 1.23V
SOUT
VIN
ROSC
OUT
SYNC
PGND
MAXDC
DELAY
VR = 2.5V
SD
OC
ISENSE
BLANK
GND
158k
B0540W
16
15
10k
2
3
CG
4
CS+
SYNC
CS–
TIMER
CG
GND
VCC
1µF
FG
38.3k
8
7
5
220pF
470pF
6
FG
560R
LTC3900
SOUT
•
PE-68386
1µF
13
PDZ7.5B
133k
PS2801-1
11
10
1
BCX55
1k
14
12
10k
VU1
SOUT
VAUX
*
3.3M
0.02µF
0.015R
VFB
470µF
CG
5
Si7430
VOUT
3.3V
30A
+
10
6
2
VIN
• •
•
1.5mH
910Ω
270R
1
2
VFB
9
82k
3
BAS516
1.2k
1µF
LT4430
VCC
OPTO
GND
COMP
OC
FB
6
5 1.96k
4
15nF
82.5k
18.2k
442k
47pF
VOUT
3900 TA06a
VIN
*CONVERTERS THAT USE THE LTC3900 CAN BE FORCED TO OPERATE IN DISCONTINUOUS CURRENT MODE
AT LIGHT LOADS BY OFFSETTING THE CURRENT SENSE INPUT WITH R_DCM RESISTOR.
The Discontinuous Current Mode (DCM) Operation of Circuit is About 10% More Efficient
with 1A-2A Loads. The No Load Input Current is 15mA in DCM Versus 90mA in CCM.
95
EFFICIENCY (%)
85
75
65
VIN = 48V
VOUT = 3.3V
55
CONTINUOUS
CURRENT MODE
DISCONTINUOUS
CURRENT MODE
45
35
0
5
10
20
15
IOUT (A)
25
30
3900 TA06b
3900fb
17
LTC3900
Package Description
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.050 BSC
.189 – .197
(4.801 – 5.004)
NOTE 3
.045 ±.005
8
.245
MIN
7
6
5
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
RECOMMENDED SOLDER PAD LAYOUT
1
.010 – .020
× 45°
(0.254 – 0.508)
NOTE:
1. DIMENSIONS IN
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS
SHALL NOT EXCEED .006" (0.15mm)
.008 – .010
(0.203 – 0.254)
.053 – .069
(1.346 – 1.752)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
.014 – .019
(0.355 – 0.483)
TYP
2
3
4
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
SO8 0303
3900fb
18
LTC3900
Revision History
(Revision history begins at Rev B)
REV
DATE
DESCRIPTION
B
5/11
Added H- and MP-grade parts. Reflected throughout the data sheet.
PAGE NUMBER
1 to 20
3900fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC3900
Typical Application
36V to 72V Input to 12V at 20A “No Optocoupler” Synchronous “Bus Converter”
47k
VIN
36V TO 72V
VU1
L1
2.4µH
PA0815.002
• •
82k
BCX55
BAS516
0.1µF
18V
Si7370
×2
12V
2.2µF, 100V
×2
7
115k
3
27k
0.47µF
0.1µF
9
5
59k
10k
6
1
2
SD_VSEC
OUT
ROSC
VIN
BLANK
GND
SS_MAXDC
LT1952
PGND
DELAY
VR = 2.5V
COMP
FB = 1.23V
OC
ISENSE
SOUT
5
14
6
VU1
1µF
4
15
BAT
760
8
13
39k
12
8V
BIAS
1µF
9mΩ
470Ω
10
8
FG
3
+ 1
10k
2
10k
CS
VCC
CS–
SYNC TIMER
7
RT
15k
CT
1nF
8V
BIAS
560Ω
220pF
16
CG
GND
1nF
11
• •
13.2k
10k
COUT
33µF, 16V
X5R, TDK
×3
LTC3900
•
PH21NQ15
×2
370k
PH4840
×2
VOUT
12V, ±10%,
20A MAX
L1: PULSE PA1494.242
ALL CAPACITORS ARE TDK, X5R CERAMIC
Q4470-B
3900 TA07a
LTC3900-Based Synchronous “Bus Converter” Efficiency vs Load Current
16
96.0
EFFICIENCY
95.0
12
94.5
8
94.0
POWER LOSS (W)
EFFICIENCY (%)
95.5
POWER LOSS
93.5
93.0
VIN = 48V
VOUT = 12V
4
6
8
10 12 14 16
LOAD CURRENT (A)
18
20
4
3900 TA07b
Related Parts
PART NUMBER
DESCRIPTION
COMMENTS
LT1952/LT1952-1
Synchronous Forward Converter Controllers
Ideal for Medium Power 24V or 48V Input Isolated Applications
LTC3901
Secondary Side Synchronous Driver for Push-Pull and Full
Bridge Converters
Similar to the LTC3900, Used in Full Bridge and Push-Pull
Converters
LT4430
Secondary Side Optocoupler Driver
Optocoupler Driver with Precise Reference Voltage
LT1431
Programmable Reference
Adjustable Shunt Voltage Regulator with 100mA Sink Capability
LTC3726/LTC3725 Synchronous No Opto Forward Converter Controller Chip Set
Ideal for Medium Power 24V or 48V Input Isolated Applications
LTC3723-1/
LTC3723-2
Synchronous Push-Pull Controllers
High Efficiency with On-Chip MOSFET Drivers
LTC3721-1/
LTC3721-2
Nonsynchronous Push-Pull Controllers
Minimizes External Components, On-Chip MOSFET Drivers
LTC3722/
LTC3722-2
Synchronous Phase Modulated Full Bridge Controllers
Ideal for High Power 24V or 48V Input Applications
3900fb
20 Linear Technology Corporation
LT 0511 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2003