ON MC100EL35DTG 5 v ecl jk flipâ flop Datasheet

MC10EL35, MC100EL35
5 V ECL JK Flip‐Flop
Description
The MC10EL/100EL35 is a high speed JK flip-flop. The J/K data
enters the master portion of the flip-flop when the clock is LOW and is
transferred to the slave, and thus the outputs, upon a positive transition
of the clock. The reset pin is asynchronous and is activated with a logic
HIGH.
The 100 Series contains temperature compensation.
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8
8
• 525 ps Propagation Delay
• 2.2G Hz Toggle Frequency
• ESD Protection:
SOIC−8 NB
D SUFFIX
CASE 751−05
> 1 kV Human Body Model
> 100 V Machine Model
PECL Mode Operating Range: VCC = 4.2 V to 5.7 with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V with
VEE = −4.2 V to −5.7 V
Internal Input Pulldown Resistors on J, K, CLK, and R
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity:
♦ Level 1 for SOIC−8 NB
♦ Level 3 for TSSOP−8
♦ For Additional Information, see Application Note AND8003/D
Flammability Rating: UL−94 V−0 @ 0.125 in,
Oxygen Index 28 to 34
Transistor Count = 81 Devices
♦
•
•
•
•
•
•
1
1
Features
MARKING DIAGRAMS*
♦
•
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant
TSSOP−8
DT SUFFIX
CASE 948R−02
8
8
HEL35
ALYW
G
1
1
8
HL35
ALYWG
G
8
KEL35
ALYW
G
1
1
SOIC−8
KL35
ALYWG
G
TSSOP−8
H = MC10
K = MC100
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb-Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 8
1
Package
Shipping
MC10EL35DG
SOIC−8 NB
(Pb-Free)
98 Units / Tube
MC10EL35DTG
TSSOP−8
(Pb-Free)
100 Unit / Tube
MC100EL35DG
SOIC−8 NB
(Pb-Free)
98 Units / tube
MC100EL35DTG
TSSOP−8
(Pb-Free)
100 Units / Tube
Publication Order Number:
MC10EL35/D
MC10EL35, MC100EL35
Table 1. PIN DESCRIPTION
J
K
CLK
1
2
8
J
7
K
3
6
VCC
PIN
Q
Q
R
R
4
5
FUNCTION
J
ECL Input
K
ECL Input
R
ECL Reset
CLK
ECL Clock Input
Q, Q
ECL Data Outputs
VCC
Positive Supply
VEE
Negative Supply
VEE
Table 1. TRUTH TABLE
Figure 1. Logic Diagram and Pinout Assignment
J*
K*
R*
CLK
Qn+1
L
L
H
H
X
L
H
L
H
X
L
L
L
L
H
Z
Z
Z
Z
X
Qn
L
H
Qn
L
Table 2. MAXIMUM RATINGS
Symbol
Rating
Unit
VCC
PECL Mode Power Supply
Parameter
VEE = 0 V
Condition 1
Condition 2
8
V
VEE
NECL Mode Power Supply
VCC = 0 V
−8
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
6
−6
V
Iout
Output Current
Continuous
Surge
50
100
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction-to-Ambient)
0 lfpm
500 lfpm
SOIC−8 NB
SOIC−8 NB
190
130
°C/W
qJC
Thermal Resistance (Junction-to-Case)
Standard Board
SOIC−8 NB
41 to 44
°C/W
qJA
Thermal Resistance (Junction-to-Ambient)
0 lfpm
500 lfpm
TSSOP−8
TSSOP−8
185
140
°C/W
qJC
Thermal Resistance (Junction-to-Case)
Standard Board
TSSOP−8
41 to 44 ±5%
°C/W
Tsol
Wave Solder (Pb-Free)
< 2 to 3 sec @ 260°C
265
°C
VI ≤ VCC
VI ≥ VEE
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
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MC10EL35, MC100EL35
Table 3. 10EL SERIES PECL DC CHARACTERISTICS (VCC = 5.0 V; VEE = 0 V (Note 1))
−40°C
Symbol
Characteristic
Min
25°C
Typ
Max
27
32
Min
85°C
Typ
Max
27
32
Min
Typ
Max
Unit
27
32
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 2)
3920
4010
4110
4020
4105
4190
4090
4185
4280
mV
VOL
Output LOW Voltage (Note 2)
3050
3200
3350
3050
3210
3370
3050
3227
3405
mV
VIH
Input HIGH Voltage
3770
4110
3870
4190
3940
4280
mV
VIL
Input LOW Voltage
3050
3500
3050
3520
3050
3555
mV
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
150
0.5
150
0.5
0.3
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.25 V / −0.5 V.
2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V.
Table 4. 10EL SERIES NECL DC CHARACTERISTICS (VCC = 0 V; VEE = −5.0 V (Note 1))
−40°C
Symbol
Characteristic
Min
25°C
Typ
Max
27
32
Min
85°C
Typ
Max
27
32
Min
Typ
Max
Unit
27
32
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 2)
−1080
−990
−890
−980
−895
−810
−910
−815
−720
mV
VOL
Output LOW Voltage (Note 2)
−1950
−1800
−1650
−1950
−1790
−1630
−1950
−1773
−1595
mV
VIH
Input HIGH Voltage
−1230
−890
−1130
−810
−1060
−720
mV
VIL
Input LOW Voltage
−1950
−1500
−1950
−1480
−1950
−1445
mV
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
150
0.5
150
0.5
0.3
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.25 V / −0.5 V.
2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V.
Table 5. 100EL SERIES PECL DC CHARACTERISTICS (VCC = 5.0 V; VEE = 0 V (Note 1))
−40°C
Symbol
Characteristic
Min
25°C
Typ
Max
27
32
Min
85°C
Typ
Max
27
32
Min
Typ
Max
Unit
32
37
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 2)
3915
3995
4120
3975
4045
4120
3975
4050
4120
mV
VOL
Output LOW Voltage (Note 2)
3170
3305
3445
3190
3295
3380
3190
3295
3380
mV
VIH
Input HIGH Voltage (Single-Ended)
3835
4120
3835
4120
3835
4120
mV
VIL
Input LOW Voltage (Single-Ended)
3190
3525
3190
3525
3190
3525
mV
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
150
0.5
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.8 V / −0.5 V.
2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V.
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MC10EL35, MC100EL35
Table 6. 100EL SERIES NECL DC CHARACTERISTICS (VCC = 0 V; VEE = −5.0 V (Note 1))
−40°C
Symbol
Characteristic
Min
25°C
Typ
Max
27
32
Min
85°C
Typ
Max
27
32
Min
Typ
Max
Unit
32
37
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 2)
−1085
−1005
−880
−1025
−955
−880
−1025
−955
−880
mV
VOL
Output LOW Voltage (Note 2)
−1830
−1695
−1555
−1810
−1705
−1620
−1810
−1705
−1620
mV
VIH
Input HIGH Voltage (Single-Ended)
−1165
−880
−1165
−880
−1165
−880
mV
VIL
Input LOW Voltage (Single-Ended)
−1810
−1475
−1810
−1475
−1810
−1475
mV
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
150
0.5
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.8 V / −0.5 V.
2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V.-
Table 7. AC CHARACTERISTICS (VCC = 5.0 V; VEE = 0 V or VCC = 0 V; VEE = −5.0 V (Note 1))
−40°C
Symbol
Characteristic
Min
Typ
1.4
2.0
25°C
Max
Min
Typ
1.8
2.2
350
275
525
450
85°C
Max
Min
Typ
1.8
2.2
395
350
570
525
Max
Unit
fmax
Maximum Toggle Frequency
tPLH
tPHL
Propagation Delay
to Output
CLK
MR
290
225
515
450
tS
Setup Time
J, K
150
0
150
0
150
0
ps
tH
Hold Time
J, K
250
100
250
100
250
100
ps
tRR
Reset Recovery
400
200
400
200
400
200
ps
tPW
Minimum Pulse Width
CLK, Reset
400
tJITTER
tr
tf
Cycle-to-Cycle Jitter
Output Rise/Fall Times Q (20%−80%)
740
675
400
1.0
100
700
625
225
100
745
700
400
1.0
350
GHz
225
ps
1.0
350
100
ps
225
ps
350
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. 10 Series: VEE can vary +0.25 V / −0.5 V.
100 Series: VEE can vary +0.8 V / −0.5 V.
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MC10EL35, MC100EL35
Q
Zo = 50 W
D
Receiver
Device
Driver
Device
Q
D
Zo = 50 W
50 W
50 W
VTT
VTT = VCC − 3.0 V
Figure 2. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices)
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1672/D
− The ECL Translator Guide
AND8001/D
− Odd Number Counters Design
AND8002/D
− Marking and Date Codes
AND8020/D
− Termination of ECL Logic Devices
AND8066/D
− Interfacing with ECLinPS
AND8090/D
− AC Characteristics of ECL Devices
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5
MC10EL35, MC100EL35
PACKAGE DIMENSIONS
SOIC−8 NB
D SUFFIX
CASE 751−07
ISSUE AK
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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6
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
MC10EL35, MC100EL35
PACKAGE DIMENSIONS
TSSOP−8
DT SUFFIX
CASE 948R−02
ISSUE A
8x
0.15 (0.006) T U
0.10 (0.004)
S
2X
L/2
L
8
5
1
PIN 1
IDENT
0.15 (0.006) T U
K REF
M
T U
V
S
0.25 (0.010)
B
−U−
4
M
A
−V−
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE -W-.
S
F
DETAIL E
C
0.10 (0.004)
−T− SEATING
PLANE
D
−W−
G
DETAIL E
DIM
A
B
C
D
F
G
K
L
M
MILLIMETERS
MIN
MAX
2.90
3.10
2.90
3.10
0.80
1.10
0.05
0.15
0.40
0.70
0.65 BSC
0.25
0.40
4.90 BSC
0_
6_
INCHES
MIN
MAX
0.114
0.122
0.114
0.122
0.031
0.043
0.002
0.006
0.016
0.028
0.026 BSC
0.010
0.016
0.193 BSC
0_
6_
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