Microsemi APT66F60L N-channel fredfet Datasheet

APT66F60B2
APT66F60L
600V, 70A, 0.09Ω Max, trr ≤ 310ns
N-Channel FREDFET
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET.
A proprietary planar stripe design yields excellent reliability and manufacturability. Low
switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure
help control slew rates during switching, resulting in low EMI and reliable paralleling,
even when switching at very high frequency. Reliability in flyback, boost, forward, and
other circuits is enhanced by the high avalanche energy capability.
T-MaxTM
TO-264
APT66F60B2
APT66F60L
D
Single die FREDFET
G
S
FEATURES
TYPICAL APPLICATIONS
• Fast switching with low EMI
• ZVS phase shifted and other full bridge
• Low trr for high reliability
• Half bridge
• Ultra low Crss for improved noise immunity
• PFC and other boost converter
• Low gate charge
• Buck converter
• Avalanche energy rated
• Single and two switch forward
• RoHS compliant
• Flyback
Absolute Maximum Ratings
Symbol
ID
Parameter
Unit
Ratings
Continuous Drain Current @ TC = 25°C
70
Continuous Drain Current @ TC = 100°C
44
A
IDM
Pulsed Drain Current
VGS
Gate-Source Voltage
±30
V
EAS
Single Pulse Avalanche Energy 2
1845
mJ
IAR
Avalanche Current, Repetitive or Non-Repetitive
33
A
1
245
Thermal and Mechanical Characteristics
Min
Characteristic
Typ
Max
Unit
W
PD
Total Power Dissipation @ TC = 25°C
1135
RθJC
Junction to Case Thermal Resistance
0.11
RθCS
Case to Sink Thermal Resistance, Flat, Greased Surface
Operating and Storage Junction Temperature Range
150
°C
TL
Soldering Temperature for 10 Seconds (1.6mm from case)
WT
Package Weight
Torque
-55
300
0.22
oz
6.2
g
10
in·lbf
1.1
N·m
Mounting Torque ( TO-264 Package), 4-40 or M3 screw
MicrosemiWebsite-http://www.microsemi.com
Rev B 04-2009
TJ,TSTG
°C/W
0.11
050-8173
Symbol
Static Characteristics
TJ = 25°C unless otherwise specified
Symbol
Parameter
VBR(DSS)
Drain-Source Breakdown Voltage
ΔVBR(DSS)/ΔTJ
Breakdown Voltage Temperature Coefficient
RDS(on)
Drain-Source On Resistance
VGS(th)
Gate-Source Threshold Voltage
ΔVGS(th)/ΔTJ
Min
600
VGS = 10V, ID = 33A
3
Zero Gate Voltage Drain Current
IGSS
Gate-Source Leakage Current
Dynamic Characteristics
VDS = 600V
TJ = 25°C
VGS = 0V
TJ = 125°C
Forward Transconductance
Ciss
Input Capacitance
Crss
Reverse Transfer Capacitance
Coss
Output Capacitance
Typ
Max
0.57
0.075
4
-10
0.09
5
250
1000
±100
VGS = ±30V
Unit
V
V/°C
Ω
V
mV/°C
µA
nA
TJ = 25°C unless otherwise specified
Parameter
gfs
2.5
VGS = VDS, ID = 2.5mA
Threshold Voltage Temperature Coefficient
IDSS
Symbol
Test Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 250µA
APT66F60B2_L
Min
Test Conditions
VDS = 50V, ID = 33A
4
Effective Output Capacitance, Charge Related
Co(er)
5
Effective Output Capacitance, Energy Related
Max
65
13190
135
1210
VGS = 0V, VDS = 25V
f = 1MHz
Co(cr)
Typ
Unit
S
pF
645
VGS = 0V, VDS = 0V to 400V
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
td(on)
Turn-On Delay Time
tr
td(off)
tf
Current Rise Time
Turn-Off Delay Time
335
330
70
140
75
85
225
70
VGS = 0 to 10V, ID = 33A,
VDS = 300V
Resistive Switching
VDD = 400V, ID = 33A
RG = 2.2Ω 6 , VGG = 15V
Current Fall Time
nC
ns
Source-Drain Diode Characteristics
Symbol
IS
ISM
VSD
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 1
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
Irrm
Reverse Recovery Current
dv/dt
Peak Recovery dv/dt
Test Conditions
Min
Typ
D
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
A
S
246
TJ = 25°C
TJ = 125°C
VDD = 100V
TJ = 25°C
TJ = 125°C
diSD/dt = 100A/µs
Unit
70
G
ISD = 33A, TJ = 25°C, VGS = 0V
ISD = 33A 3
Max
TJ = 25°C
TJ = 125°C
ISD ≤ 33A, di/dt ≤1000A/µs, VDD = 400V,
TJ = 125°C
268
474
1.6
4.2
11.4
16.9
1.0
310
570
V
ns
µC
A
20
V/ns
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
050-8173
Rev B
04-2009
2 Starting at TJ = 25°C, L = 3.39mH, RG =25Ω, IAS = 33A.
3 Pulse test: Pulse Width < 380µs, duty cycle < 2%.
4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS.
5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of
VDS less than V(BR)DSS, use this equation: Co(er) = -1.28E-7/VDS^2 + 5.36E-8/VDS + 2.00E-10.
6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
APT66F60B2_L
120
250
V
GS
= 10V
T = 125°C
J
TJ = -55°C
V
ID, DRIAN CURRENT (A)
150
TJ = 25°C
100
50
80
6V
60
40
5.5V
20
TJ = 150°C
TJ = 125°C
0
0
5
10
15
20
25
30
VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V)
5V
4.5V
0
5
10
15
20
25
30
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 2, Output Characteristics
250
NORMALIZED TO
VDS> ID(ON) x RDS(ON) MAX.
250µSEC. PULSE TEST
@ <0.5 % DUTY CYCLE
VGS = 10V @ 33A
2.5
200
ID, DRAIN CURRENT (A)
2.0
1.5
1.0
0.5
150
TJ = 25°C
100
TJ = 125°C
50
0
0
-55 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Figure 3, RDS(ON) vs Junction Temperature
TJ = -55°C
0
1
2
3
4
5
6
7
8
VGS, GATE-TO-SOURCE VOLTAGE (V)
Figure 4, Transfer Characteristics
20,000
120
10,000
C, CAPACITANCE (pF)
TJ = 25°C
80
TJ = 125°C
60
40
1000
Coss
100
Crss
20
0
0
16
VGS, GATE-TO-SOURCE VOLTAGE (V)
Ciss
TJ = -55°C
10
20 30 40 50 60 70
ID, DRAIN CURRENT (A)
Figure 5, Gain vs Drain Current
100
200
300
400
500
600
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 6, Capacitance vs Drain-to-Source Voltage
12
VDS = 120V
10
VDS = 300V
8
6
VDS = 480V
4
2
0
0
250
ID = 33A
14
0
10
80
100
200
300
400
500
Qg, TOTAL GATE CHARGE (nC)
Figure 7, Gate Charge vs Gate-to-Source Voltage
ISD, REVERSE DRAIN CURRENT (A)
gfs, TRANSCONDUCTANCE
100
200
150
TJ = 25°C
100
TJ = 150°C
50
0
0
0.3
0.6
0.9
1.2
1.5
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
Rev B 04-2009
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
Figure 1, Output Characteristics
3.0
= 7&8V
050-8173
ID, DRAIN CURRENT (A)
200
0
GS
100
APT66F60B2_L
300
300
100
IDM
10
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
100
13µs
100µs
Rds(on)
1ms
10ms
1
IDM
13µs
10
100µs
Rds(on)
0.1
1
10ms
TJ = 150°C
TC = 25°C
1
Scaling for Different Case & Junction 100ms
Temperatures:
DC line
ID = ID(T = 25°C)*(TJ - TC)/125
100ms
TJ = 125°C
TC = 75°C
1ms
DC line
0.1
10
100
800
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 9, Forward Safe Operating Area
C
1
10
100
800
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 10, Maximum Forward Safe Operating Area
0.10
D = 0.9
0.08
0.7
0.06
0.5
Note:
PDM
ZθJC, THERMAL IMPEDANCE (°C/W)
0.12
0.04
t1
0.3
t2
t1 = Pulse Duration
SINGLE PULSE
0.02
t
Duty Factor D = 1/t2
Peak TJ = PDM x ZθJC + TC
0.1
0.05
0
10
-5
10-4
10-3
10-2
10-1
RECTANGULAR PULSE DURATION (seconds)
Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
TO-264 (L) Package Outline
T-MAX™ (B2) Package Outline
e3 100% Sn Plated
4.69 (.185)
5.31 (.209)
1.49 (.059)
2.49 (.098)
4.60 (.181)
5.21 (.205)
1.80 (.071)
2.01 (.079)
15.49 (.610)
16.26 (.640)
19.51 (.768)
20.50 (.807)
3.10 (.122)
3.48 (.137)
5.38 (.212)
6.20 (.244)
5.79 (.228)
6.20 (.244)
Drain
Drain
20.80 (.819)
21.46 (.845)
4.50 (.177) Max.
0.40 (.016)
0.79 (.031)
25.48 (1.003)
26.49 (1.043)
2.87 (.113)
3.12 (.123)
2.29 (.090)
2.69 (.106)
1.65 (.065)
2.13 (.084)
19.81 (.780)
20.32 (.800)
1.01 (.040)
1.40 (.055)
19.81 (.780)
21.39 (.842)
Gate
Drain
04-2009
Source
2.21 (.087)
2.59 (.102)
5.45 (.215) BSC
2-Plcs.
These dimensions are equal to the TO-247 without the mounting hole.
0.76 (.030)
1.30 (.051)
2.79 (.110)
3.18 (.125)
5.45 (.215) BSC
2-Plcs.
Dimensions in Millimeters and (Inches)
050-8173
Rev B
Dimensions in Millimeters and (Inches)
0.48 (.019)
0.84 (.033)
2.59 (.102)
3.00 (.118)
Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786
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2.29 (.090)
2.69 (.106)
Gate
Drain
Source
1.0
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