Micro Linear ML6672 Atm utp transceiver Datasheet

December 1998
ML6672*
ATM UTP Transceiver
GENERAL DESCRIPTION
The ML6672 is a complete monolithic transceiver for
155Mbps NRZ encoded data transmission over Category 5
Unshielded Twisted Pair and Shielded Twisted Pair cables.
The ML6672 is compliant with the ATM Forum 155Mbps
Twisted Pair Specification. The adaptive equalizer in the
ML6672 will accurately compensate for line losses of up
to 100m of UTP. The part requires only external 1%
resistors for accurate equalization.
used as an AC ground for the transformer center-tap or
termination resistors. A link status circuit monitors line
integrity and provides a proper logic level output signal to
interface with the host system.
The ML6672 receive section consists of an equalizing filter
with a feedback loop for controlling effective line
compensation. The feedback loop contains a filter and
detection block for determining the proper control signal.
An ECL 100K compatible buffer at the output interfaces
directly with ATM physical interface chips.
FEATURES
The ML6672 is implemented in a BiCMOS process. A
differential signal path throughout minimizes the effects of
power supply transients and noise.
■
■
The ML6672 transmit section accepts ECL 100K
compatible NRZ inputs.
■
■
Several additional functions are provided by the ML6672
to simplify applications. A common-mode reference is
provided to set the input DC level for the equalizer and
the near-end transformer winding. This terminal may be
■
Complies with ATM Forum 155Mbps Twisted Pair
Specification
Transmitter can be externally turned off for
true quiet line
Receiver includes adaptive equalizer
Operates over 100 meters of STP or category 5 UTP
Twisted Pair Cable
Semi-standard options available
* This Part Is End Of Life As Of August 1, 2000
BLOCK DIAGRAM
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LPBK
TXOFF
TVCCA
RTSET
TVCCD
RTSET1
RTSET2
TXIN+
TPOUT+
TXIN–
TPOUT–
SD+
LINK
STATUS
SD–
CAP1
ADAPTIVE
CONTROL
CAP2
RXOUT+
MUX
TPIN+
ADAPTIVE
EQUALIZER
RXOUT–
TPIN–
ADAPTIVE
CONTROL REFERENCE
RSET1
RSET2
TGNDA TGNDD
RTH1
RRSET1
GND
RTH2
RRSET2
RRSET
RVCCA RVCCD CMREF
1
ML6672
PIN CONFIGURATION
ML6672
32-Pin TQFP (H32-7)
RGND
RTH1
RTH2
TVCCA
TGNDA
32 31 30
RSET2
CMREF
1
RSET1
CAP2
2
RRSET2
CAP1
3
TPIN–
RVCCA
4
TPIN+
RXOUT–
ML6672
32-Pin PLCC (Q32)
32
31
30
29
28
27
26
25
RXOUT+ 5
29 RRSET1
RRSET1 1
24 TPOUT–
RVCCD 6
28 RRSET2
TPIN– 2
23 TPOUT+
SD– 7
27 RSET1
TPIN+ 3
22 RTSET2
SD+ 8
26 RSET2
CMREF 4
21 RTSET1
N/C 9
25 RGND
CAP2 5
20 TVCCD
TGNDD 10
24 RTH1
CAP1 6
19 TXIN–
LPBK 11
23 RTH2
RVCCA 7
18 TXIN+
RXOUT– 8
11
12
13
14
15
16
TGNDD
LPBK
TXOFF
RXOUT+
TPOUT–
RTSET2
TPOUT+
RTSET1
TVCCD
TXIN–
TXIN+
10
N/C
9
14 15 16 17 18 19 20
SD+
N/C 13
17 N/C
SD–
21 TGNDA
RVCCD
22 TVCCA
TXOFF 12
PIN DESCRIPTION
NAME
FUNCTION
NAME
FUNCTION
TXIN+, TXIN–
These differential ECL100K compatible
inputs receive NRZ data from the PHY for
transmission.
Outputs from the NRZ buffer drive these
differential current outputs. The
transmitter filter/transformer module
connects the media to these pins.
This TTL input enables transmitterReceiver loopback internally when
asserted low.
This TTL input forces the NRZ buffer to a quiet
state when asserted low.
An external 1% resistor connected
between these pins controls the
transmitter output current amplitude.
IOUT = 64 x 1.25V/RTSET
Separate analog and digital
transmitter power supply pins help to
isolate sensitive circuitry from noise
generating digital functions. Both supplies
are nominally +5 volts.
Analog and digital transmitter grounds
provide separate return paths for clean
and noisy signals.
These differential ECL100K compatible
outputs indicate the presence of a data
signal with an amplitude exceeding a
preset threshold.
NRZ encoded data from the receiver filter/
transformer module enters the Receiver
through these pins.
RXOUT+,
RXOUT–
CAP1, CAP2
Differential ECL100K compatible outputs
provide NRZ encoded data to the PHY.
Two external capacitors connected to
these pins sets the time constant for the
adaptation in the equalizer loop as well
as for signal detect response.
Internal time constants controlling the
equalizer’s transfer function are set by an
external resistor connected across these
pins.
This pin provides a DC common mode
reference point for the receiver inputs.
Analog and digital supply pins are
separated to isolate clean and noisy
circuit functions. Both supplies are
nominally +5 volts.
Receiver ground.
An external 5kW resistor across these pins
sets up an internal reference current.
An external resistor connected across
these pins sets the internal levels for
equalization as well as signal detect. This
resistor allows compensation for transmit
and magnetics variations. RTH should be
set to match the peak-to-peak transmit
amplitude. VAMP = 16 x 1.25 x RTH/RSET
where VAMP is the peak-to-peak
amplitude of the transmit output with
zero length cable.
TPOUT+,
TPOUT–
LPBK
TXOFF
RTSET1,
RTSET2
TVCCA,
TVCCD
TGNDA,
TGNDD
SD+, SD–
TPIN+, TPIN–
2
RRSET1,
RRSET2
CMREF
RVCCA,
RVCCD
RGND
RSET1, RSET2
RTH1, RTH2
ML6672
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
VCC Supply Voltage Range .................. GND –0.3V to 6V
Input Voltage Range
Digital Inputs ........................ GND –0.3V to VCC + 0.3
Output Current
TPOUT+/TPOUT–, SD±, RXOUT± ..................... 50mA
All other outputs ................................................. 10mA
Junction Temperature ............................................. 150°C
Storage Temperature .............................. –65°C to +150°C
Lead Temperature (Soldering, 10 sec) ..................... 260°C
Thermal Resistance (qJA)
PLCC ............................................................... 60°C/W
TQFP ................................................................ 80°CW
OPERATING CONDITIONS
VCC Supply Voltage .......................................... 5V ± 5%
TA, Ambient Temperature .............................0°C to +70°C
RTSET ............................................................. 4KW ± 1%
RRSET ........................................................ 9.53KW ± 1%
RSET ............................................................... 5KW ± 1%
RTH .............................................................. 250W ± 1%
CAP1, CAP2 .................................................. 1.0µF + 5%
Receive transformer insertion loss ...................... < –0.5dB
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, TA = TMIN to TMAX, VCC = 5V ±5%, RTSET = 4.0Ký, RTH = 250ý.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
DC Characteristics
Supply Current
RVCCD
67
mA
RVCCA
52
mA
TVCCD
25
mA
TVCCA
6
mA
RVCCD + RVCCA + TVCCD + TVCCA
170
mA
0.8
V
TTL Inputs (TXOFF, LPBK)
VIL Input Low Voltage
VIH Input High Voltage
2.0
V
Differential Inputs (TPIN±, TXIN±)
TPIN+, TPIN–
Common Mode Input Voltage
2.2
TPIN+, TPIN–
Differential Input Voltage
TPIN+, TPIN–
Differential Input Resistance
VCC
V
1.5
V
kW
10
TPIN+, TPIN–
Common Mode Input Current
+10
uA
TXIN+, TXIN–
Input Voltage HIGH (VIH)
VCC–1.165
VCC–0.88
V
TXIN+, TXIN–
Input Voltage LOW (VIL)
VCC–1.810
VCC–1.475
V
TXIN+, TXIN–
Input Current LOW (IIL)
0.5
TXIN+, TXIN–
Input Current HIGH (IIH)
uA
50
uA
Differential Outputs (SD±, RXOUT±, TPOUT±)
SD+, SD–, RXOUT+, RXOUT–
Output Voltage HIGH (VOH)
Note 5
VCC–1.025
VCC–0.88
V
SD+, SD–, RXOUT+, RXOUT–
Output Voltage LOW (VOL)
Note 5
VCC–1.81
VCC–1.62
V
3
ML6672
ELECTRICAL CHARACTERISTICS (Continued)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Differential Outputs (SD±, RXOUT±, TPOUT±) (Continued)
TPOUT+, TPOUT–
Differential Output Current HIGH
VOUT = VCC ± 0.5, Note 4
19.0
21.0
mA
TPOUT+, TPOUT–
DifferentialOutput Current LOW
VOUT = VCC ± 0.5, Note 4
0
0.1
mA
TPOUT+, TPOUT–
Output Current Offset
Note 3
0.5
mA
TPOUT+, TPOUT–VOUT = VCC
Output Amplitude Error
Note 3, 4
–5.0
5.0
%
–2.0
+2.0
%
2.5
ns
TPOUT+, TPOUT–VOUT = VCC ±1.1V
Output Voltage Compliance
AC Characteristics
TPOUT+, TPOUT–
Rise/Fall Time
Note 2
TPOUT+, TPOUT–
Output Jitter
Note 2
RXOUT+, RXOUT–
Rise/Fall Time
Note 2
RXOUT+, RXOUT–
Output Jitter
Note 2
Note 1.
Note 2.
Note 3.
Note 4.
Note 5.
4
1.5
2.0
0.5
ns
5
2.0
ns
ns
Absolute maximum ratings are limits beyond which the life of the integrated circuit may be impaired. All voltages unless otherwise specified are measured with
respect to ground.
Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
Low Duty cycle pulse testing is performed at TA.
Output current amplitude is determined by IOUT = 64 x 1.25V/RTSET.
Output voltage levels are specified when terminated by 50W to VCC-2V or equivalent load.
ML6672
FUNCTIONAL DESCRIPTION
The ML6672 transceiver is a physical media dependent
transceiver that allows the transmission and reception of
155 Mbps data over shielded twisted pair cable or
category 5 unshielded twisted pair cable.
The transmit section accepts NRZ data, sending the
information on a two pin current driven transmitter. The
transmitted output passes through an external low pass
filter and transformer before entering the connectors to the
STP or UTP cable. The output amplitude of the transmitted
signal is programmable through the external RTSET resistor.
The receive section accepts NRZ coded data after it
passes through an isolation transformer and band limiting
filter. The adaptive equalizer is used to compensate for the
amplitude and phase distortion incurred from the cable. The
adaptive control section determines the cable length and
adjusts the equalizer accordingly. As the input signal
amplitude diminishes, the amount of equalization increases
until it reaches its maximum of an equivalent 100 meters of
category 5 cable. A parallel 10pF capacitor can be connected
between TPIN+ and TPIN– to improve Bit Error Rate.
The adaptive control block governs both the equalization
level as well as the link detection status. The link detection
threshold has a fixed relationship to the overall
equalization level which is currently 25% of the
transmitted amplitude. For the link status to be true, a
minimum level signal must be received. When the input
signal is small, the equalization will be at its maximum.
After the signal has been equalized, it is fed through the
loopback multiplexer onto the RXOUT± pins.
Figure 1 shows a typical gain vs frequency plot of the
adaptive equalizer for 0, 25, 50, 75 and 100 meter
category 5 cable lengths.
TRANSMISSION
PECL level scrambled NRZ data is received by the
ML6672 and the current driven transmitter then sent the
data to the filter/transformer module. The transmit
amplitude is controlled by one external resistor, RTSET.
IOUT =
64 ´ 125
. V
RTSET
For ATM UTP applications the transmit amplitude is 1V
peak to peak. The termination at the transmitter output is
50W. Therefore the transmit current IOUT = 1/50 = 20 mA.
Therefore, RTSET = (64 x 1.25/20)kW = 4kW
The transmitter may be disabled via the TXOFF pin. When
this pin is pulled low, the transmitter’s output goes to its
center value (IOUT/2) with no differential current flowing
through the transformer.
ADAPTIVE EQUALIZATION
During transmission of data over UTP (unshielded twisted
pair), distortion and ISI are caused by dispersion in the
cable. Equalization is used to overcome this signal
corruption. However, the distortion is frequency
dependent and loop length dependent. Therefore, in most
practical cases, the TP port characteristic is unknown and
it is impractical to tune the equalizer specifically to each
individual port. Hence, adaptive equalizer is used in the
TP-PMD to ensue proper compensation of the received
signal.
By using adaptive equalizer, the receiver automatically
compensate different length of cable without over
equalizing or under equalizing the line. The ML6672
monitors the energy of the received signal to determine
the cable length and adjust the equalizer accordingly. The
input signal level is inversely proportional to the cable
length. Therefore, as the signal level decreases, the
amount of equalization is increased to compensate for the
line loss.
RECEIVE CIRCUIT
After the data is received and equalized, it is then sent to
the clock recovery circuit via the RXOUT pins. A resistor
RTH is used to control the internal level of equalization.
VAMP =
16 ´ 125
. ´ RTH
RSET
VAMP is the transmit voltage amplitude and is equal to 1V
and RSET = 5kW. Therefore, RTH = 1 x 5/(16 x 1.25) kW =
250W.
CAP1 and CAP2 are capacitors used to set the time
constant for adaptation of the equalizer loop and should
be 0.33µF.
20
15
10
5
0
1 x 106
1 x 107
1 x 108
1 x 109
Figure 1. Equalization Range
5
ML6672
+5.0V
+5.0V
+5.0V
0.1µF
0.1µF
RVCCD
0.1µF
TVCCD
0.1µF
TVCCA RVCCA
0.33µF
0.33µF
CAP1 CAP2
RTSET1
0.1µF
RTSET2
50
Ω
TPOUT+
TXIN+
FROM PHY
+5.0V
4.0kΩWW 1%
TXIN–
50Ω
NOTE 1
SD+
TO PHY
SD–
TPOUT–
ML6672
TPIN+
50Ω
RXOUT+
TO PHY
CMREF
RXOUT–
50Ω
TPIN–
LPBK TXOFF TGNDD TGNDA RGND RTH1 RTH2 RSET1 RSET2 RRSET1 RRSET2
FROM PHY
250Ω 1%
5kΩ 1%
10pF
+
0.1µF
9.53kΩ 1%
Figure 2. Application Example of ML6672 Configured for 1.0VP-P Transmit Amplitude on C5 UTP.
Note 1.
Note 2.
Note 3.
Note 4.
6
Split 100K ECL terminations are 82W and 130W to VCC and GND respectively.
Recommended power supply bypass capacitors are 0.1µF with optional 10µF tantalum in parallel.
Transformer turns ratio is 1:1.
LPBK and TXOFF inputs are active LOW.
TRANSFORMER/FILTER MODULE
+5.0V
TO MIC
FROM MIC
ML6672
PHYSICAL DIMENSIONS inches (millimeters)
Package: Q32
32-Pin PLCC
0.485 - 0.495
(12.32 - 12.57)
0.098 - 0.112
(2.49 - 2.85)
0.450 - 0.456
(11.43 - 11.58)
1
PIN 1 ID
0.042 - 0.048
(1.07 - 1.22)
9
25
0.490 - 0.530
(12.45 - 13.46)
0.550 - 0.556
0.585 - 0.595
(13.97 - 14.12) (14.86 - 15.11)
17
0.019 - 0.021
(0.48 - 0.51)
0.050 BSC
(1.27 BSC)
0.165 - 0.180
(4.06 - 4.57)
0.026 - 0.032
(0.66 - 0.81)
0.025 - 0.045
(0.63 - 1.14)
(RADIUS)
0.148 - 0.156
(3.76 - 3.96)
0.013 - 0.021
(0.33 - 0.53)
0.390 - 0.430
(9.90 - 10.92)
SEATING PLANE
Package: H32-7
32-Pin (7 x 7 x 1mm) TQFP
0.354 BSC
(9.00 BSC)
0.276 BSC
(7.00 BSC)
0º - 8º
0.003 - 0.008
(0.09 - 0.20)
25
1
PIN 1 ID
0.276 BSC
(7.00 BSC)
0.354 BSC
(9.00 BSC)
0.018 - 0.030
(0.45 - 0.75)
17
9
0.032 BSC
(0.8 BSC)
0.012 - 0.018
(0.29 - 0.45)
0.048 MAX
(1.20 MAX)
SEATING PLANE
0.037 - 0.041
(0.95 - 1.05)
7
ML6672
ORDERING INFORMATION
PART NUMBER
TEMPERATURE RANGE
PACKAGE
ML6672CQ (EOL)
0°C to 70°C
32-Pin Leaded PLCC (Q32)
ML6672CH (EOL)
0°C to 70°C
32-Pin TQFP (H32-7)
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of the contents of this publication and reserves the right to make changes to specifications and product
descriptions at any time without notice. No license, express or implied, by estoppel or otherwise, to any
patents or other intellectual property rights is granted by this document. The circuits contained in this
document are offered as possible applications only. Particular uses or applications may invalidate some of
the specifications and/or product descriptions contained herein. The customer is urged to perform its own
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whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Micro Linear
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© Micro Linear 2000.
is a registered trademark of Micro Linear Corporation. All other trademarks
are the property of their respective owners.
Products described herein may be covered by one or more of the following U.S. patents: 4,897,611;
4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017;
5,559,470; 5,565,761; 5,592,128; 5,594,376; 5,652,479; 5,661,427; 5,663,874; 5,672,959; 5,689,167;
5,714,897; 5,717,798; 5,742,151; 5,747,977; 5,754,012; 5,757,174; 5,767,653; 5,777,514; 5,793,168;
5,798,635; 5,804,950; 5,808,455; 5,811,999; 5,818,207; 5,818,669; 5,825,165; 5,825,223; 5,838,723;
5.844,378; 5,844,941. Japan: 2,598,946; 2,619,299; 2,704,176; 2,821,714. Other patents are pending.
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www.microlinear.com
8
DS6672-01
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