® INA146 INA 146 For most current data sheet and other product information, visit www.burr-brown.com High-Voltage, Programmable Gain DIFFERENCE AMPLIFIER FEATURES DESCRIPTION ● HIGH COMMON-MODE VOLTAGE: +40V at VS = +5V ±100V at VS = ±15V ● DIFFERENTIAL GAIN = 0.1V/V TO 100V/V: Set with External Resistors ● LOW QUIESCENT CURRENT: 570µA ● WIDE SUPPLY RANGE: Single Supply: 4.5V to 36V Dual Supplies: ±2.25V to ±18V ● LOW GAIN ERROR: 0.025% ● HIGH CMR: 80dB ● SO-8 PACKAGE The INA146 is a precision difference amplifier that can be used to accurately attenuate high differential voltages and reject high common-mode voltages for compatibility with common signal processing voltage levels. High-voltage capability also affords inherent input protection. The input common-mode range extends beyond both supply rails, making the INA146 well-suited for both single and dual supply applications. On-chip precision resistors are laser-trimmed to achieve accurate gain and high common-mode rejection. Excellent TCR tracking of these resistors assures continued high precision over temperature. A 10:1 difference amplifier provides 0.1V/V gain when the output amplifier is used as a unity-gain buffer. In this configuration, input voltages up to ±100V can be measured. Gains greater than 0.1V/V can be set with an external resistor pair without affecting the common-mode input range. APPLICATIONS ● ● ● ● CURRENT SHUNT MEASUREMENTS SENSOR AMPLIFIER SYNCHRONOUS DEMODULATOR CURRENT AND DIFFERENTIAL LINE RECEIVER ● VOLTAGE-CONTROLLED CURRENT SOURCE ● BATTERY POWERED SYSTEMS ● LOW COST AUTOMOTIVE V+ INSTRUMENTATION The INA146 is available in the SO-8 surface-mount package specified for the extended industrial temperature range, –40°C to +85°C. RG1 7 VIN– 2 RG2 5 R1 100kΩ R2 10kΩ R5 10kΩ (1%) G = 0.1 A2 6 A1 VO + – VO = (VIN – VIN) 0.1 (1 + RG2/RG1) + VIN 3 R4 10kΩ R3 100kΩ INA146 4 V– 1 8 Ref V01 International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ® ©1999 Burr-Brown Corporation SBOS109 PDS-1491A 1 INA146 Printed in U.S.A. September, 1999 SPECIFICATIONS: VS = ±2.25V to ±18V Dual Supplies At TA = +25°C, G = 0.1, RL = 10kΩ connected to ground and ref pin connected to ground unless otherwise noted. Boldface limits apply over the specified temperature range, TA = –40°C to +85°C. INA146UA PARAMETER CONDITION OFFSET VOLTAGE, VO Input Offset Voltage vs Temperature vs Power Supply vs Time Offset Voltage, V01 INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection Over Temperature MIN TYP MAX UNITS ±1 See Typical Curve ±100 ±3 ±1 ±5 mV ±600 µV/V µV/mo mV ±100(3) 80 74 V dB dB ±50 ±5 nA nA 110 91.7 55 kΩ kΩ kΩ 10 550 µVp-p nV/√Hz RTI(1, 2) VOS ∆VOS /∆T PSRR VS = ±15, VCM = VO = 0V VS = ±1.35V to ±18V RTI(1, 2) VCM CMRR INPUT BIAS CURRENT(2) Bias Current Offset Current (VIN+) – (VIN–) = 0V, VO = 0V VCM = 11 (V–) to 11 (V+) = 11, RS = 0Ω 70 64 VCM = VS /2 IB IOS INPUT IMPEDANCE Differential (non-inverting input) Differential (inverting input) Common-Mode NOISE Voltage Noise, f = 0.1Hz to 10Hz Voltage Noise Density, f = 1kHz RTI(1, 4) en GAIN Gain Equation Initial(1) Gain Error vs Temperature G = 0.1 to 100 G = 0.1 • (1 + RG2 /RG1) 0.1 ±0.025 ±0.1 ±1 ±10 ±0.025 ±0.1 ±1 ±10 ±0.001 ±0.01 RL = 100kΩ, VO = (V–)+0.15 to (V+)–1, G = 1 RL = 100kΩ, VO = (V–)+0.25 to (V+)–1, G = 1 RL = 10kΩ, VO = (V–)+0.3 to (V+)–1.25, G = 1 RL = 10kΩ, VO = (V–)+0.5 to (V+)–1.25, G = 1 VO = (V–)+0.3 to (V+)–1.25, G = 1 vs Temperature Nonlinearity FREQUENCY RESPONSE Small Signal Bandwidth G = 0.1 G=1 Slew Rate Settling Time, 0.1% 0.01% Overload Recovery G = 1, 10V Step G = 1, 10V Step 50% Input Overload OUTPUT, VO Voltage Output Over Temperature RL = 100kΩ, G = 1 RL = 100kΩ, G = 1 RL = 10kΩ, G = 1 RL = 10kΩ, G = 1 Continuous to Common Stable Operation Over Temperature Short-Circuit Current Capacitive Load POWER SUPPLY Specified Voltage Range, Dual Supplies Operating Voltage Range Quiescent Current Over Temperature TEMPERATURE RANGE Specified Range Operating Range Storage Range Thermal Resistance 550 50 0.45 40 80 40 (V–) + 0.15 (V–) + 0.25 (V–) + 0.3 (V–) + 0.5 VIN = 0, IO = 0 ±570 –40 –55 –55 θJA kHz kHz V/µs µs µs µs (V+) – 1 (V+) – 1 (V+) – 1.25 (V+) – 1.25 V V V V mA pF ±18 ±18 ±700 ±750 V V µA µA +85 +125 +125 °C °C °C °C/W ±15 1000 ±2.25 ±1.35 150 V/V V/V % ppm / °C % ppm / °C % of FS NOTES: (1) Overall difference amplifier configuration. Referred to input pins (VIN+ and VIN–), gain = 0.1V/V. Specified with 10kΩ in feedback of A2. (2) Input offset voltage specification includes effects of amplifier’s input bias and offset currents. (3) Common-mode voltage range is 11 (V–) to 11 [(V+) – 1] with a maximum of ±100V. (4) Includes effects of input current noise and thermal noise contribution of resistor network. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® INA146 2 SPECIFICATIONS: VS = +5V Single Supply At TA = +25°C, G = 1, RL = 10kΩ connected to VS /2 and Ref pin connected to VS /2 unless otherwise noted. Boldface limits apply over the specified temperature range, TA = –40°C to +85°C. INA146UA PARAMETER CONDITION OFFSET VOLTAGE, VO Input Offset Voltage VOS vs Temperature ∆VOS /∆T vs Power Supply Rejection Ratio PSRR vs Time INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection Ratio Over Temperature INPUT BIAS CURRENT(2) Bias Current Offset Current VCM CMRR MIN VCM = VO = 0V VS = ±1.35V to ±18V VIN+ – VIN– = 0V, VO = 0V VCM = –25V to +19V, RS = 0Ω –25 70 64 IB IOS INPUT IMPEDANCE Differential (non-inverting input) Differential (inverting input) Common-Mode NOISE Voltage Noise, f = 0.1Hz to 10Hz Voltage Noise Density, f = 1kHz MAX UNITS ±3 See Typical Curve ±100 ±3 ±10 mV ±600 µV/ °C µV/mo 19 80 74 V dB dB ±50 ±5 nA nA 110 91.7 55 kΩ kΩ kΩ 10 550 µVp-p nV/√Hz RTI(1, 3, 4) en GAIN Gain Equation Initial(1) Gain Error vs Temperature G = 0.1 to 100 G = 0.1 • (1 + RG2 /RG1) 0.1 ±0.025 ±0.1 ±1 ±10 ±0.025 ±0.1 ±1 ±10 ±0.001 ±0.01 RL = 100kΩ, VO = 0.15V to 4V, G = 1 RL = 100kΩ, VO = 0.25V to 4V, G = 1 RL = 10kΩ, VO = 0.3V to 3.75V, G = 1 RL = 10kΩ, VO = 0.5V to 3.75V, G = 1 VO = +0.3 to +3.75, G = 1 vs Temperature Nonlinearity FREQUENCY RESPONSE Small Signal Bandwidth G = 0.1 G=1 Slew Rate Settling Time, 0.1% 0.01% Overload Recovery 550 50 0.45 40 80 40 G = 1, 10V Step G = 1, 10V Step 50% Input Overload OUTPUT, VO Voltage Output Over Temperature RL = 100kΩ, G = 1 RL = 100kΩ, G = 1 RL = 10kΩ, G = 1 RL = 10kΩ, G = 1 Continuous to Common Stable Operation Over Temperature Short-Circuit Current Capacitive Load POWER SUPPLY Voltage Range, Dual Supplies Voltage Range, Single Supply Quiescent Current Over Temperature TEMPERATURE RANGE Specified Range Operating Range Storage Range Thermal Resistance TYP RTI(1, 2) 0.15 0.25 0.3 0.5 VIN = 0, IO = 0 ±570 –40 –55 –55 θJA kHz kHz V/µs µs µs µs 4 4 3.75 3.75 V V V V mA pF ±18 ±36 ±700 ±750 V V µA µA +85 +125 +125 °C °C °C °C/W ±15 1000 ±2.25 ±4.5 V/V V/V V/V % ppm / °C % ppm / °C % of FS 150 NOTES: (1) Overall difference amplifier configuration. Referred to input pins (VIN+ and VIN–), gain = 0.1V/V. Specified with 10kΩ in feedback of A2. (2) Input offset voltage specification includes effects of amplifier’s input bias and offset currents. (3) Includes effects of input current noise and thermal noise contribution of resistor network. (4) Common-mode voltage range is 11 (V–) to 11 [(V+) – 1] with a maximum of ±100V. ® 3 INA146 AMPLIFIER A1, A2 PERFORMANCE At TA = +25°C, G = 0.1, RL = 10kΩ connected to ground and Ref pin, unless otherwise noted. Boldface limits apply over the specified temperature range, TA = –40°C to +85°C. INA146UA PARAMETER CONDITION OFFSET VOLTAGE, VO Input Offset Voltage vs Temperature MIN TYP MAX UNITS VOS ∆VOS /∆T RTI(1, 2) VS = ±15V, VCM = VO = 0V TA = –40°C to +85°C ±0.5 ±1 mV µV/°C VCM CMRR VIN+ – VIN– = 0V, VO = 0V VCM = (V–) to (V+) –1 (V–) to (V+) –1 90 V dB AOL 110 dB IB IOS ±50 ±5 nA nA 10 ±1 ±100 kΩ % ppm/°C INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection Ratio OPEN-LOOP GAIN Open Loop Gain INPUT BIAS CURRENT(2) Bias Current Offset Current RESISTOR AT A1 OUTPUT, VO1 Initial Error Temperature Drift Coefficient ELECTROSTATIC DISCHARGE SENSITIVITY PIN CONFIGURATION Top View SO-8 Ref 1 8 VO1 – VIN 2 7 V+ + VIN 3 6 VO V– 4 5 RG This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage, V+ to V– .................................................................... 36V Signal Input Terminals, Voltage ...................................................... ±100V Current ....................................................... ±1mA Output Short Circuit (to ground) .............................................. Continuous Operating Temperature .................................................. –55°C to +125°C Storage Temperature ..................................................... –55°C to +150°C Junction Temperature .................................................................... +150°C Lead Temperature (soldering, 10s) ............................................... +240°C NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. PACKAGE/ORDERING INFORMATION PRODUCT PACKAGE PACKAGE DRAWING NUMBER(1) INA146UA " SO-8 " 182 " SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ORDERING NUMBER(2) TRANSPORT MEDIA –40°C to +85°C " INA146UA " INA146UA INA146UA/2K5 Rails Tape and Reel NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book, or visit the Burr-Brown web site at www.burr-brown.com. (2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “INA146UA/2K5” will get a single 2500-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book. ® INA146 4 TYPICAL PERFORMANCE CURVES At TA = +25°C, VS = ±15V, G = 0.1, RL = 10kΩ connected to ground and Ref pin connected to ground, unless otherwise noted. GAIN vs FREQUENCY GAIN vs FREQUENCY 40 40 VS = ±15V CL = 1000pF G = 10 20 G=1 Voltage Gain (dB) Voltage Gain (dB) 20 0 –20 0 G=1 –20 G = 0.1 G = 0.1 –40 –40 100 1K 10K 100K 1M 100 10M 1K 10K 100K 1M 10M Frequency (Hz) Frequency (Hz) POWER SUPPLY REJECTION vs FREQUENCY COMMON-MODE REJECTION vs FREQUENCY 100 Power Supply Rejection (dB) 100 Common-Mode Rejection (dB) VS = ±15V CL = 200pF 10kΩ G = 10 80 60 40 20 PSR+ (VS = ±15V) 80 PSR+ (VS = +5V) 60 40 20 PSR– (VS = ±15V) 0 0 10 100 1k 10k 100k 1M 1 10M 10 100 1k 10k Frequency (Hz) Frequency (Hz) INPUT VOLTAGE NOISE DENSITY 0.1Hz to 10Hz VOLTAGE NOISE (RTI) 100k G = 0.1 2µV/div Input Voltage Noise (nV/√Hz 10k 1k G = 10 G=1 100 0.1 1 10 100 1k 10k 100k 500ms/div Frequency (Hz) ® 5 INA146 TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, VS = ±15V, G = 0.1, RL = 10kΩ connected to ground and Ref pin connected to ground, unless otherwise noted. QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT vs TEMPERATURE SLEW RATE vs TEMPERATURE IQ (µA) ISC 0.6 18 0.55 630 16 610 14 590 12 10 570 IQ 550 8 G=1 0.5 Sew Rate (V/µs) G=1 650 20 ISC (mA) 670 0.45 0.4 0.35 530 6 510 4 490 2 0.25 0 0.2 470 –60 –40 –20 20 0 40 60 80 0.3 100 120 140 –60 –40 –20 0 Temperature (°C) 40 60 80 100 120 140 SETTLING TIME vs LOAD CAPACITANCE 120 TS vs CLOAD G Φ –90 RL = 10kΩ || 1nF –135 0.01%, G = 1 VS = ±15V 100 RL = 10kΩ || 200pF Settling Time (µs) 110 100 90 80 70 60 50 40 30 20 10 0 –10 Phase (°) Open-Loop Gain (dB) GAIN AND PHASE vs FREQUENCY Op Amp A1 and A2 80 60 0.1%, G = 0.1 40 0.1%, G = 1 20 0 –180 1 10 100 1k 10k 100k 1 1M 3 MAXIMUM OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 30 100 OFFSET VOLTAGE PRODUCTION DISTRIBUTION 15 25 +85°C VS = ±2.25V 10 +125°C Percent of Amplifiers (%) –25°C +25°C 5 +85°C 0 10 Load Capacitance (nF) Frequency (Hz) –55°C +125°C –5 +25°C –25°C +85°C –10 20 Typical production distribution of packaged units. 15 10 5 –15 0 2 4 6 8 10 12 14 0 16 Output Current (mA) < –10 < –9 < –8 < –7 < –6 < –5 < –4 < –3 < –2 < –1 <0 <1 <2 <3 <4 <5 <6 <7 <8 <9 < 10 > 10 Output Voltage Swing (V) 20 Temperature (°C) Offset Voltage, RTI (mV) ® INA146 6 TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, VS = ±15V, G = 0.1, RL = 10kΩ connected to ground and Ref pin connected to ground, unless otherwise noted. OFFSET VOLTAGE PRODUCTION DISTRIBUTION OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION 40 30 Typical production distribution of packaged units. Typical production distribution of packaged units. VS = ±15V Percent of Amplifiers (%) 25 30 25 20 15 10 20 15 10 5 5 0 < –10 < –9 < –8 < –7 < –6 < –5 < –4 < –3 < –2 < –1 <0 <1 <2 <3 <4 <5 <6 <7 <8 <9 < 10 > 10 –100 –90 –80 –70 –60 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 0 Offset Voltage Drift, RTI (µV/°C) Offset Voltage, RTI (mV) SMALL-SIGNAL STEP RESPONSE (G = 0.1, RL = 10kΩ, CL = 200pF) (G = 0.1, CL = 1000pF) 50mV/div 50mV/div SMALL-SIGNAL STEP RESPONSE 5µs/div 5µs/div SMALL-SIGNAL STEP RESPONSE LARGE-SIGNAL STEP RESPONSE (G = 1, CL = 1000pF) (G = 1, RL = 10kΩ, CL = 200pF) 5V/div 50mV/div Percent of Amplifiers (%) 35 VS = ±15V 50µs/div 5µs/div ® 7 INA146 APPLICATION INFORMATION SETTING THE GAIN The gain of the INA146 is set by using two external resistors, RG1 and RG2, according to the equation: The INA146 is a programmable gain difference amplifier consisting of a gain of 0.1 difference amplifier and a programmable-gain output buffer stage. Basic circuit connections are shown in Figure 1. Power supply bypass capacitors should be connected close to pins 4 and 7 as shown. The amplifier is programmable in the range of G = 0.1 to G = 50 with two external resistors. G = 0.1 • (1 + RG2 / RG1) For a total gain of 0.1, A2 is connected as a buffer amplifier with no RG1. A feedback resistor, RG2 = 10kΩ, should be used in the buffer connection. This provides bias current cancellation (in combination with internal R5) to assure specified offset voltage performance. Commonly used values are shown in the table of Figure 1. Resistor values for other gains should be chosen to provide a 10kΩ parallel resistance. The output of A1 is connected to the noninverting input of A2 through a 10kΩ resistor which is trimmed to ±1% absolute accuracy. The A2 input is available for applications such as a filter or a precision current source. See application figures for examples. COMMON-MODE RANGE The 10:1 input resistor ratio of the INA146 provides an input common-mode range that can extend well beyond the power supply rails. Exact range depends on the power supply voltage and the voltage applied to the Ref terminal (pin 1). To assure proper operation, the voltage at the non-inverting input of A1 (an internal node) must be within its linear operating range. Its voltage is determined by the simple 10:1 voltage divider between pin 3 and pin 1. This voltage must be between V– and (V+) – 1V. OPERATING VOLTAGE The INA146 is fully specified for supply voltages from ±2.25V to ±18V with key parameters guaranteed over the temperature range –40°C to +85°C. The INA146 can be operated with single or dual supplies with excellent performance. Parameters that vary significantly with operating voltage, load conditions or temperature are shown in the typical performance curves. +VS RG1 RG2 0.1µF RB 7 5 R2 10kΩ R1 100kΩ VIN– + – VO = (VIN – VIN) 0.1 (1 + RG2/RG1) 2 R5 10kΩ A2 VO 6 A1 STANDARD 1% RESISTORS R4 10kΩ R3 100kΩ + VIN 3 INA146 4 1 8 0.1µF V01 –VS FIGURE 1. Basic Circuit Connections. ® INA146 8 TOTAL GAIN (V/V) A2 GAIN (V/V) RG1 (Ω) RG2 (Ω) RB (Ω) 0.1 0.2 0.5 1 2 5 10 20 50 100 1 2 5 10 20 50 100 200 500 1000 (None) 20k 12.4k 11.0k 10.5k 10.2k 10.2k 499 100 100 10k 20k 49.9k 100k 200k 499k 1M 100k 49.9k 100k — — — — — — — 9.53k 10k 10k OFFSET TRIM The INA146 is laser-trimmed for low offset voltage and drift. Most applications require no external offset adjustment. Figure 2 shows an optional circuit for trimming the offset voltage. A voltage applied to the Ref terminal will be summed with the output signal. This can be used to null offset voltage. To maintain good common-mode rejection, the source impedance of a signal applied to the Ref terminal should be less than 10Ω and a resistor added to the positive input terminal should be 10 times that, or 100Ω. Alternatively, the trim voltage can be buffered with an op amp such as the OPA277. INPUT IMPEDANCE The input impedance of the INA146 is determined by the input resistor network and is approximately 100kΩ. The source impedance at the two input terminals must be nearly equal to maintain good common-mode rejection. A 12Ω mismatch in impedance between the two inputs will cause the typical common-mode rejection to be degraded to approximately 72dB. Figure 7 shows a common application measuring power supply current through a shunt resistor. The source impedance of the shunt resistor, RS, is balanced by an equal compensation resistor, RC. Source impedances greater than 800Ω are not recommended, even if they are perfectly matched. Internal resistors are laser trimmed for accurate ratios, not to absolute values. Adding equal resistors greater than 800Ω can cause a mismatch in the total resistor ratios, degrading CMR. 10kΩ 5 R1 R2 VIN– R5 R3 100Ω A2 VO 6 A1 VIN+ R4 1 Offset Adjustment Range = ±15mV, RTI (±1.5mV at pin 1) VO1 +15V RT 100kΩ 100kΩ 10Ω NOTE: Increasing the trim resistor RT will decrease the trim range –15V FIGURE 2. Optional Offset Trim Circuit. RG2 10kΩ V+ +5V RX 5 7 2 Output scaled to low voltage A/D converter. 10.8V + 10kΩ VO = 1.08V nominal VIN Load 6 3 RX INA146 Differential measurement at battery rejects voltage drop in connection resistance, RX. 4 1 8 V+ Max VIN +5V +7V +10V ≥ 11V 40V 60V 95V 100V FIGURE 3. Measuring Voltages Greater than Supply Voltage. ® 9 INA146 Pole at 106Hz G=1 1500pF RG2 10kΩ RG2 1MΩ RG1 10kΩ 5 – VIN 2 5 – VIN 2 10kΩ 6 10kΩ VO 6 + VIN 3 INA146 1 + VIN 8 1N4684 (3.3V) 3 Output clamps at approximately ±4V. INA146 1 1N914 8 22nF Pole at 720Hz FIGURE 5. Output Clamp. FIGURE 4. Noise Filtering. RG2 10kΩ 5 – VIN 2 R1 R2 0V ≤ VO ≤ 5V 10kΩ 6 + VIN 3 R3 R4 INA146 8 1 1N914 Voltage Reference (1) 5.0V or analog-to-digital VS 1N914 (1) NOTE: (1) 1/2 OPA2342 with VS connected to +5V and GND. FIGURE 6. Precision Clamp. ® INA146 10 VO VO RG2 100kΩ RG1 11kΩ Power Supply 5 For sense resistors (RS) greater than 10Ω, use series compensation resistor (RC) for good common-mode rejection. Sense resistors greater than 500Ω are not recommended. 2 RC 100Ω VO 6 RS 100Ω 3 INA146 1 8 Load VO1 FIGURE 7. Current Monitor, G = 1. +5V 24V 8.4kΩ Feedback 7 5 2 8kΩ 1V 6 SHUNT R-I Lamp/10 e.g., 0.1Ω for 1A VO 10kΩ 1V – 50mV 3 2kΩ INA146 4 1 8 Ref 10MΩ Lamp FIGURE 8. Comparator Output with Optional Hysteresis Application to Sense Lamp Burn-Out. RG2 100kΩ RG1 11kΩ RG2 10kΩ 5 – VIN 5 2 VIN 2 VO 10kΩ 6 + VIN 3 INA146 1 R1 1MΩ + C1 0.1µF VIN 3 INA146 1 Pole at 1 f= = 1.6Hz 2πR1RC VO VO1 8 + – IOUT – (VIN – VIN )/10kΩ OPA277 FIGURE 9. AC Coupling (DC Restoration). FIGURE 10. Precision Current Source. ® 11 INA146 PACKAGE OPTION ADDENDUM www.ti.com 16-Feb-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty INA146UA ACTIVE SOIC D 8 INA146UA/2K5 ACTIVE SOIC D INA146UA/2K5E4 ACTIVE SOIC INA146UAE4 ACTIVE SN0406068DR ACTIVE 75 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR SOIC D 8 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR 75 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device INA146UA/2K5 Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel Diameter Width (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) 6.4 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA146UA/2K5 SOIC D 8 2500 346.0 346.0 29.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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