Data Sheet No. PD60046-S IR2104(S) & (PbF) HALF-BRIDGE DRIVER Features Product Summary • Floating channel designed for bootstrap operation • • • • • • • • • Fully operational to +600V Tolerant to negative transient voltage dV/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout 3.3V, 5V and 15V input logic compatible Cross-conduction prevention logic Internally set deadtime High side output in phase with input Shut down input turns off both channels Matched propagation delay for both channels Also available LEAD-FREE VOFFSET 600V max. IO+/- 130 mA / 270 mA VOUT 10 - 20V ton/off (typ.) 680 & 150 ns Deadtime (typ.) 520 ns Packages Description The IR2104(S) are high voltage, high speed power 8 Lead SOIC MOSFET and IGBT drivers with dependent high and low 8 Lead PDIP IR2104S side referenced output channels. Proprietary HVIC and IR2104 latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates from 10 to 600 volts. Typical Connection up to 600V VCC VCC VB IN IN HO SD SD VS COM LO TO LOAD (Refer to Lead Assignment for correct pin configuration) This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1 IR2104(S) & (PbF) Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units VB High side floating absolute voltage -0.3 625 VS High side floating supply offset voltage VB - 25 VB + 0.3 VHO High side floating output voltage VS - 0.3 VB + 0.3 VCC Low side and logic fixed supply voltage -0.3 25 VLO Low side output voltage -0.3 VCC + 0.3 VIN Logic input voltage (IN & SD ) -0.3 VCC + 0.3 — 50 dVs/dt PD RthJA Allowable offset supply voltage transient Package power dissipation @ TA ≤ +25°C Thermal resistance, junction to ambient (8 lead PDIP) — 1.0 (8 lead SOIC) — 0.625 (8 lead PDIP) — 125 (8 lead SOIC) — 200 TJ Junction temperature — 150 TS Storage temperature -55 150 TL Lead temperature (soldering, 10 seconds) — 300 V V/ns W °C/W °C Recommended Operating Conditions The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential. Symbol Min. Max. VB High side floating supply absolute voltage Definition VS + 10 VS + 20 VS High side floating supply offset voltage Note 1 600 VHO High side floating output voltage VS VB VCC Low side and logic fixed supply voltage 10 20 VLO Low side output voltage 0 VCC VIN Logic input voltage (IN & SD ) 0 VCC TA Ambient temperature -40 125 Units V °C Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-3 for more details). 2 www.irf.com IR2104(S) & (PbF) Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 15V, CL = 1000 pF and TA = 25°C unless otherwise specified. Symbol Definition Min. Typ. Max. Units Test Conditions ton Turn-on propagation delay — 680 820 VS = 0V toff Turn-off propagation delay — 150 220 VS = 600V tsd tr Shutdown propagation delay — 160 220 Turn-on rise time — 100 170 Turn-off fall time — 50 90 tf DT Deadtime, LS turn-off to HS turn-on & HS turn-on to LS turn-off 400 520 650 MT Delay matching, HS & LS turn-on/off — — 60 ns Static Electrical Characteristics VBIAS (VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Definition Min. Typ. Max. Units Test Conditions VIH Logic “1” (HO) & Logic “0” (LO) input voltage 3 — — VIL Logic “0” (HO) & Logic “1” (LO) input voltage — — 0.8 VCC = 10V to 20V VCC = 10V to 20V V VSD,TH+ SD input positive going threshold 3 — — VSD,TH- SD input negative going threshold — — 0.8 VOH High level output voltage, VBIAS - VO — — 100 VOL Low level output voltage, VO — — 100 ILK Offset supply leakage current — — 50 IQBS Quiescent VBS supply current — 30 55 IQCC Quiescent VCC supply current — 150 270 IIN+ Logic “1” input bias current — 3 10 VIN = 5V IIN- VIN = 0V Logic “0” input bias current — — 1 VCCUV+ VCC supply undervoltage positive going threshold 8 8.9 9.8 VCCUV- VCC supply undervoltage negative going threshold 7.4 8.2 9 IO+ Output high short circuit pulsed current 130 210 — IO- Output low short circuit pulsed current 270 360 — www.irf.com VCC = 10V to 20V VCC = 10V to 20V mV IO = 0A IO = 0A VB = VS = 600V VIN = 0V or 5V µA VIN = 0V or 5V V mA VO = 0V PW ≤ 10 µs VO = 15V PW ≤ 10 µs 3 IR2104(S) & (PbF) Functional Block Diagram VB HV LEVEL SHIFT Q PULSE FILTER HO R S VS IN PULSE GEN UV DETECT DEAD TIME & SHOOT-THROUGH PREVENTION VCC LO SD COM Lead Definitions Symbol Description IN Logic input for high and low side gate driver outputs (HO and LO), in phase with HO SD VB Logic input for shutdown HO High side gate drive output VS High side floating supply return VCC Low side and logic fixed supply High side floating supply LO Low side gate drive output COM Low side return Lead Assignments VCC VB 2 IN HO 3 SD VS 6 4 COM LO 5 1 4 8 7 VCC VB 8 IN HO 7 3 SD VS 6 4 COM LO 5 1 2 8 Lead PDIP 8 Lead SOIC IR2104 IR2104S www.irf.com IR2104(S) & (PbF) IN(LO) IN 50% 50% SD IN(HO) ton toff tr 90% HO LO HO LO Figure 1. Input/Output Timing Diagram 90% 10% 10% Figure 2. Switching Time Waveform Definitions 50% SD tf 50% IN 50% 90% tsd HO LO 90% HO 10% DT LO DT 90% Figure 3. Shutdown Waveform Definitions 10% Figure 4. Deadtime Waveform Definitions IN (LO) 50% 50% IN (HO) LO HO 10% MT MT 90% LO HO Figure 5. Delay Matching Waveform Definitions www.irf.com 5 1 40 0 1400 1 20 0 1200 Turn-On Delay Time (ns) T urn -O n D e lay T im e (n s) IR2104(S) & (PbF) 1 00 0 M a x. 8 00 6 00 T yp . 4 00 2 00 Max. 1000 800 Typ. 600 400 200 0 0 -50 -25 0 25 50 75 1 00 10 1 25 12 Temperature (°C) 14 16 18 20 VBIAS Supply Voltage (V) Figure 6A. Turn-On Time vs Temperature Figure 6B. Turn-On Time vs Supply Voltage 1000 5 00 800 Turn-Off Delay Time (ns) Turn-On Delay Time (ns) Max. 600 Typ. 400 200 4 00 3 00 M ax . 2 00 1 00 T yp . 0 0 0 2 4 6 8 10 12 14 16 18 -50 20 -25 0 Input Voltage (V) 500 1000 400 800 Max. 200 Typ. 100 0 75 1 00 1 25 600 Ma x . 400 200 Typ 0 10 12 14 16 18 20 VBIAS Supply Voltage (V) Figure 7B. Turn-Off Time vs Supply Voltage 6 50 Figure 7A. Turn-Off Time vs Temperature Turn-Off Delay Time (ns Turn-Off Delay Time (ns) Figure 6C. Turn-On Time vs Input Voltage 300 25 Temperature (°C) 0 2 4 6 8 10 12 14 16 18 20 Input Voltage (V) Figure 7C. Turn-Off Time vs Input Voltage www.irf.com IR2104(S) & (PbF) 500 Shutdown Delay Time (ns) Shutdown Delay Time (ns) 500 400 300 M ax. 200 100 T y p. 0 400 Max. 300 200 Typ. 100 0 -5 0 -2 5 0 25 50 75 100 125 10 12 Temperature (°C) Figure 8A. Shutdown Time vs Temperature 16 18 20 Figure 8B. Shutdown Time vs Voltage 500 500 Turn-On Rise Time (ns) Turn-On Rise Time (ns) 14 VBIAS Supply Voltage (V) 400 300 200 M ax. 100 400 300 M ax. 200 100 Typ. Typ. 0 0 -5 0 -2 5 0 25 50 75 100 10 125 12 Temperature (°C) Figure 9A. Turn-On Rise Time vs Temperature 16 18 20 Figure 9B. Turn-On Rise Time vs Voltage 200 Turn-Off Fall Time (ns) 20 0 Turn-Off Fall Time (ns) 14 VBIAS Supply Voltage (V) 15 0 10 0 M ax. 50 150 M ax. 100 50 Typ. Ty p. 0 0 -50 -25 0 25 50 75 10 0 Temperature (°C) Figure 10A. Turn-Off Fall Time vs Temperature www.irf.com 12 5 10 12 14 16 18 20 VBIAS Supply Voltage (V) Figure 10B. Turn-Off Fall Time vs Voltage 7 1400 1400 1200 1200 Deadtime (ns) Deadtime (ns) IR2104(S) & (PbF) 1000 800 M ax. 600 Typ. 400 M ax. 800 600 Typ. 400 M in . M in . 200 1000 200 0 0 -5 0 -2 5 0 25 50 75 100 125 10 12 Temperature (°C) 8 8 7 7 6 5 M in. 3 2 20 6 5 4 M in. 3 2 0 0 -50 -25 0 25 50 75 100 10 125 12 Figure 12A. Logic "1" (HO) & Logic “0” (LO) & Inactive SD Input Voltage vs Temperature 16 18 20 Figure 12B. Logic "1" (HO) & Logic “0” (LO) & Inactive SD Input Voltage vs Voltage 4 3.2 3 .2 In p u t V o lta g e (V ) 4 2.4 1.6 Max. 0.8 0 -50 14 Vcc Supply Voltage (V) Temperature (°C) Input Voltage (V) 18 1 1 2 .4 1 .6 M ax. 0 .8 0 -25 0 25 50 75 100 125 Temperature (°C) Figure 13A. Logic "0" (HO) & Logic “1” (LO) & Active SD Input Voltage vs Temperature 8 16 Figure 11B. Deadtime vs Voltage In pu t V olta g e (V ) Input V oltag e (V ) Figure 11A. Deadtime vs Temperature 4 14 VBIAS Supply Voltage (V) 10 12 14 16 18 20 Vcc Supply Voltage (V) Figure 13B. Logic "0" (HO) & Logic “1” (LO) & Active SD Input Voltage vs Voltage www.irf.com IR2104(S) & (PbF) 1 High Level Output Voltage (V) High Level Output Voltage (V) 1 0 .8 0 .6 0 .4 M ax. 0 .2 0 .8 0 .6 0 .4 M ax. 0 .2 0 0 -5 0 -2 5 0 25 50 75 100 10 125 12 1 18 20 1 Low Level Output Voltage (V) Low Level Output Voltage (V) 16 Figure 14B. High Level Output vs Voltage Figure 14A. High Level Output vs Temperature 0 .8 0 .6 0 .4 0 .2 M ax. 0 -5 0 -2 5 0 25 50 75 100 0 .8 0 .6 0 .4 0 .2 M ax. 0 10 125 12 400 300 200 100 M ax. 0 0 25 50 75 100 Temperature (°C) Figure 16A. Offset Supply Current vs Temperature www.irf.com 125 Offset Supply Leakage Current (µA) 500 -2 5 16 18 20 Figure 15B. Low level Output vs Voltage Figure 15A. Low Level Output vs Temperature -5 0 14 Vcc Supply Voltage (V) Temperature (°C) Offset Supply Leakage Current (µA) 14 Vcc Supply Voltage (V) Temperature (°C) 500 400 300 200 100 Max. 0 0 100 200 300 400 500 600 VB Boost Voltage (V) Figure 16B. Offset Supply Current vs Voltage 9 IR2104(S) & (PbF) 150 VBS Supply Current (µA) VBS Supply Current (µA) 1 50 1 20 90 60 M ax . 30 T yp . 0 120 90 60 Max . 30 Ty p. 0 -50 -25 0 25 50 75 1 00 1 25 10 12 Temperature (°C) Figure 17A. VBS Supply Current vs Temperature 16 18 20 Figure 17B. VBS Supply Current vs Voltage 700 700 Vcc Supply Current (µA) Vcc Supply Current (µA) 14 VBS Floating Supply Voltage (V) 600 500 400 M ax. 300 200 100 Typ. 600 500 400 300 M ax. 200 100 Typ. 0 0 -5 0 -2 5 0 25 50 75 100 125 10 12 Temperature (°C) Figure 18A. Vcc Supply Current vs Temperature 18 20 30 Logic 1” Input Current (µA) Logic 1” Input Current (µA) 16 Figure 18B. Vcc Supply Current vs Voltage 30 25 20 15 10 M ax. 5 Typ. 0 25 20 15 10 M ax. 5 Typ. 0 -5 0 -2 5 0 25 50 75 100 Temperature (°C) Figure 19A. Logic"1" Input Current vs Temperature 10 14 Vcc Supply Voltage (V) 125 10 12 14 16 18 20 Vcc Supply Voltage (V) Figure 19B. Logic"1" Input Current vs Voltage www.irf.com IR2104(S) & (PbF) 5 Logic "0" Input Current (uA) Logic “0” Input Current (µA) 5 4 3 2 Max. 1 4 3 2 Max. 1 0 0 -50 -25 0 25 50 75 Temperature (°C) 100 10 125 Figure 20A. Logic "0" Input Current vs Temperature VCC UVLO Threshold - (V) VCC UVLO Threshold +(V) 10 Typ. M in. 8 7 6 10 Max. 9 Typ. 8 7 Min. 6 -50 -25 0 25 50 75 100 -50 125 -25 0 Temperature (°C) 50 75 100 125 Figure 21B. Vcc Undervoltage Threshold(-) vs Temperature 500 Output Source Current (mA) 500 Output Source Current (mA) 25 Temperature (°C) Figure 21A. Vcc Undervoltage Threshold(+) vs Temperature 400 Typ. 200 100 20 11 M ax. 300 14 16 18 VCC Supply Voltage (V) Figure 20B. Logic "0" Input Current vs Voltage 11 9 12 Min. 0 -50 400 300 200 T y p. 100 M in. 0 -25 0 25 50 75 Temperature (°C) 100 Figure 22A. Output Source Current vs Temperature www.irf.com 125 10 12 14 16 18 VBIAS Supply Voltage (V) 20 Figure 22B. Output Source Current vs Voltage 11 IR2104(S) & (PbF) 70 0 6 00 Output Sink Current (mA) Output Sink Current (mA) 7 00 T yp . 5 00 4 00 3 00 M in . 2 00 1 00 60 0 50 0 40 0 Ty p. 30 0 20 0 M in. 10 0 0 0 -50 -25 0 25 50 75 1 00 1 25 10 Figure 23A. Output Sink Current vs Temperature 12 14 16 18 20 VBIAS Supply Voltage (V) Temperature (°C) Figure 23B. Output Sink Current vs Voltage Case Outlines 8 Lead PDIP 12 01-6014 01-3003 01 (MS-001AB) www.irf.com IR2104(S) & (PbF) D DIM B 5 A FOOTPRINT 8 6 7 6 5 H E 1 6X 2 3 0.25 [.010] 4 e A 6.46 [.255] 3X 1.27 [.050] e1 0.25 [.010] A1 .0688 1.35 1.75 A1 .0040 .0098 0.10 0.25 b .013 .020 0.33 0.51 c .0075 .0098 0.19 0.25 D .189 .1968 4.80 5.00 .1574 3.80 4.00 E .1497 e .050 BASIC e1 MAX 1.27 BASIC .025 BASIC 0.635 BASIC H .2284 .2440 5.80 6.20 K .0099 .0196 0.25 0.50 L .016 .050 0.40 1.27 y 0° 8° 0° 8° y 0.10 [.004] 8X L 8X c 7 C A B NOTES: 1. DIMENSIONING & TOLERANC ING PER ASME Y14.5M-1994. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INC HES]. 4. OUTLINE C ONFORMS TO JEDEC OUTLINE MS-012AA. 8 Lead SOIC www.irf.com MIN .0532 K x 45° A C 8X b 8X 1.78 [.070] MILLIMETERS MAX A 8X 0.72 [.028] INCHES MIN 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE. 01-6027 01-0021 11 (MS-012AA) 13 IR2104(S) & (PbF) LEADFREE PART MARKING INFORMATION Part number Date code IRxxxxxx YWW? Pin 1 Identifier ? P MARKING CODE Lead Free Released Non-Lead Free Released IR logo ?XXXX Lot Code (Prod mode - 4 digit SPN code) Assembly site code Per SCOP 200-002 ORDER INFORMATION Basic Part (Non-Lead Free) 8-Lead PDIP IR2104 order IR2104 8-Lead SOIC IR2104S order IR2104S Leadfree Part 8-Lead PDIP IR2104 order IR2104PbF 8-Lead SOIC IR2104S order IR2104SPbF IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 This product has been qualified per industrial level Data and specifications subject to change without notice. 4/2/2004 14 www.irf.com