SemiHow HFD3N80 800v n-channel mosfet Datasheet

BVDSS = 800 V
RDS(on) typ ȍ
HFD3N80/HFU3N80
ID = 3.0 A
800V N-Channel MOSFET
D-PAK
I-PAK
2
FEATURES
1
1
2
3
‰ Originative New Design
3
HFD3N80
‰ Superior Avalanche Rugged Technology
‰ Robust Gate Oxide Technology
HFU3N80
1.Gate 2. Drain 3. Source
‰ Very Low Intrinsic Capacitances
‰ Excellent Switching Characteristics
‰ Unrivalled Gate Charge : 17 nC (Typ.)
‰ Extended Safe Operating Area
‰ Lower RDS(ON) ȍ 7\S #9GS=10V
‰ 100% Avalanche Tested
Absolute Maximum Ratings
Symbol
TC=25୅ unless otherwise specified
Parameter
Value
Units
800
V
VDSS
Drain-Source Voltage
ID
Drain Current
– Continuous (TC = 25ఁ͚͑
3.0
A
Drain Current
– Continuous (TC = 100ఁ͚͑
1.9
A
IDM
Drain Current
– Pulsed
12
A
VGS
Gate-Source Voltage
ρ30
V
EAS
Single Pulsed Avalanche Energy
(Note 2)
320
mJ
IAR
Avalanche Current
(Note 1)
3.0
A
EAR
Repetitive Avalanche Energy
(Note 1)
7.0
mJ
dv/dt
Peak Diode Recovery dv/dt
(Note 3)
4.5
V/ns
PD
Power Dissipation (TA = 25ఁ) *
2.5
W
Power Dissipation (TC = 25ఁ͚͑
͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͞͵ΖΣΒΥΖ͑ΒΓΠΧΖ͑ͣͦఁ͑
70
W
0.56
W/ఁ͑
-55 to +150
ఁ͑
300
ఁ͑
(Note 1)
TJ, TSTG
Operating and Storage Temperature Range
TL
Maximum lead temperature for soldering purposes,
1/8” from case for 5 seconds
Thermal Resistance Characteristics
Symbol
Parameter
Typ.
Max.
RșJC
Junction-to-Case
--
1.78
RșJA
Junction-to-Ambient*
--
50
RșJA
Junction-to-Ambient
--
110
Units
ఁ͠Έ͑
* When mounted on the minimum pad size recommended (PCB Mount)
క͑΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳͥ͝ͷΒΓ͑ͣͧ͑͢͡
HFD3N80_HFU3N80
Fab 2016
Symbol
Parameter
unless otherwise specified
Test Conditions
Min
Typ
Max
Units
On Characteristics
VGS
RDS(ON)
Gate Threshold Voltage
VDS = VGS, ID = 250 Ꮃ͑
2.5
--
4.5
V
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 1.5 A͑
--
4.0
4.8
‫͑ש‬
VGS = 0 V, ID = 250 Ꮃ͑
800
--
--
V
ID = 250 Ꮃ͑͝΃ΖΗΖΣΖΟΔΖΕ͑ΥΠͣͦఁ͑
--
0.99
--
·͠ఁ͑
VDS = 800 V, VGS = 0 V͑
--
--
1
Ꮃ͑
VDS = 640 V, TC = 125ఁ͑
--
--
10
Ꮃ͑
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
ԩBVDSS Breakdown Voltage Temperature
Coefficient
/ԩTJ
IDSS
Zero Gate Voltage Drain Current
IGSSF
Gate-Body Leakage Current,
Forward
VGS = 30 V, VDS = 0 V
--
--
100
Ꮂ͑
IGSSR
Gate-Body Leakage Current,
Reverse
VGS = -30 V, VDS = 0 V
--
--
-100
Ꮂ͑
--
700
910
Ꮔ͑
--
70
90
Ꮔ͑
--
7
9
Ꮔ͑
--
20
40
Ꭸ͑
--
55
110
Ꭸ͑
--
30
60
Ꭸ͑
--
40
80
Ꭸ͑
--
17
22
Οʹ͑
--
4.5
--
Οʹ͑
--
7.5
--
Οʹ͑
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz͑
Switching Characteristics
td(on)
Turn-On Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
VDS = 400 V, ID = 3.0 A,
RG = 25 ‫͑ש‬
͑
͙͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑͑ͿΠΥΖ͚͑ͥͦ͑͝
VDS = 640V, ID = 3.0 A,
VGS = 10 V
͙ͿΠΥΖ͚͑ͥͦ͑͝
Gate-Drain Charge
Source-Drain Diode Maximum Ratings and Characteristics
IS
Continuous Source-Drain Diode Forward Current
--
--
3.0
ISM
Pulsed Source-Drain Diode Forward Current
--
--
12
VSD
Source-Drain Diode Forward Voltage
IS = 3.0 A, VGS = 0 V
--
--
1.4
V
trr
Reverse Recovery Time
--
650
--
Ꭸ͑
Qrr
Reverse Recovery Charge
IS = 3.0 A, VGS = 0 V
diFGW $ȝV(Note 4)
--
5.2
--
ȝ&
A
Notes ;
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L=67mH, IAS=3.0A, VDD=50V, RG=25:, Starting TJ =25qC
3. ISD”$GLGW”$ȝV9DD”%9DSS , Starting TJ =25 qC
4. Pulse Test : Pulse Width ”ȝV'XW\&\FOH”
5. Essentially Independent of Operating Temperature
క͑΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳͥ͝ͷΒΓ͑ͣͧ͑͢͡
HFD3N80_HFU3N80
Electrical Characteristics TC=25 qC
HFD3N80_HFU3N80
ID, Drain Current [A]
ID, Drain Current [A]
Typical Characteristics
VGS, Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 1. On Region Characteristics
Figure 2. Transfer Characteristics
1
RDS(on), [Ÿ@
Drain-Source On-Resistance
IDR, Reverse Drain Current [A]
10
0
10
150 䉝
25䉝
䈜㻌㻺㼛㼠㼑㼟㻌㻦
1. VGS = 0V
ȝ V3XOVH7HVW
-1
10
0.2
0.4
0.6
1.0
1.2
1.4
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
Figure 3. On Resistance Variation vs
Drain Current and Gate Voltage
12
1500
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
Ciss
900
Coss
600
䈜㻌㻺㼛㼠㼑㼟㻌㻦
1. VGS = 0 V
2. f = 1 MHz
Crss
300
VDS = 160V
VGS, Gate-Source Voltage [V]
1200
Capacitance [pF]
0.8
VSD, Source-Drain voltage [V]
ID, Drain Current [A]
10
VDS = 400V
VDS = 640V
8
6
4
2
䈜㻌㻺㼛㼠㼑㻌㻦㻌㻵D = 3.0A
0
-1
10
0
0
10
1
10
0
4
8
12
16
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
20
క͑΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳͥ͝ͷΒΓ͑ͣͧ͑͢͡
(continued)
1.2
3.0
RDS(ON), (Normalized)
Drain-Source On-Resistance
BVDSS, (Normalized)
Drain-Source Breakdown Voltage
HFD3N80_HFU3N80
Typical Characteristics
1.1
1.0
䈜㻌㻺㼛㼠㼑㼟㻌㻦
1. VGS = 0 V
2. ID ȝ $
0.9
0.8
-100
-50
0
50
100
150
2.5
2.0
1.5
1.0
䈜㻌㻺㼛㼠㼑㼟㻌㻦
1. VGS = 10 V
2. ID = 1.5 A
0.5
0.0
-100
200
-50
0
50
100
150
200
o
o
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 8. On-Resistance Variation
vs Temperature
Figure 7. Breakdown Voltage Variation
vs Temperature
3.0
Operation in This Area
is Limited by R DS(on)
10 Ps
2.5
ID, Drain Current [A]
100 Ps
1 ms
10 ms
100 ms
100
DC
* Notes :
1. TC = 25 oC
10-1 0
10
101
2.0
1.5
1.0
0.5
2. TJ = 150 oC
3. Single Pulse
102
0.0
25
103
50
75
Figure 9. Maximum Safe Operating Area
0
10
100
125
150
TC, Case Temperature [ 䉝㼉
VDS, Drain-Source Voltage [V]
Zș -&(t), Thermal Response
ID, Drain Current [A]
101
Figure 10. Maximum Drain Current
vs Case Temperature
D=0.5
0.2
䈜㻌㻺㼛㼠㼑㼟㻌㻦
1. Zș -&(t) = 1.78 䉝㻛㼃 㻌㻹㼍㼤㻚
2. Duty Factor, D=t1/t2
3. TJM - TC = PDM * Zș -&(t)
0.1
0.05
-1
10
0.02
0.01
PDM
single pulse
t1
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
t2
0
10
1
10
t1, Square Wave Pulse Duration [sec]
Figure 11. Transient Thermal Response Curve
క͑΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳͥ͝ͷΒΓ͑ͣͧ͑͢͡
HFD3N80_HFU3N80
Fig 12. Gate Charge Test Circuit & Waveform
.ȍ
12V
VGS
Same Type
as DUT
Qg
200nF
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
RL
VDS
VDS
90%
VDD
RG
( 0.5 rated VDS )
Vin
DUT
10V
10%
tr
td(on)
td(off)
t on
tf
t off
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- LL IAS2 -------------------2
BVDSS -- VDD
L
VDS
VDD
ID
BVDSS
IAS
RG
10V
ID (t)
DUT
VDS (t)
VDD
tp
Time
క͑΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳͥ͝ͷΒΓ͑ͣͧ͑͢͡
HFD3N80_HFU3N80
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
IS
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• IS controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
IS
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
Vf
VDD
Body Diode
Forward Voltage Drop
క͑΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳͥ͝ͷΒΓ͑ͣͧ͑͢͡
HFD3N80_HFU3N80
Package Dimension
{vTY\YG
2.3±0.1
6.6±0.2
1.2±0.3
9.7+0.5
-0.3
2.7±0.3
0.5±0.05
5.6±0.2
1±0.2
5.35±0.15
1.2±0.3
0.05+0.1
-0.05
0.8±0.2
0.6±0.2
0.5+0.1
-0.05
2.3typ
2.3typ
క͑΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳͥ͝ͷΒΓ͑ͣͧ͑͢͡
HFD3N80_HFU3N80
Package Dimension
{vTY\YhG
క͑΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳͥ͝ͷΒΓ͑ͣͧ͑͢͡
HFD3N80_HFU3N80
Package Dimension
{vTY\XG
క͑΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳͥ͝ͷΒΓ͑ͣͧ͑͢͡
HFD3N80_HFU3N80
Package Dimension
{vTY\XhG
క͑΄Ͷ;ͺ͹΀Έ͑΃Ͷ·͟Ͳͥ͝ͷΒΓ͑ͣͧ͑͢͡