To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.com April 1st, 2010 Renesas Electronics Corporation Issued by: Renesas Electronics Corporation (http://www.renesas.com) Send any inquiries to http://www.renesas.com/inquiry. Notice 1. 2. 3. 4. 5. 6. 7. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. 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HAT1026R Silicon P Channel Power MOS FET High Speed Power Switching REJ03G1148-1000 (Previous: ADE-208-457H) Rev.10.00 Sep 07, 2005 Features • • • • Low on-resistance Capable of 4 V gate drive Low drive current High density mounting Outline RENESAS Package code: PRSP0008DD-D (Package name: SOP-8 <FP-8DAV> ) 5 6 7 8 D D D D 65 87 1, 2, 3 4 5, 6, 7, 8 4 G 3 12 4 S S S 1 2 3 Rev.10.00 Sep 07, 2005 page 1 of 6 Source Gate Drain HAT1026R Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Symbol VDSS Value –30 Unit V VGSS ID ±20 –7 V A –56 –7 A A 2.5 150 W °C ID (pulse) IDR Note 1 Note 2 Channel dissipation Channel temperature Pch Tch Storage temperature Tstg –55 to +150 Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW ≤ 10 s °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Symbol V (BR) DSS Min –30 Typ — Max — Unit V Gate to source breakdown voltage Gate to source leak current V (BR) GSS IGSS ±20 — — — — ±10 V µA IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 IDSS VGS (off) — –1.0 — — –10 –2.5 µA V VDS = –30 V, VGS = 0 VDS = –10 V, ID = –1 mA RDS (on) RDS (on) — — 0.028 0.04 0.037 0.065 Ω Ω ID = –4 A, VGS = –10 V Note 3 ID = –4 A, VGS = –4 V Forward transfer admittance Input capacitance |yfs| Ciss 8 — 12 1700 — — S pF Output capacitance Reverse transfer capacitance Coss Crss — — 1000 190 — — pF pF ID = –4 A, VDS = –10 V VDS = –10 V VGS = 0 f = 1 MHz Turn-on delay time Rise time td (on) tr — — 60 330 — — ns ns VGS = –4 V, ID = –4 A, VDD ≅ –10 V Turn-off delay time Fall time td (off) tf — — 80 120 — — ns ns Body-drain diode forward voltage Body-drain diode reverse recovery time VDF trr — — –0.9 70 –1.4 — V ns Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Note: 3. Pulse test Rev.10.00 Sep 07, 2005 page 2 of 6 Test Conditions ID = –10 mA, VGS = 0 Note 3 IF = –7 A, VGS = 0 IF = –7 A, VGS = 0 diF/dt = 20 A/µs Note 3 Note 3 HAT1026R Main Characteristics Power vs. Temperature Derating Operation in this area is limited by RDS (on) –0.1 ID (A) m s s) –0.3 s 10 Ambient Temperature 200 10 ≤ 150 –1 m 4 100 1 = e ot 50 –3 –0.03 Ta = 25°C 1 shot pulse –0.01 –0.01 –0.03 –0.1 –0.3 –1 0 0 PW –10 N 1.0 100 µs W (P 2.0 10 µs –30 Drain Current 3.0 –100 n tio ra pe O Channel Dissipation Test Condition: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW ≤ 10 s DC Pch (W) 4.0 Maximum Safe Operation Area –3 –10 –30 –100 Drain to Source Voltage VDS (V) Ta (°C) Note 4: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) Typical Transfer Characteristics Typical Output Characteristics –10 V –8 V –6 V –5 V –50 Pulse Test –4.5 V –40 –4 V Tc = –25°C ID (A) ID (A) –50 –30 –20 –3.5 V –10 –3 V Drain Current Drain Current –30 25°C 75°C –40 –20 –10 VDS = –10 V Pulse Test VGS = –2.5 V 0 0 –2 –4 –6 –8 Drain to Source Voltage 0 0 –10 VDS (V) –0.4 –0.3 –0.2 ID = –5 A –0.1 0 –2 A –1 A 0 –2 –4 –6 Gate to Source Voltage Rev.10.00 Sep 07, 2005 page 3 of 6 –8 –10 VGS (V) –6 –8 –10 VGS (V) Static Drain to Source on State Resistance vs. Drain Current Drain to Source on State Resistance RDS (on) (Ω) Drain to Source Saturation Voltage VDS (on) (V) Pulse Test –4 Gate to Source Voltage Drain to Source Saturation Voltage vs. Gate to Source Voltage –0.5 –2 0.5 Pulse Test 0.2 0.1 0.05 VGS = –4 V 0.02 –10 V 0.01 0.005 –0.2 –0.5 –1 –2 Drain Current –5 –10 ID (A) –20 Static Drain to Source on State Resistance vs. Temperature Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS (on) (Ω) HAT1026R 0.10 Pulse Test 0.08 ID = –1, –2, –5 A 0.06 VGS = –4 V 0.04 –1, –2, –5 A 0.02 –10 V 0 –40 0 40 80 Case Temperature 120 160 50 20 Tc = –25°C 10 25°C 5 75°C 2 1 VDS = –10 V Pulse Test 0.5 –0.2 Tc (°C) 200 3000 Capacitance C (pF) Reverse Recovery Time trr (ns) 10000 100 50 20 Ciss 1000 Coss 300 Crss 100 VGS = 0 f = 1 MHz 10 –0.5 –1 –2 Reverse Drain Current –5 0 –10 –4 –20 VGS –8 VDS –12 VDD = –25 V –10 V –5 V –16 ID = –7 A 0 16 32 Gate Charge Rev.10.00 Sep 07, 2005 page 4 of 6 48 64 Qg (nc) –30 –40 –50 –20 80 1000 Switching Time t (ns) –10 VGS (V) 0 VDD = –5 V –10 V –25 V –30 –20 Switching Characteristics Gate to Source Voltage VDS (V) Drain to Source Voltage 0 –10 Drain to Source Voltage VDS (V) IDR (A) Dynamic Input Characteristics –50 –10 –20 –5 30 di / dt = 20 A / µs VGS = 0, Ta = 25°C –40 –2 Typical Capacitance vs. Drain to Source Voltage 500 5 –0.1 –0.2 –1 Drain Current ID (A) Body-Drain Diode Reverse Recovery Time 10 –0.5 500 tr 200 100 tf td(off) 50 td(on) 20 VGS = –4 V, VDD = –10 V PW = 3 µs, duty ≤ 1 % 10 –0.1 –0.2 –0.5 –1 Drain Current –2 ID (A) –5 –10 HAT1026R Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current IDR (A) –50 –40 VGS = –5 V –30 –20 0, 5 V –10 Pulse Test 0 –0.4 0 –0.8 –1.2 Source to Drain Voltage –1.6 VSD –2.0 (V) Normalized Transient Thermal Impedance γ s (t) Normalized Transient Thermal Impedance vs. Pulse Width 10 1 D=1 0.5 0.2 0.1 0.1 θch – f (t) = γ s (t) • θch – f θch – f = 83.3°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) 0.05 0.01 0.02 0.01 D= PDM 0.001 o 1sh 0.0001 10 µ tp uls e PW T PW T 100 µ 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) Switching Time Test Circuit Switching Time Waveform Vin Vout Monitor Vin Monitor 10% D.U.T. 90% RL 90% 90% Vin –4 V 50 Ω VDD = –10 V Vout td(on) Rev.10.00 Sep 07, 2005 page 5 of 6 10% tr 10% td(off) tf HAT1026R Package Dimensions JEITA Package Code RENESAS Code P-SOP8-3.95 × 4.9-1.27 PRSP0008DD-D Package Name FP-8DAV 0.085g F *1 D MASS[Typ.] bp 5 Index mark 1 c HE *2 E 8 4 Z Terminal cross section (Ni/Pd/Au plating) *3 bp x M NOTE) 1. DIMENSIONS "*1(Nom)" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. e Reference Symbol L1 Dimension in Millimeters Min Nom Max D 4.90 5.3 E 3.95 A2 A1 0.10 0.14 0.25 0.34 0.40 0.46 0.15 0.20 0.25 1.75 A A bp A1 b1 c L c1 0° y HE Detail F 5.80 e 8° 6.10 6.20 1.27 x 0.25 y 0.1 Z 0.75 L L1 0.40 0.60 1.27 1.08 Ordering Information Part Name Quantity Shipping Container HAT1026R-EL-E 2500 pcs Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.10.00 Sep 07, 2005 page 6 of 6 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. 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