LSU402 LOW NOISE, LOW DRIFT MONOLITHIC DUAL N-CHANNEL JFET Linear Systems replaces discontinued Siliconix U402 The LSU402 is a Low Noise, Low Drift, Monolithic Dual N-Channel JFET The LSU402 is a high-performance monolithic dual JFET featuring extremely low noise, tight offset voltage and low drift over temperature specifications, and is targeted for use in a wide range of precision instrumentation applications. The LSU402 features a 5mV offset and 10-µV/°C drift. The LSU402 is a direct replacement for discontinued Siliconix LSU402. The 8 Pin P-DIP and 8 Pin SOIC provide ease of manufacturing, and the symmetrical pinout prevents improper orientation. (See Packaging Information). LSU402 Applications: Wideband Differential Amps High-Speed,Temp-Compensated Single-Ended Input Amps High-Speed Comparators Impedance Converters and vibrations detectors. ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted) SYMBOL CHARACTERISTICS MIN. BVGSS Breakdown Voltage 50 BVGGO Gate‐To‐Gate Breakdown ±50 TRANSCONDUCTANCE YfSS Full Conduction 2000 YfS Typical Operation 1000 |YFS1‐2 / Y FS| Mismatch ‐‐ DRAIN CURRENT IDSS Full Conduction 0.5 |IDSS1‐2 / IDSS| Mismatch at Full Conduction ‐‐ GATE VOLTAGE VGS(off) or Vp Pinchoff voltage ‐0.5 VGS(on) Operating Range ‐‐ GATE CURRENT ‐IGmax. Operating ‐‐ ‐IGmax. High Temperature ‐‐ ‐IGSSmax. At Full Conduction ‐‐ ‐IGSSmax. High Temperature 5 OUTPUT CONDUCTANCE YOSS Full Conduction ‐‐ YOS Operating ‐‐ COMMON MODE REJECTION CMR ‐20 log | V GS1‐2/ V DS| 95 NOISE NF Figure ‐‐ en Voltage ‐‐ CAPACITANCE CISS Input ‐‐ CRSS Reverse Transfer ‐‐ FEATURES LOW DRIFT LOW NOISE LOW PINCHOFF ABSOLUTE MAXIMUM RATINGS @ 25°C (unless otherwise noted) | V GS1‐2 / T| = 10µV/°C TYP. en = 6nV/Hz @ 10Hz TYP. Vp = 2.5V TYP. Maximum Temperatures Storage Temperature ‐65°C to +150°C Operating Junction Temperature +150°C Maximum Voltage and Current for Each Transistor – Note 1 ‐VGSS Gate Voltage to Drain or Source 50V ‐VDSO Drain to Source Voltage 50V ‐IG(f) Gate Forward Current 10mA Maximum Power Dissipation Device Dissipation @ Free Air – Total 300mW MATCHING CHARACTERISTICS @ 25°C UNLESS OTHERWISE NOTED SYMBOL CHARACTERISTICS VALUE UNITS CONDITIONS | V GS1‐2 / T| max. DRIFT VS. 10 µV/°C VDG=10V, ID=200µA TEMPERATURE TA=‐55°C to +125°C | V GS1‐2 | max. OFFSET VOLTAGE 10 mV VDG=10V, ID=200µA TYP. 60 ‐‐ MAX. ‐‐ ‐‐ UNITS V V CONDITIONS VDS = 0 ID=1nA I G= 1nA ID= 0 I S= 0 ‐‐ ‐‐ 0.6 7000 2000 3 µmho µmho % VDG= 10V VDG= 15V ‐‐ 1 10 5 mA % VDG= 10V VGS= 0V ‐‐ ‐‐ ‐2.5 ‐2.3 V V VDS= 15V VDS=15V ID= 1nA ID=200µA ‐4 ‐‐ ‐‐ 5 ‐15 ‐10 100 5 pA nA pA pA ‐‐ 0.2 20 2 µmho µmho ‐‐ ‐‐ dB ‐‐ 20 0.5 ‐‐ dB nV/√Hz ‐‐ ‐‐ 8 1.5 pF pF Click To Buy Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired PDIP / SOIC (Top View) VGS= 0V f = 1kHz ID= 200µA f = 1kHz VDG= 15V ID= 200µA TA= +125°C VDS =0 VDG= 15V TA= +125°C VDG= 10V VDG= 15V VGS= 0V ID= 500µA VDS = 10 to 20V ID=30µA VDS= 15V VGS= 0V RG= 10M f= 100Hz NBW= 6Hz VDS=15V ID=200µA f=10Hz NBW=1Hz VDS= 15V ID= 200µA f= 1MHz Micross Components Europe Available Packages: LSU402 in PDIP / SOIC LSU402 available as bare die Please contact Micross for full package and die dimensions Tel: +44 1603 788967 Email: [email protected] Web: http://www.micross.com/distribution Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.