HGTG15N120C3, HGTP15N120C3, HGT1S15N120C3, HGT1S15N120C3S 35A, 1200V, UFS Series N-Channel IGBTs June 1997 Features Description • 35A, 1200V, TC = 25oC The HGTG15N120C3, HGTP15N120C3, HGT1S15N120C3 and HGT1S15N120C3S are MOS gated high voltage switching devices combining the best features of MOSFETs and bipolar transistors. These devices have the high input impedance of a MOSFET and the low on-state conduction loss of a bipolar transistor. The much lower on-state voltage drop varies only moderately between 25oC and 150oC. • 1200V Switching SOA Capability • Typical Fall Time . . . . . . . . . . . . . . 350ns at TJ = 150oC • Short Circuit Rating • Low Conduction Loss The IGBT is ideal for many high voltage switching applications operating at moderate frequencies where low conduction losses are essential, such as: AC and DC motor controls, power supplies and drivers for solenoids, relays and contactors. Ordering Information PART NUMBER PACKAGE BRAND HGTG15N120C3 TO-247 15N120C3 HGTP15N120C3 TO-220AB 15N120C3 HGT1S15N120C3 TO-262AA 15N120C3 HGT1S15N120C3S TO-263AB 15N120C3 Symbol C NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263 variant in tape and reel; i.e., HGT1S15N120C3S9A. G E Formerly Developmental Type TA49145. Packaging JEDEC STYLE TO-247 JEDEC TO-220AB (ALTERNATE VERSION) EMITTER COLLECTOR GATE EMITTER COLLECTOR GATE COLLECTOR (FLANGE) COLLECTOR (FLANGE) JEDEC TO-262AA JEDEC TO-263AB EMITTER COLLECTOR GATE M A A COLLECTOR (FLANGE) A GATE COLLECTOR (FLANGE) EMITTER INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS 4,364,073 4,587,713 4,641,162 4,794,432 4,860,080 4,969,027 4,417,385 4,598,461 4,644,637 4,801,986 4,883,767 4,430,792 4,605,948 4,682,195 4,803,533 4,888,627 4,443,931 4,618,872 4,684,413 4,809,045 4,890,143 4,466,176 4,620,211 4,694,313 4,809,047 4,901,127 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 1 4,516,143 4,631,564 4,717,679 4,810,665 4,904,609 4,532,534 4,639,754 4,743,952 4,823,176 4,933,740 4,567,641 4,639,762 4,783,690 4,837,606 4,963,951 File Number 4244.3 HGTG15N120C3, HGTP15N120C3, HGT1S15N120C3, HGT1S15N120C3S Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified HGTG15N120C3, HGTP15N120C3, HGT1S15N120C3S, HGT1S15N120C3S UNITS 1200 V At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25 35 A At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110 15 A Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ICM 120 A Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BVCES Collector Current Continuous Gate to Emitter Voltage Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES ±20 V Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM ±30 V Switching Safe Operating Area at TJ = 150oC, Figure 14 . . . . . . . . . . . . . . SSOA 15A at 1200V Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 164 W Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.32 W/oC Reverse Voltage Avalanche Energy. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EARV 100 mJ Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 260 oC Short Circuit Withstand Time (Note 2) at VGE = 15V . . . . . . . . . . . . . . . . . . . . tSC 6 µs Short Circuit Withstand Time (Note 2) at VGE = 10V . . . . . . . . . . . . . . . . . . . . tSC 25 µs CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Pulse width limited by maximum junction temperature. 2. VCE(PK) = 720V, TJ = 125oC, RGE = 25Ω. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Collector to Emitter Breakdown Voltage BVCES IC = 250µA, VGE = 0V 1200 - - V Emitter to Collector Breakdown Voltage BVECS IC = 10mA, VGE = 0V 15 25 - V - - 250 µA - - 3.0 mA - 2.3 3.5 V Collector to Emitter Leakage Current ICES VCE = BVCES Collector to Emitter Saturation Voltage VCE(SAT) IC = IC110, VGE = 15V Gate to Emitter Threshold Voltage VGE(TH) IC = 250µA, VCE = VGE Gate to Emitter Leakage Current Switching SOA Gate to Emitter Plateau Voltage On-State Gate Charge Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time IGES SSOA VGEP TC = 25oC TC = 150oC TC = 25oC TC = 150oC - 2.4 3.2 V 4.0 5.6 7.5 V - - ±100 nA VCE(PK) = 960V 40 - - A VCE(PK) = 1200V 15 - - A VGE = ±20V TJ = 150oC, RG = 10Ω VGE = 15V, L = 1mH IC = IC110, VCE = 0.5 BVCES - 8.8 - V Qg(ON) IC = IC110, VCE = 0.5 BVES VGE = 15V - 75 100 nC VGE = 20V - 100 130 nC td(ON)I TJ = 150oC ICE = IC110 VCE(PK) = 0.8 BVCES VGE = 15V RG = 10Ω trI td(OFF)I - 17 - ns - 25 - ns - 470 550 ns Current Fall Time t fI - 350 400 ns Turn-On Energy EON - 2100 - µJ Turn-Off Energy (Note 3) EOFF - 4700 - µJ Thermal Resistance RθJC - - 0.76 oC/W L = 1mH NOTE: 3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. Turn-On losses include losses due to diode recovery. 2 HGTG15N120C3, HGTP15N120C3, HGT1S15N120C3, HGT1S15N120C3S 100 ICE, COLLECTOR TO EMITTER CURRENT (A) DUTY CYCLE <0.5%, VCE = 10V PULSE DURATION = 250µs 80 TC = -55oC 60 TC = 150oC 40 TC = 25oC 20 0 8 6 12 10 14 80 DUTY CYCLE <0.5%, TC = 25oC PULSE DURATION = 250µs 60 40 20 0 0 VGE , GATE TO EMITTER VOLTAGE (V) ICE, COLLECTOR TO EMITTER CURRENT (A) ICE, COLLECTOR TO EMITTER CURRENT (A) PULSE DURATION = 250µs DUTY CYCLE <0.5%, VGE = 10V TC = 25oC 15 TC = 150oC 5 0 0 2 4 8 6 VCE, COLLECTOR TO EMITTER VOLTAGE (V) tSC , SHORT CIRCUIT WITHSTAND TIME (µs) ICE , DC COLLECTOR CURRENT (A) 25 20 15 10 5 125 80 TC = 25oC 60 TC = 150oC 40 20 0 2 4 6 8 10 FIGURE 4. COLLECTOR TO EMITTER ON-STATE VOLTAGE 30 100 10 VCE, COLLECTOR TO EMITTER VOLTAGE (V) VGE = 15V 75 8 PULSE DURATION = 250µs DUTY CYCLE <0.5%, VGE = 15V 0 35 50 6 100 10 FIGURE 3. COLLECTOR TO EMITTER ON-STATE VOLTAGE 0 25 4 FIGURE 2. SATURATION CHARACTERISTICS 25 10 2 VCE, COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 1. TRANSFER CHARACTERISTICS 20 VGE = 15V 12V 10V 9V 8.5V 8V 150 TC , CASE TEMPERATURE (oC) FIGURE 5. DC COLLECTOR CURRENT AS A FUNCTION OF CASE TEMPERATURE 35 150 VCE = 720V, RGE = 25Ω, TJ = 125oC 125 30 ISC 25 100 20 75 15 10 50 tSC 10 13 11 12 14 VGE , GATE TO EMITTER VOLTAGE (V) 15 FIGURE 6. SHORT CIRCUIT WITHSTAND TIME 3 25 ISC, PEAK SHORT CIRCUIT CURRENT(A) ICE, COLLECTOR TO EMITTER CURRENT (A) Typical Performance Curves HGTG15N120C3, HGTP15N120C3, HGT1S15N120C3, HGT1S15N120C3S Typical Performance Curves 600 TJ = 150oC, RG = 10Ω, L = 1mH, VCE(PK) = 960V td(OFF)I , TURN-OFF DELAY TIME (ns) td(ON)I , TURN-ON DELAY TIME (ns) 100 (Continued) 50 VGE = 10V 30 20 VGE = 15V 10 5 10 15 20 400 VGE = 10V or 15V 300 200 100 25 TJ = 150oC, RG = 10Ω, L = 1mH, VCE(PK) = 960V 500 5 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 7. TURN-ON DELAY TIME AS A FUNCTION OF COLLECTOR TO EMITTER CURRENT 300 500 TJ = 150oC, RG = 10Ω, L = 1mH, VCE(PK) = 960V tfI , FALL TIME (ns) trI , TURN-ON RISE TIME (ns) 10 10 15 20 ICE , COLLECTOR TO EMITTER CURRENT (A) 5 10 15 20 25 ICE , COLLECTOR TO EMITTER CURRENT (A) 30 FIGURE 10. TURN-OFF FALL TIME AS A FUNCTION OF COLLECTOR TO EMITTER CURRENT 16 TJ = 150oC, RG = 10Ω, L = 1mH, VCE(PK) = 960V EOFF , TURN-OFF ENERGY LOSS (mJ) EON , TURN-ON ENERGY LOSS (mJ) VGE = 15V 200 25 FIGURE 9. TURN-ON RISE TIME AS A FUNCTION OF COLLECTOR TO EMITTER CURRENT 8 VGE = 10V 6 4 0 30 300 100 5 25 TJ = 150oC, RG = 10Ω, L = 1mH, VCE(PK) = 960V VGE = 10V VGE = 15V VGE = 15V 2 20 400 100 10 15 FIGURE 8. TURN-OFF DELAY TIME AS A FUNCTION OF COLLECTOR TO EMITTER CURRENT VGE = 10V 1 10 ICE , COLLECTOR TO EMITTER CURRENT (A) TJ = 150oC, RG = 10Ω, L = 1mH, VCE(PK) = 960V 14 12 VGE = 10V 10 VGE = 15V 8 6 4 2 0 5 10 15 20 ICE , COLLECTOR TO EMITTER CURRENT (A) 5 25 FIGURE 11. TURN-ON ENERGY LOSS AS A FUNCTION OF COLLECTOR TO EMITTER CURRENT 10 15 20 25 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 12. TURN-OFF ENERGY LOSS AS A FUNCTION OF COLLECTOR TO EMITTER CURRENT 4 30 HGTG15N120C3, HGTP15N120C3, HGT1S15N120C3, HGT1S15N120C3S fMAX , OPERATING FREQUENCY (kHz) 100 (Continued) ICE, COLLECTOR TO EMITTER CURRENT (A) Typical Performance Curves TJ = 150oC, TC = 75oC, RG = 10Ω L = 1mH, VCE(PK) = 960V 30 20 VGE = 15V VGE = 10V 10 fMAX1 = 0.05/(td(OFF)I + td(ON)I) fMAX2 = (PD - PC)/(EON + EOFF) PD = ALLOWABLE DISSIPATION PC = CONDUCTION DISSIPATION (DUTY FACTOR = 50%) RθJC = 0.76oC/W 1 5 10 20 ICE, COLLECTOR TO EMITTER CURRENT (A) 50 40 30 20 10 0 25 0 4000 FREQUENCY = 1MHz 3500 C, CAPACITANCE (pF) CIES 3000 2500 2000 1500 1000 0 COES CRES 200 400 600 800 1000 1200 VCE(PK), COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 14. SWITCHING SAFE OPERATING AREA VGE, GATE TO AEMITTER VOLTAGE (V) FIGURE 13. OPERATING FREQUENCY AS A FUNCTION OF COLLECTOR TO EMITTER CURRENT 500 TJ = 150oC, VGE = 15V, RG = 10Ω 14 IG(REF) = 4.21mA, RL = 80Ω, TC = 25oC 12 VCE = 1200V 10 8 VCE = 400V VCE = 800V 6 4 2 0 0 5 10 15 20 VCE, COLLECTOR TO EMITTER VOLTAGE (V) 0 25 ZθJC , NORMALIZED THERMAL IMPEDANCE 10-1 80 120 160 Qg , GATE CHARGE (nC) FIGURE 15. CAPACITANCE AS A FUNCTION OF COLLECTOR TO EMITTER VOLTAGE 100 40 FIGURE 16. GATE CHARGE WAVEFORMS DUTY CYCLE - DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01 t1 PD t2 10-2 SINGLE PULSE 10-3 10-5 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZθJC X RθJC) + TC 10-4 10-3 10-2 10-1 t1 , RECTANGULAR PULSE DURATION (s) 100 FIGURE 17. IGBT NORMALIZED TRANSIENT THERMAL IMPEDANCE, JUNCTION TO CASE 5 101 HGTG15N120C3, HGTP15N120C3, HGT1S15N120C3, HGT1S15N120C3S Test Circuit and Waveforms 90% L = 1mH 10% VGE RHRP15120 EON EOFF VCE RG = 10Ω 90% + - VDD = 960V ICE 10% td(OFF)I tfI trI td(ON)I FIGURE 18. INDUCTIVE SWITCHING TEST CIRCUIT FIGURE 19. SWITCHING TEST WAVEFORMS Handling Precautions for IGBT’s Operating Frequency Information Insulated Gate Bipolar Transistors are susceptible to gateinsulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler’s body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: Operating frequency information for a typical device (Figure 13) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (ICE) plots are possible using the information shown for a typical unit in Figures 4, 7, 8, 11 and 12. The operating frequency plot (Figure 13) of a typical device shows fMAX1 or fMAX2 whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. Other definitions are possible. td(OFF)I and td(ON)I are defined in Figure 19. Device turn-off delay can establish an additional frequency limiting condition for an application other than TJMAX. td(OFF)I is important when controlling output ripple under a lightly loaded condition. 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as “ECCOSORBD LD26™” or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. fMAX2 is defined by fMAX2 = (PD - PC)/ (EOFF + EON). The allowable dissipation (PD) is defined by PD = (TJMAX TC) / RθJC. The sum of device switching and conduction losses must not exceed PD. A 50% duty factor was used (Figure 13) and the conduction losses (PC) are approximated by PC = (VCE x ICE) / 2. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating - Never exceed the gate-voltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. EON and EOFF are defined in the switching waveforms shown in Figure 19. EON is the integral of the instantaneous power loss (ICE x VCE) during turn-on and EOFF is the integral of the instantaneous power loss (ICE x VCE) during turnoff. All tail losses are included in the calculation for EOFF; i.e. the collector current equals zero (ICE = 0). 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. Gate Protection - These devices do not have an internal monolithic zener diode from gate to emitter. If gate protection is required an external zener is recommended. ECCOSORBD is a Trademark of Emerson and Cumming, Inc. 6 HGTG15N120C3, HGTP15N120C3, HGT1S15N120C3, HGT1S15N120C3S TO-247 3 LEAD JEDEC STYLE TO-247 PLASTIC PACKAGE A E TERM. 4 ØS INCHES ØP SYMBOL Q ØR D L1 MILLIMETERS MIN MAX NOTES A 0.180 0.190 4.58 4.82 - b 0.046 0.051 1.17 1.29 2, 3 b1 0.060 0.070 1.53 1.77 1, 2 b2 0.095 0.105 2.42 2.66 1, 2 c 0.020 0.026 0.51 0.66 1, 2, 3 0.800 0.820 20.32 20.82 - b1 E 0.605 0.625 15.37 15.87 b2 e c e1 b 2 MAX D L 1 MIN 3 3 e J1 0.219 TYP 0.438 BSC - 5.56 TYP 4 11.12 BSC 4 J1 0.090 0.105 2.29 2.66 1 L 0.620 0.640 15.75 16.25 - BACK VIEW L1 0.145 0.155 3.69 3.93 1 ØP 0.138 0.144 3.51 3.65 - Q 0.210 0.220 5.34 5.58 - 2 e1 5 LEAD NO. 1 - GATE ØR 0.195 0.205 4.96 5.20 - LEAD NO. 2 - COLLECTOR ØS 0.260 0.270 6.61 6.85 - LEAD NO. 3 - EMITTER TERM. 4 MOUNTING FLANGE - COLLECTOR NOTES: 1. Lead dimension and finish uncontrolled in L1. 2. Lead dimension (without solder). 3. Add typically 0.002 inches (0.05mm) for solder coating. 4. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 5. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 6. Controlling dimension: Inch. 7. Revision 1 dated 1-93. 7 HGTG15N120C3, HGTP15N120C3, HGT1S15N120C3, HGT1S15N120C3S TO-220AB (Alternate Version) 3 LEAD JEDEC TO-220AB PLASTIC PACKAGE A E ØP INCHES A1 SYMBOL Q H1 TERM. 4 D L1 b1 c 2 3 J1 e e1 LEAD NO. 1 - GATE LEAD NO. 2 - COLLECTOR LEAD NO. 3 - EMITTER TERM. 4 - COLLECTOR MAX NOTES 0.170 0.180 4.32 4.57 - 0.048 0.052 1.22 1.32 2, 4 b 0.030 0.034 0.77 0.86 2, 4 b1 0.045 0.055 1.15 1.39 2, 4 c 0.018 0.022 0.46 0.55 2, 4 D 0.590 0.610 14.99 15.49 - E 0.395 0.405 10.04 10.28 H1 1 MILLIMETERS MIN A e1 60o MAX A1 e b L MIN 0.100 TYP 0.200 BSC 0.235 0.255 - 2.54 TYP 5 5.08 BSC 5 5.97 6.47 - J1 0.095 0.105 2.42 2.66 6 L 0.530 0.550 13.47 13.97 - L1 0.110 0.130 2.80 3.30 3 ØP 0.149 0.153 3.79 3.88 - Q 0.105 0.115 2.66 2.92 - NOTES: 1. These dimensions are within allowable dimensions of Rev. J of JEDEC TO-220AB outline dated 3-24-87. 2. Dimension (without solder). 3. Solder finish uncontrolled in this area. 4. Add typically 0.002 inches (0.05mm) for solder plating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 2 dated 10-95. 8 HGTG15N120C3, HGTP15N120C3, HGT1S15N120C3, HGT1S15N120C3S TO-262AA 3 LEAD JEDEC TO-262AA PLASTIC PACKAGE E INCHES A 15o SYMBOL A1 H1 TERM. 4 D L1 b1 c 1 2 3 e J1 - GATE LEAD NO. 2 - COLLECTOR LEAD NO. 3 - EMITTER TERM. 4 - COLLECTOR NOTES 0.170 0.180 4.32 4.57 - 0.052 1.22 1.32 3, 4 b 0.030 0.034 0.77 0.86 3, 4 b1 0.045 0.055 1.15 1.39 3, 4 c 0.018 0.022 0.46 0.55 3, 4 D 0.405 0.425 10.29 10.79 - E 0.395 0.405 10.04 10.28 0.100 TYP 0.200 BSC 0.045 0.055 - 2.54 TYP 5 5.08 BSC 5 1.15 1.39 - J1 0.095 0.105 2.42 2.66 6 L 0.530 0.550 13.47 13.97 - L1 0.110 0.130 2.80 3.30 2 NOTES: 1. These dimensions are within allowable dimensions of Rev. A of JEDEC TO-262AA outline dated 6-90. 2. Solder finish uncontrolled in this area. 3. Dimension (without solder). 4. Add typically 0.002 inches (0.05mm) for solder plating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 4 dated 10-95. e1 LEAD NO. 1 MAX 0.048 H1 60o MILLIMETERS MIN A e1 L MAX A1 e b MIN 9 HGTG15N120C3, HGTP15N120C3, HGT1S15N120C3, HGT1S15N120C3S TO-263AB SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE E INCHES A A1 SYMBOL H1 TERM. 4 D L2 L1 L 1 3 b b1 e c e1 J1 .450 (11.43) TERM. 4 L3 .350 (8.89) b2 .700 (17.78) 3 .150 (3.81) .080(2.03) .062(1.58) .062(1.58) MINIMUM PAD SIZE RECOMMENDED FOR SURFACE-MOUNTED APPLICATIONS LEAD NO. 1 - GATE LEAD NO. 3 - EMITTER TERM. 4 - COLLECTOR MILLIMETERS MAX MIN MAX NOTES A 0.170 0.180 4.32 4.57 - A1 0.048 0.052 1.22 1.32 4, 5 b 0.030 0.034 0.77 0.86 4, 5 b1 0.045 0.055 1.15 1.39 4, 5 b2 0.310 - 7.88 - 2 c 0.018 0.022 0.46 0.55 4, 5 D 0.405 0.425 10.29 10.79 - E 0.395 0.405 10.04 10.28 - e 0.100 TYP 2.54 TYP 7 e1 0.200 BSC 5.08 BSC 7 H1 0.045 0.055 1.15 1.39 - J1 0.095 0.105 2.42 2.66 - L 0.175 0.195 4.45 4.95 - L1 0.090 0.110 2.29 2.79 4, 6 L2 0.050 0.070 1.27 1.77 3 L3 0.315 - 8.01 - 2 NOTES: 1. These dimensions are within allowable dimensions of Rev. C of JEDEC TO-263AB outline dated 2-92. 2. L3 and b2 dimensions established a minimum mounting surface for terminal 4. 3. Solder finish uncontrolled in this area. 4. Dimension (without solder). 5. Add typically 0.002 inches (0.05mm) for solder plating. 6. L1 is the terminal length for soldering. 7. Position of lead to be measured 0.120 inches (3.05mm) from bottom of dimension D. 8. Controlling dimension: Inch. 9. Revision 7 dated 10-95. 1 .080(2.03) MIN 10 HGTG15N120C3, HGTP15N120C3, HGT1S15N120C3, HGT1S15N120C3S TO-263AB 24mm TAPE AND REEL 40mm MIN. ACCESS HOLE 4.0mm 1.5mm DIA. HOLE 2.0mm 30.4mm 13mm 330mm 1.75mm C L 24mm 100mm 16mm 24.4mm USER DIRECTION OF FEED COVER TAPE GENERAL INFORMATION 1. USE "9A" SUFFIX ON PART NUMBER. 2. 800 PIECES PER REEL. 3. ORDER IN MULTIPLES OF FULL REELS ONLY. 4. MEETS EIA-481 REVISION "A" SPECIFICATIONS. Revision 7 dated 10-95 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. 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