ON NCP705MT18TCG Ldo voltage regulator Datasheet

NCP705
500 mA, Ultra-Low
Quiescent Current, IQ 13 mA,
Ultra-Low Noise, LDO
Voltage Regulator
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Noise sensitive RF applications such as Power Amplifiers in
satellite radios, infotainment equipment, and precision
instrumentation require very clean power supplies. The NCP705 is
500 mA LDO that provides the engineer with a very stable, accurate
voltage with ultra low noise and very high Power Supply Rejection
Ratio (PSRR) suitable for RF applications. The device doesn’t require
any additional noise bypass capacitor to achieve ultra−low noise
performance. In order to optimize performance for battery operated
portable applications, the NCP705 employs dynamic Iq management
for ultra−low quiescent current consumption at light−load conditions
and great dynamic performance.
MARKING
DIAGRAM
1
WDFN6
CASE 511BR
XX M
XX = Specific Device Code
M = Date Code
PIN CONNECTIONS
Features
• Operating Input Voltage Range: 2.5 V to 5.5 V
• Available − Fixed Voltage Option: 0.8 V to 3.5 V
•
•
•
•
•
•
•
•
•
•
•
Available − Adjustable Voltage Option: 0.8 V to 5.5 V−VDROP
Reference Voltage 0.8 V
Ultra−Low Quiescent Current of Typ. 13 mA
Ultra−Low Noise: 12 mVRMS from 100 Hz to 100 kHz
Very Low Dropout: 230 mV Typical at 500 mA
±2% Accuracy Over Load/Line/Temperature
High PSRR: 71 dB at 1 kHz
Internal Soft−Start to Limit the Turn−On Inrush Current
Thermal Shutdown and Current Limit Protections
Stable with a 1 mF Ceramic Output Capacitor
Active Output Discharge for Fast Turn−Off
These are Pb−Free Devices
OUT
1
N/C
2
GND
3
GND
6 IN
OUT
1
5 N/C
ADJ
2
4 EN
GND
3
WDFN6 2x2 mm
(Top View)
6 IN
GND
5 N/C
4 EN
Adjustable Version
(Top View)
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 19 of this data sheet.
Typical Applications
•
•
•
•
PDAs, Mobile Phones, GPS, Smartphones
Wireless Handsets, Wireless LAN, Bluetooth®, ZigBee®
Portable Medical Equipment
Other Battery Powered Applications
VIN
IN
CIN
1 mF
ON
OFF
OUT
NCP705
EN
N/C
GND
VIN
VOUT
1 mF CIN
COUT
1 mF
OUT
NCP705
EN
ADJ
ON
GND
VOUT
IN
OFF
R1 C1
COUT
1 mF
R2
Fixed Voltage Version
Adjustable Voltage Version
Figure 1. Typical Application Schematics
© Semiconductor Components Industries, LLC, 2014
December, 2017 − Rev. 8
1
Publication Order Number:
NCP705/D
NCP705
IN
ENABLE
LOGIC
EN
BANDGAP
REFERENCE
UVLO
INTEGRATED
SOFT−START
THERMAL
SHUTDOWN
MOSFET
DRIVER WITH
CURRENT LIMIT
OUT
AUTO LOW
POWER MODE
ACTIVE
DISCHARGE
EN
GND
IN
ENABLE
LOGIC
EN
BANDGAP
REFERENCE
UVLO
INTEGRATED
SOFT−START
THERMAL
SHUTDOWN
MOSFET
DRIVER WITH
CURRENT LIMIT
OUT
AUTO LOW
POWER MODE
ACTIVE
DISCHARGE
ADJ
EN
GND
Figure 2. Simplified Schematic Block Diagrams
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NCP705
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
Pin Name −
Fixed
Pin Name −
Adjustable
1
OUT
OUT
Regulated output voltage pin. A small 1 mF ceramic capacitor is needed from this pin to
ground to assure stability.
2
N/C
ADJ
Feedback pin for set−up output voltage. Use resistor divider for voltage selection.
3
GND
GND
Power supply ground. Expose pad must be tied with GND pin. Soldered to the copper
plane allows for effective heat dissipation.
4
EN
EN
Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts
the regulator into shutdown mode.
5
N/C
N/C
Not connected. This pin can be tied to ground to improve thermal dissipation.
6
IN
IN
Description
Input pin. A small capacitor is needed from this pin to ground to assure stability.
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VIN
−0.3 V to 6 V
V
Output Voltage
VOUT
−0.3 V to VIN + 0.3 V
V
Enable Input
VEN
−0.3 V to VIN + 0.3 V
V
Adjustable Input
VADJ
−0.3 V to VIN + 0.3 V
V
tSC
Indefinite
s
TJ(MAX)
150
°C
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Input Voltage (Note 1)
Output Short Circuit Duration
Maximum Junction Temperature
Storage Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
Table 3. THERMAL CHARACTERISTICS (Note 3)
Rating
Thermal Characteristics, WDFN6 2x2 mm
Thermal Resistance, Junction−to−Air
Thermal Resistance Parameter, Junction−to−Board
3. Single component mounted on 1 oz, FR 4 PCB with 645 mm2 Cu area.
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3
Symbol
Value
qJA
YJB
116.5
30
Unit
°C/W
NCP705
Table 4. ELECTRICAL CHARACTERISTICS
−40°C ≤ TJ ≤ 125°C; VIN = VOUT(NOM) + 0.5 V or 2.5 V, whichever is greater; VEN = 0.9 V, IOUT = 10 mA, CIN = COUT = 1 mF unless
otherwise noted. Typical values are at TJ = +25°C. (Note 4)
Parameter
Test Conditions
Operating Input Voltage
Output Voltage Range (Adjustable)
Symbol
Min
Max
Unit
VIN
2.5
5.5
V
VOUT
0.8
5.5−
VDO
V
1.9
V
+2
%
Undervoltage Lock−out
VIN rising
UVLO
1.2
Output Voltage Accuracy (Fixed)
VOUT + 0.5 V ≤ VIN ≤ 5.5 V, IOUT = 0 − 500 mA
VOUT
−2
Reference Voltage
Typ
VREF
VREF
1.6
0.8
Reference Voltage Accuracy
IOUT = 10 mA
Line Regulation
VOUT + 0.5 V ≤ VIN ≤ 4.5 V, IOUT = 10 mA
VOUT + 0.5 V ≤ VIN ≤ 5.5 V, IOUT = 10 mA
RegLINE
550
750
mV/V
Load Regulation
IOUT = 0 mA to 500 mA
RegLOAD
12
mV/mA
Load Transient
IOUT = 1 mA to 500 mA or 500 mA to 1 mA in
1 ms, COUT = 1 mF
TranLOAD
±120
mV
Dropout Voltage (Note 5)
IOUT = 500 mA, VOUT(nom) = 2.8 V
VDO
230
350
mV
Output Current Limit
VOUT = 90% VOUT(nom)
ICL
510
750
950
mA
600
750
950
IQ
13
25
NCP705
NCP705E
(0°C ≤ TJ ≤ 70°C)
−2
V
+2
%
mA
Quiescent Current
IOUT = 0 mA
Ground Current
IOUT = 500 mA
IGND
260
mA
Shutdown Current
VEN ≤ 0.4 V, TJ = +25°C
IDIS
0.12
mA
VEN ≤ 0 V, VIN = 2.0 to 4.5 V, TJ = −40 to +85°C
IDIS
0.55
EN Pin Threshold Voltage
High Threshold
Low Threshold
VEN Voltage increasing
VEN Voltage decreasing
EN Pin Input Current
VEN = 5.5 V
ADJ Pin Current
VADJ = 0.8 V
Turn−On Time
COUT = 1.0 mF, from assertion EN pin to 98%
VOUT(nom)
Power Supply Rejection Ratio
VIN = 3.8 V, VOUT = 2.8 V
(Fixed), IOUT = 500 mA
Output Noise Voltage
VOUT = 2.5 V (Fixed), VIN = 3.5 V, IOUT = 500 mA
f = 100 Hz to 100 kHz
Thermal Shutdown Temperature
Temperature increasing from TJ = +25°C
TSD
Thermal Shutdown Hysteresis
Temperature falling from TSD
TSDH
2
mA
V
VEN_HI
VEN_LO
0.9
0.4
IEN
f = 100 Hz
f = 1 kHz
f = 10 kHz
100
500
nA
1
nA
tON
150
ms
PSRR
73
71
56
dB
VN
12
mVrms
°C
160
−
20
−
°C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TJ = TA
= 25_C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
5. Characterized when VOUT falls 100 mV below the regulated voltage at VIN = VOUT(NOM) + 0.5 V.
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NCP705
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE NOISE (mV/rtHz)
10
1
IOUT = 10 mA
IOUT
IOUT = 500 mA
0.1
0.01
VIN = 2.5 V
VOUT = 0.8 V
CIN = COUT = 1 mF
MLCC, X7R,
1206 size
0.001
0.01
0.1
IOUT = 100 mA
RMS Output Noise (mV)
10 Hz − 100 kHz
100 Hz − 100 kHz
18.21
10 mA
19.06
100 mA
15.99
15.04
300 mA
14.42
13.39
500 mA
13.70
12.60
IOUT = 300 mA
1
100
10
1000
FREQUENCY (kHz)
Figure 3. Output Voltage Noise Spectral Density for VOUT = 0.8 V, COUT = 1 mF
OUTPUT VOLTAGE NOISE (mV/rtHz)
10
IOUT = 100 mA
1
IOUT = 10 mA
IOUT
0.1
0.01
VIN = 2.5 V
VOUT = 0.8 V
CIN = 1 mF
COUT = 10 mF
MLCC, X7R,
1206 size
0.001
0.01
IOUT = 500 mA
RMS Output Noise (mV)
10 Hz − 100 kHz
100 Hz − 100 kHz
15.28
10 mA
16.17
100 mA
16.41
15.65
300 mA
14.94
14.10
500 mA
14.08
13.11
IOUT = 300 mA
0.1
1
10
100
1000
FREQUENCY (kHz)
Figure 4. Output Voltage Noise Spectral Density for VOUT = 0.8 V, COUT = 10 mF
OUTPUT VOLTAGE NOISE (mV/rtHz)
10
1
IOUT = 100 mA
IOUT
IOUT = 300 mA
0.1
0.01
10 mA
VIN = 3.8 V
VOUT = 3.3 V
CIN = COUT = 1 mF
MLCC, X7R,
1206 size
0.001
0.01
0.1
IOUT = 500 mA
RMS Output Noise (mV)
10 Hz − 100 kHz
100 Hz − 100 kHz
18.12
15.39
100 mA
16.42
13.50
300 mA
16.35
12.47
500 mA
16.00
12.10
IOUT = 10 mA
1
10
100
1000
FREQUENCY (kHz)
Figure 5. Output Voltage Noise Spectral Density for VOUT = 3.3 V, COUT = 1 mF
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NCP705
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE NOISE (mV/rtHz)
10
IOUT = 300 mA
1
IOUT = 10 mA
IOUT
IOUT = 100 mA
0.1
0.01
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 10 mF
MLCC, X7R,
1206 size
0.001
0.01
RMS Output Noise (mV)
10 Hz − 100 kHz
100 Hz − 100 kHz
14.07
1 mA
17.35
100 mA
17.43
14.29
300 mA
16.55
13.33
500 mA
16.48
13.20
IOUT = 500 mA
0.1
1
10
100
1000
FREQUENCY (kHz)
Figure 6. Output Voltage Noise Spectral Density for VOUT = 3.3 V, COUT = 10 mF
OUTPUT VOLTAGE NOISE (mV/rtHz)
10
VOUT = 3.3 V, R1 = 25k,
R2 = 8.2k
1
VOUT
0.1
0.01
VOUT = 1.5 V, R1 = 15k,
R2 = 13k
RMS Output Noise (mV)
10 Hz − 100 kHz
100 Hz − 100 kHz
1.5 V
31.40
30.33
3.3 V
49.14
44.30
VIN = VOUT +1 V
CIN = 1 mF
COUT = 10 mF
IOUT = 10 mA
0.001
0.01
0.1
1
10
100
1000
FREQUENCY (kHz)
Figure 7. Output Voltage Noise Spectral Density for Adjustable Version – Different Output Voltage
OUTPUT VOLTAGE NOISE (mV/rtHz)
10
C1 = none
C1 = 100 pF
1
C1 = 1 nF
C1 = 10 nF
IOUT
0.1
0.01
VIN = 4.3 V
VOUT = 3.3 V
R1 = 255k, R2 = 82k
CIN = COUT = 1 mF
IOUT = 10 mA
0.001
0.01
0.1
1
10
100
RMS Output Noise (mV)
10 Hz − 100 kHz
100 Hz − 100 kHz
none
50.17
43.85
100 pF
46.90
40.39
1 nF
36.92
27.99
10 nF
27.02
18.31
1000
FREQUENCY (kHz)
Figure 8. Output Voltage Noise Spectral Density for Adjustable Version for Various C1
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NCP705
TYPICAL CHARACTERISTICS
160
400
350
IGND, GROUND CURRENT (mA)
IGND, GROUND CURRENT (mA)
450
VOUT = 0.8 V
300
VOUT = 3.3 V
250
VOUT = 2.5 V
200
150
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
100
50
0
0
50
VOUT = 0.8 V
80
60
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
40
20
0
0.25
0.5
0.75
1
1.25
1.5
1.75
IOUT, OUTPUT CURRENT (mA)
Figure 9. Ground Current vs. Output Current
Figure 10. Ground Current vs. Output Current
from 0 mA to 2 mA
2
160
IGND, GROUND CURRENT (mA)
IGND, GROUND CURRENT (mA)
VOUT = 2.5 V
100
IOUT, OUTPUT CURRENT (mA)
300
250
TJ = 125°C
200
TJ = 25°C
150
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
TJ = −40°C
100
50
0
0
50
100 150 200
140
120
100
TJ = 125°C
80
TJ = 25°C
60
40
TJ = −40°C
20
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
0
250 300 350 400 450 500
0
0.25
0.5
0.75
1
1.25
1.5
1.75
IOUT, OUTPUT CURRENT (mA)
IOUT, OUTPUT CURRENT (mA)
Figure 11. Ground Current vs. Output Current
at Temperatures
Figure 12. Ground Current vs. Output Current
0 mA to 2 mA at Temperature
320
VDROP, DROPOUT VOLTAGE (mV)
16
IQ, QUIESCENT CURRENT (mA)
VOUT = 3.3 V
120
0
250 300 350 400 450 500
100 150 200
140
VOUT = 3.3 V
14
12
VOUT = 2.5 V
10
VOUT = 0.8 V
8
6
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
4
2
0
−40
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
280
240
200
2
TJ = 125°C
TJ = 25°C
160
120
80
TJ = −40°C
40
0
−20
0
20
40
60
80
100
120
140
0
50
100
150
200
250 300 350 400
450 500
TJ, JUNCTION TEMPERATURE (°C)
IOUT, OUTPUT CURRENT (mA)
Figure 13. Quiescent Current vs. Temperature
Figure 14. Dropout Voltage vs. Output Current
at Temperature (2.5 V)
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NCP705
TYPICAL CHARACTERISTICS
400
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
280
240
200
160
VDROP, DROPOUT VOLTAGE (mV)
VDROP, DROPOUT VOLTAGE (mV)
320
TJ = 125°C
TJ = 25°C
120
80
TJ = −40°C
40
0
0
50
100
150
200
250 300 350 400
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
350
300
200
IOUT = 300 mA
150
100
IOUT = 0 mA
50
0
−40
450 500
−20
0
IOUT, OUTPUT CURRENT (mA)
250
IOUT = 500 mA
200
IOUT = 300 mA
150
100
IOUT = 0 mA
50
0
−40
VOUT, OUTPUT VOLTAGE (V)
4
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
VOUT, OUTPUT VOLTAGE (V)
300
40
60
80
100
120
140
Figure 16. Dropout Voltage vs. Temperature
(2.5 V)
IIN = 0 mA
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
3.5
3
2.5
VOUT = 3.3 V
VOUT = 2.5 V
2
1.5
VOUT = 0.8 V
1
0.5
0
−20
0
20
40
60
80
100
120
140
0
1
3
2
4
6
5
TJ, JUNCTION TEMPERATURE (°C)
VIN, INPUT VOLTAGE (V)
Figure 17. Dropout Voltage vs. Temperature,
(3.3 V)
Figure 18. Input Voltage vs. Output Voltage
0.8014
0.8012
0.8010
0.8008
0.8006
0.8004
0.8002
0.8000
0.7998
0.7996
0.7994
0.7992
0.7990
−40 −20
VIN = 2.5 V
VOUT = 0.8 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
0
20
40
60
80
100
120
VOUT, OUTPUT VOLTAGE (V)
VDROP, DROPOUT VOLTAGE (mV)
350
20
TJ, JUNCTION TEMPERATURE (°C)
Figure 15. Dropout Voltage vs. Output Current
at Temperatures (3.3 V)
400
IOUT = 500 mA
250
140
1.804
1.803
1.802
1.801
1.800
1.799
1.798
1.797
1.796
1.795
1.794
1.793
1.792
−40 −20
VIN = 3 V
VOUT = 2.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 19. Output Voltage vs. Temperature,
(0.8 V)
Figure 20. Output Voltage vs. Temperature,
(2.5 V)
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NCP705
TYPICAL CHARACTERISTICS
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
0
20
40
60
80
REGLINE, LINE REGULATION (mV/V)
100
120
140
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
950
900
850
800
750
700
−40 −20
0
20
40
60
80
100
120
140
600
580
560
540
520
VIN = 2.5 V
VOUT = 1.8 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
500
−40 −20
0
20
40
60
80
100
120 140
8
7
6
5
VIN = 2.5 V
VOUT = 1.8 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
4
3
2
1
0
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 23. Line Regulation vs. Temperature,
(3.3 V)
Figure 24. Load Regulation vs. Temperature,
(1.8 V)
0.3
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
IDIS, DISABLE CURRENT (mA)
5
620
Figure 22. Line Regulation vs. Temperature,
(1.8 V)
1000
6
640
Figure 21. Output Voltage vs. Temperature,
(3.3 V)
1050
7
660
TJ, JUNCTION TEMPERATURE (°C)
1150
8
680
TJ, JUNCTION TEMPERATURE (°C)
1200
REGLOAD, LOAD REGULATION (mV/mA)
REGLINE, LINE REGULATION (mV/V)
700
REGLOAD, LOAD REGULATION (mV/mA)
VOUT, OUTPUT VOLTAGE (V)
3.305
3.304
3.303
3.302
3.301
3.300
3.299
3.298
3.297
3.296
3.295
3.294
3.293
−40 −20
4
3
2
1
0
−40 −20
0
20
40
60
80
100
120
0.25
0.2
0.15
VEN ≤ 0.4 V
RL = 330 W
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
VIN = 4.5 V
0.1
0.05
VIN = 2.3 V
0
−0.05
−40 −20
140
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 25. Load Regulation vs. Temperature,
(3.3 V)
Figure 26. Disable Current vs. Temperature
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NCP705
750
120
735
ICL, CURRENT LIMIT (mA)
VEN = 5.5 V
100
80
VEN = 0.4 V
60
VIN = 3.8 V
VOUT = 3.3 V
RL = 330 W
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
40
20
0
−40 −20
0
20
40
60
80
100
120
720
705
VOUT = 1.8 V
690
675
660
VOUT = 3.3 V
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
645
630
615
600
−40 −20
140
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 27. Enable Current vs. Temperature
Figure 28. Current Limit vs. Temperature
ISC, SHORT−CIRCUIT CURRENT (mA)
800
780
VOUT = 3.3 V
760
740
720
VOUT = 1.8 V
700
680
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
660
640
620
600
−40 −20
0
20
40
60
80
100
120
140
800
780
760
740
VOUT = 0.8 V
CIN = 1 mF
COUT = 1 mF
MLCC, X7R
1206 size
720
700
680
660
640
620
600
2.5
3.00
3.50
4.00
4.50
5.00
TJ, JUNCTION TEMPERATURE (°C)
VIN, INPUT VOLTAGE (V)
Figure 29. Short−Circuit vs. Temperature
Figure 30. Short−Circuit Current vs.
Temperature
1
1
0.9
0.9
VEN, ENABLE VOLTAGE (V)
VEN, ENABLE VOLTAGE (V)
ISC, SHORT−CIRCUIT CURRENT (mA)
IEN, CURRENT TO ENABLE PIN (nA)
TYPICAL CHARACTERISTICS
0.8
0.7
0.6
0.5
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
0.4
0.3
0.2
0.1
0
−40 −20
0
20
40
60
80
100
120
0.8
0.7
0.6
0.5
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
0.4
0.3
0.2
0.1
140
0
−40 −20
0
20
40
60
80
100
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 31. Enable Threshold (High)
Figure 32. Enable Threshold (Low)
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10
5.50
120 140
NCP705
390
380
370
360
250
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
tSTART−UP, START−UP TIME (ms)
400
350
340
330
320
310
300
−40 −20
0
20
60
40
80
40
VIN = 2.8 V + 100 mVPP
VOUT = 1.8 V
COUT = 1 mF
CIN = none
MLCC, X7R,
1206 size
0.1
1
100
1k
20
40
60
80
100
120 140
IOUT = 10 mA
IOUT = 100 mA
IOUT = 300 mA
IOUT = 500 mA
80
70
60
50
40
VIN = 3.8 V + 100 mVPP
VOUT = 2.8 V
COUT = 1 mF
CIN = none
MLCC, X7R,
1206 size
30
20
10
10k
0.01
0.1
1
10
100
1k
Figure 36. Power Supply Rejection Ratio,
VOUT = 2.8 V
60
50
VIN = 4.3 V + 100 mVPP
VOUT = 3.3 V
COUT = 1 mF
CIN = none
MLCC, X7R,
1206 size
0.1
1
80
70
60
50
40
VIN = 4.3 V + 100 mVPP
VOUT = 3.3 V
CIN = none
MLCC, X7R,
1206 size
30
20
10
COUT = 1 mF
COUT = 4.7 mF
COUT = 10 mF
0
10
100
1k
10k
90
IOUT = 10 mA
IOUT = 100 mA
IOUT = 300 mA
IOUT = 500 mA
0
0.01
0
Figure 35. Power Supply Rejection Ratio,
VOUT = 1.8 V
70
10
160
FREQUENCY (kHz)
80
20
170
FREQUENCY (kHz)
90
30
180
0
10
100
40
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
190
90
IOUT = 10 mA
IOUT = 100 mA
IOUT = 300 mA
IOUT = 500 mA
0
0.01
200
Figure 34. Start−up Time vs. Temperature
50
10
210
Figure 33. Discharge Resistance vs.
Temperature
60
20
220
TJ, JUNCTION TEMPERATURE (°C)
70
30
230
150
−40 −20
140
RR, RIPPLE REJECTION (dB)
RR, RIPPLE REJECTION (dB)
120
240
TJ, JUNCTION TEMPERATURE (°C)
80
RR, RIPPLE REJECTION (dB)
100
RR, RIPPLE REJECTION (dB)
RDIS, ACTIVE DISCHARGE RESISTANCE (Ω)
TYPICAL CHARACTERISTICS
10k
0.01
0.1
1
10
100
1k
FREQUENCY (kHz)
FREQUENCY (kHz)
Figure 37. Power Supply Rejection Ratio,
VOUT = 3.3 V
Figure 38. Power Supply Rejection Ratio,
VOUT = 3.3 V, IOUT = 10 mA − Different COUT
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11
10k
NCP705
TYPICAL CHARACTERISTICS
80
80
RR, RIPPLE REJECTION (dB)
COUT = 1 mF
COUT = 4.7 mF
COUT = 10 mF
90
70
60
50
40
30
20
10
VIN = 4.3 V + 100 mVPP
VOUT = 3.3 V
ILOAD = 500 mA
CIN = none
MLCC, X7R,
1206 size
0
0.01
0.1
1
10
100
1k
C1 = none
C1 = 100 pF
C1 = 1 nF
C1 = 10 nF
C1 = 100 nF
70
60
50
40
30
20
10
VIN = 4.3 V + 100 mVPP
VOUT = 3.3 V
R1 = 225k, R2 = 82k
ILOAD = 10 mA
COUT = 1 mF MLCC,
X7R, 1206 size
0
0.01
10k
0.1
1
10
100
1k
FREQUENCY (kHz)
Figure 39. Power Supply Rejection Ratio,
VOUT = 3.3 V, IOUT = 500 mA − Different COUT
Figure 40. Power Supply Rejection Ratio,
VOUT = 3.3 V, IOUT = 10 mA − Different C1
ESR, EQUIVALENT SERIAL RESISTANCE (W)
FREQUENCY (kHz)
10k
100
UNSTABLE REGION
10
VOUT = 0.8 V
1
VOUT = 3.3 V
0.1
STABLE REGION
0.01
0
50
100 150
200 250
300 350 400 450 500
IOUT, OUTPUT CURRENT (mA)
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
COUT = 1 mF
CIN = 1 mF
IOUT = 500 mA
VOUT
IINRUSH
1 V/div
IINRUSH
VEN
100 ms/div
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
COUT = 1 mF
CIN = 1 mF
IOUT = 500 mA
VOUT
100 ms/div
Figure 42. Enable Turn−on Response,
COUT = 1 mF, IOUT = 10 mA
Figure 43. Enable Turn−on Response,
COUT = 1 mF, IOUT = 500 mA
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12
200 mA/div
500 mV/div
VEN
200 mA/div
500 mV/div
Figure 41. Output Capacitor ESR vs. Output
Current
1 V/div
RR, RIPPLE REJECTION (dB)
100
NCP705
VOUT
IINRUSH
1 V/div
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
COUT = 10 mF
CIN = 1 mF
IOUT = 500 mA
VOUT
100 ms/div
Figure 45. Enable Turn−on Response,
COUT = 10 mF, IOUT = 500 mA
tRISE = 1 ms
500 mV/div
100 ms/div
VEN
VIN = 2.5 V
VOUT = 0.8 V
VEN = 1 V
IOUT = 10 mA
VEN
tFALL = 1 ms
20 mV/div
VOUT
VIN = 2.5 V
VOUT = 0.8 V
VEN = 1 V
IOUT = 10 mA
COUT = 10 mF
COUT = 10 mF
VOUT
COUT = 1 mF
5 ms/div
5 ms/div
Figure 46. Line Transient Response − Rising
Edge, VOUT = 0.8 V, IOUT = 10 mA
Figure 47. Line Transient Response − Falling
Edge, VOUT = 0.8 V, IOUT = 10 mA
VEN
tRISE = 1 ms
500 mV/div
500 mV/div
20 mV/div
COUT = 1 mF
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
IOUT = 10 mA
VEN
tFALL = 1 ms
COUT = 1 mF
VOUT
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
IOUT = 10 mA
COUT = 10 mF
COUT = 10 mF
20 mV/div
20 mV/div
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
COUT = 10 mF
CIN = 1 mF
IOUT = 500 mA
Figure 44. Enable Turn−on Response,
COUT = 10 mF, IOUT = 10 mA
500 mV/div
1 V/div
IINRUSH
VEN
VOUT
COUT = 1 mF
10 ms/div
10 ms/div
Figure 48. Line Transient Response − Rising
Edge, VOUT = 3.3 V, IOUT = 10 mA
Figure 49. Line Transient Response − Falling
Edge, VOUT = 3.3 V, IOUT = 10 mA
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13
200 mA/div
500 mV/div
VEN
200 mA/div
500 mV/div
TYPICAL CHARACTERISTICS
NCP705
500 mV/div
VEN
tRISE = 1 ms
COUT = 10 mF
VOUT
COUT = 1 mF
5 ms/div
10 ms/div
Figure 50. Line Transient Response − Rising
Edge, VOUT = 3.3 V, IOUT = 500 mA
Figure 51. Line Transient Response − Falling
Edge, VOUT = 3.3 V, IOUT = 500 mA
IOUT
VIN = 2.5 V
VOUT = 0.8 V
CIN = 1 mF (MLCC)
tRISE = 1 ms
IOUT
tFALL = 1 ms
COUT = 10 mF
VOUT
50 mV/div
VOUT
100 mV/div
VIN = 2.5 V
VOUT = 0.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF
COUT = 10 mF
COUT = 1 mF
10 ms/div
100 ms/div
Figure 52. Load Transient Response − Rising
Edge, VOUT = 0.8 V, IOUT = 1 mA to 500 mA,
COUT = 1 mF, 10 mF
Figure 53. Load Transient Response − Falling
Edge, VOUT = 0.8 V, IOUT = 1 mA to 500 mA,
COUT = 1 mF, 10 mF
200 mA/div
200 mA/div
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
IOUT = 500 mA
COUT = 10 mF
VOUT
20 mV/div
20 mV/div
tFALL = 1 ms
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
IOUT = 500 mA
COUT = 1 mF
200 mA/div
VEN
200 mA/div
500 mV/div
TYPICAL CHARACTERISTICS
VIN = 2.5 V
VOUT = 0.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
IOUT
VIN = 2.5 V
VOUT = 0.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
IOUT
tFALL_IOUT = 1 ms
tRISE_IOUT = 10 ms
VOUT
50 mV/div
100 mV/div
VOUT
tRISE_IOUT = 1 ms
tFALL_IOUT = 10 ms
10 ms/div
10 ms/div
Figure 54. Load Transient Response − Rising
Edge, VOUT = 0.8 V, IOUT = 1 mA to 500 mA,
tRISE_IOUT = 1 ms, 10 ms
Figure 55. Load Transient Response − Falling
Edge, VOUT = 0.8 V, IOUT = 1 mA to 500 mA,
tFALL_IOUT = 1 ms, 10 ms
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14
NCP705
200 mA/div
200 mA/div
TYPICAL CHARACTERISTICS
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
IOUT
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
IOUT
COUT = 1 mF
50 mV/div
VOUT
COUT = 10 mF
COUT = 1 mF
5 ms/div
50 ms/div
Figure 56. Load Transient Response − Rising
Edge, VOUT = 3.3 V, IOUT = 1 mA to 500 mA,
COUT = 1 mF, 10 mF
Figure 57. Load Transient Response − Falling
Edge, VOUT = 3.3 V, IOUT = 1 mA to 500 mA,
COUT = 1 mF, 10 mF
200 mA/div
200 mA/div
100 mV/div
COUT = 10 mF
VOUT
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
IOUT
IOUT
tFALL_IOUT = 1 ms
VOUT
50 mV/div
50 mV/div
VOUT
tRISE_IOUT = 10 ms
tRISE_IOUT = 1 ms
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
tFALL_IOUT = 10 ms
10 ms/div
50 ms/div
Figure 58. Load Transient Response − Rising
Edge, VOUT = 3.3 V, IOUT = 1 mA to 500 mA,
tRISE_IOUT = 1 ms, 10 ms
Figure 59. Load Transient Response − Falling
Edge, VOUT = 3.3 V, IOUT = 1 mA to 500 mA,
tFALL_IOUT = 1 ms, 10 ms
1 V/div
VIN = 3.3 V
IOUT = 1 mA
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VIN = 5.5 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VOUT
Short−Circuit
500 mA/div
600 mV/div
VIN
VOUT
Thermal Shutdown
IOUT
5 ms/div
20 ms/div
Figure 60. Turn−on/off, Slow Rising VIN
Figure 61. Short−Circuit and Thermal
Shutdown
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15
NCP705
VIN = 5.5 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VOUT
500 mA/div
1 V/div
TYPICAL CHARACTERISTICS
VIN = 5.5 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VEN
COUT = 10 mF
1 V/div
500 mA/div
VOUT
IOUT
COUT = 1 mF
50 ms/div
5 ms/div
Figure 62. Short−Circuit Current Peak
Figure 63. Enable Turn−off
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16
NCP705
APPLICATIONS INFORMATION
General
temperature. The tantalum capacitors are generally more
costly than ceramic capacitors.
The NCP705 is a high performance 500 mA Low Dropout
Linear Regulator. This device delivers excellent noise and
dynamic performance. Thanks to its adaptive ground current
feature the device consumes only 13 mA of quiescent current
at no−load condition. The regulator features ultra*low
noise of 12 mVRMS, PSRR of 71 dB at 1 kHz and very good
load/line transient performance. Such excellent dynamic
parameters and small package size make the device an ideal
choice for powering the precision analog and noise sensitive
circuitry in portable applications. The LDO achieves this
ultra low noise level output without the need for a noise
bypass capacitor. A logic EN input provides ON/OFF
control of the output voltage. When the EN is low the device
consumes as low as typ. 10 nA from the IN pin. The device is
fully protected in case of output overload, output short circuit
condition and overheating, assuring a very robust design.
10
CAPACITY CHANGE (%)
0
−10
−20
−30
−40
Package Size
−50
1206
0805
0603
0402
−60
−70
−80
0
1
2
3
4
5
6
DC BIAS (V)
7
8
9
10
Figure 64. Capacitance Change vs. DC Bias
Input Capacitor Selection (CIN)
It is recommended to connect a minimum of 1 mF Ceramic
X5R or X7R capacitor close to the IN pin of the device. This
capacitor will provide a low impedance path for unwanted
AC signals or noise modulated onto constant input voltage.
There is no requirement for the min. /max. ESR of the input
capacitor but it is recommended to use ceramic capacitors
for their low ESR and ESL. A good input capacitor will limit
the influence of input trace inductance and source resistance
during sudden load current changes. Larger input capacitor
may be necessary if fast and large load transients are
encountered in the application.
No−load Operation
The regulator remains stable and regulates the output
voltage properly within the ±2% tolerance limits even with
no external load applied to the output.
Adjustable Operation
The output voltage range can be set from 0.8 V to
5.5 V−VDO by resistor divider network. Use Equations 1
and 2 to calculate appropriate values of resistors and output
voltage. Typical current to ADJ pin is 1 nA. For output
voltage 0.8 V ADJ pin can be tied directly to Vout pin.
ǒ
V OUT + 0.8 @ 1 )
Output Decoupling (COUT)
The NCP705 requires an output capacitor connected as
close as possible to the output pin of the regulator. The
minimal capacitor value is 1 mF and X7R or X5R dielectric
due to its low capacitance variations over the specified
temperature range. The NCP705 is designed to remain stable
with minimum effective capacitance of 1 mF to account for
changes with temperature, DC bias and package size.
Especially for small package size capacitors such as 0402
the effective capacitance drops rapidly with the applied DC
bias. Refer to the Figure 64, for the capacitance vs. package
size and DC bias voltage dependence.
There is no requirement for the minimum value of
Equivalent Series Resistance (ESR) for the COUT but the
maximum value of ESR should be less than 900 mW. Larger
output capacitors and lower ESR could improve the load
transient response or high frequency PSRR as shown in
typical characteristics. It is not recommended to use
tantalum capacitors on the output due to their large ESR. The
equivalent series resistance of tantalum capacitors is also
strongly dependent on the temperature, increasing at low
R2 ^ R1 @
Ǔ
R1
) R 1 @ I ADJ
R2
(eq. 1)
1
VOUT
*1
0.8
(eq. 2)
The resistor divider should be designed carefully to
achieve the best performance. Recommended current
through divider is 10 mA and more. Too high values of
resistors (MW) cause increasing noise and longer start−up
time. The suggested values of the resistors are in Table 5. To
improve dynamic performance capacitor C1 should be at
least 1 nF. Recommended range of capacity is between
10 nF and 100 nF. Higher value of capacitor C1 increasing
start−up time.
Table 5. Proposal Resistor Values for Variuos VOUT
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17
VOUT
R1
R2
1.5 V
130k
150k
3.3 V
256k
82k
5.0 V
430k
82k
NCP705
1 mF CIN
OFF
Internal Soft−Start Circuit
VOUT
OUT
NCP705
EN
ADJ
ON
GND
IN
R1 C1
NCP705 contains an internal soft−start circuitry to protect
against large inrush currents which could otherwise flow
during the start−up of the regulator. Soft−start feature
protects against power bus disturbances and assures a
controlled and monotonic rise of the output voltage.
COUT
1 mF
R2
Thermal Shutdown
Figure 65. NCP705 Adjustable with Noise
Improvement Capacitor
When the die temperature exceeds the Thermal Shutdown
threshold (TSD * 160°C typical), Thermal Shutdown event
is detected and the device is disabled. The IC will remain in
this state until the die temperature decreases below the
Thermal Shutdown Reset threshold (TSDU * 140°C
typical). Once the IC temperature falls below the 140°C the
LDO is enabled again. The thermal shutdown feature
provides the protection from a catastrophic device failure
due to accidental overheating. This protection is not
intended to be used as a substitute for proper heat sinking.
For reliable operation junction temperature should be
limited to +125°C maximum.
Enable Operation
The NCP705 uses the EN pin to enable/disable its device
and to deactivate/activate the active discharge function.
If the EN pin voltage >0.9 V the device is guaranteed to
be enabled. The NCP705 regulates the output voltage and
the active discharge transistor is turned−off.
The EN pin has internal pull−down current source with
typ. value of 110 nA which assures that the device is
turned−off when the EN pin is not connected. Build in 2 mV
hysteresis into the EN prevents from periodic on/off
oscillations that can occur due to noise.
In the case where the EN function isn’t required the EN
should be tied directly to IN.
Power Dissipation
As power dissipated in the NCP705 increases, it might
become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material, and the
ambient temperature affect the rate of junction temperature
rise for the part.
The maximum power dissipation the NCP705 can handle
is given by:
Undervoltage Lockout
The internal UVLO circuitry assures that the device
becomes disabled when the VIN falls below typ. 1.5 V. When the
VIN voltage ramps−up the NCP705 becomes enabled, if VIN
rises above typ. 1.6 V. The 100 mV hysteresis prevents from
on/off oscillations that can occur due to noise on VIN line.
Output Current Limit
Output Current is internally limited within the IC to a
typical 750 mA. The NCP705 will source this amount of
current measured with a voltage drops on the 90% of the
nominal VOUT. If the Output Voltage is directly shorted to
ground (VOUT = 0 V), the short circuit protection will limit
the output current to 800 mA (typ). The current limit and
short circuit protection will work properly up to
VIN = 5.5 V at TA = 125°C. There is no limitation for the
short circuit duration.
P D(MAX) +
P D [ V INǒI GND@I OUTǓ ) I OUTǒV IN * V OUTǓ (eq. 4)
1.6
qJA, JUNCTION−TO−AMBIENT
THERMAL RESISTANCE (°C/W)
200
1.4
PD(MAX), TA = 25°C, 2 oz Cu
1.2
180
1
160
PD(MAX), TA = 25°C, 1 oz Cu
140
qJA, 1 oz Cu
120
100
100
200
300
400
0.8
0.6
0.4
qJA, 2 oz Cu
0
(eq. 3)
q JA
The power dissipated by the NCP705 for given
application conditions can be calculated from the following
equations:
220
80
ƪ) 125oC * T Aƫ
500
600
0.2
700
COPPER HEAT SPREADER AREA (mm2)
Figure 66. qJA and PD(MAX) vs. Copper Area (WDFN6)
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18
PD(MAX), MAXIMUM POWER
DISSIPATION (W)
VIN
NCP705
Reverse Current
100 kHz – 10 MHz can be tuned by the selection of COUT
capacitor and proper PCB layout.
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case that VOUT > VIN.
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
Output Noise
The IC is designed for ultra−low noise output voltage
without external noise filter capacitor (Cnr). Figures 3 − 6
shows NCP705 noise performance. Generally the noise
performance in the indicated frequency range improves with
increasing output current.
Load Regulation
The NCP705 features very good load regulation of
maximum 2 mV in 0 mA to 500 mA range. In order to
achieve this very good load regulation a special attention to
PCB design is necessary. The trace resistance from the OUT
pin to the point of load can easily approach 100 mW which
will cause 50 mV voltage drop at full load current,
deteriorating the excellent load regulation.
The turn−on time is defined as the time period from EN
assertion to the point in which VOUT will reach 98% of its
nominal value. This time is dependent on various
application conditions such as VOUT(NOM), COUT, TA.
Line Regulation
PCB Layout Recommendations
Turn−On Time
To obtain good transient performance and good regulation
characteristics place CIN and COUT capacitors close to the
device pins and make the PCB traces wide. In order to
minimize the solution size, use 0402 capacitors. Larger
copper area connected to the pins will also improve the
device thermal resistance. The actual power dissipation can
be calculated from the equation above (Equation 4).
The IC features very good line regulation of 0.75 mV/V
measured from VIN = VOUT + 0.5 V to 5.5 V. For battery
operated applications it may be important that the line
regulation from VIN = VOUT + 0.5 V up to 4.5 V is only
0.55 mV/V.
Power Supply Rejection Ratio
The NCP705 features very good Power Supply Rejection
ratio. If desired the PSRR at higher frequencies in the range
ORDERING INFORMATION
Device
Voltage Option
Marking
NCP705MT09TCG
0.9 V
NCP705MT18TCG
1.8 V
5A
NCP705MT28TCG
2.8 V
5C
NCP705MT30TCG
3.0 V
5D
NCP705MT33TCG
3.3 V
5E
NCP705EMT33TCG
3.3 V
3A
NCP705MTADJTCG
Adjustable
5J
Package
Shipping†
5G
WDFN6
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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19
NCP705
PACKAGE DIMENSIONS
WDFN6 2x2, 0.65P
CASE 511BR
ISSUE B
D
ÇÇ
ÉÉ
A
B
A1
0.10 C
0.10 C
MOLD CMPD
ALTERNATE B−2
DETAIL B
ALTERNATE
CONSTRUCTIONS
E
L
L
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND
IS MEASURED BETWEEN 0.15 AND 0.25 mm FROM
THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED PAD AS
WELL AS THE TERMINALS.
5. FOR DEVICES CONTAINING WETTABLE FLANK
OPTION, DETAIL A ALTERNATE CONSTRUCTION
A-2 AND DETAIL B ALTERNATE CONSTRUCTION
B-2 ARE NOT APPLICABLE.
DIM
A
A1
A3
b
D
D2
E
E2
e
L
L1
L1
TOP VIEW
ALTERNATE A−1
ALTERNATE A−2
DETAIL A
A3
DETAIL B
0.05 C
ÉÉ
ÇÇ
EXPOSED Cu
ALTERNATE B−1
ÍÍÍ
ÍÍÍ
ÍÍÍ
PIN ONE
REFERENCE
A3
ALTERNATE
CONSTRUCTIONS
A
6X
0.05 C
A1
NOTE 4
C
SIDE VIEW
SEATING
PLANE
RECOMMENDED
MOUNTING FOOTPRINT*
D2
DETAIL A
1
MILLIMETERS
MIN
MAX
0.70
0.80
0.00
0.05
0.20 REF
0.25
0.35
2.00 BSC
1.50
1.70
2.00 BSC
0.90
1.10
0.65 BSC
0.40
0.20
--0.15
1.72
L
3
6X
0.45
E2
1.12
6
4
6X
e
BOTTOM VIEW
2.30
b
0.10
M
C A
0.05
M
C
B
PACKAGE
OUTLINE
NOTE 3
6X
1
0.40
0.65
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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