NL7SB3257 Product Preview Mux / Demux Bus Switch The NL7SB3257 Mux / Demux Bus Switch is an advanced high−speed line switch in ultra−small footprint. Features High Speed: tPD = 0.25 ns (Max) @ VCC = 4.5 V 3 W Switch Connection Between 2 Ports Power Down Protection Provided on Inputs Ultra−Small Packages These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant MARKING DIAGRAMS ULLGA6 1.0 x 1.0 CASE 613AD 1 V • • • • • http://onsemi.com M G V B1 = Specific Device Code (Rotated 180°) M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) A ORDERING INFORMATION B0 See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. S Figure 1. Logic Diagram B1 1 6 S GND 2 5 VCC B0 3 4 A Figure 2. ULLGA6 (Top View) Function Table Input S Function L A = B0 H A = B1 This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice. © Semiconductor Components Industries, LLC, 2014 July, 2014 − Rev. P0 1 Publication Order Number: NL7SB3257/D NL7SB3257 Table 1. MAXIMUM RATINGS Symbol Value Unit VCC DC Supply Voltage −0.5 to +7.0 V VIN Control Pin Input Voltage −0.5 to +7.0 V VI/O Switch Input / Output Voltage −0.5 to +7.0 V IIK Control Pin DC Input Diode Current VIN < GND −50 mA IOK Switch I/O Port DC Diode Current VI/O < GND −50 mA IO On−State Switch Current ±128 mA Continuous Current Through VCC or GND ±150 mA ICC DC Supply Current per Supply Pin ±150 mA IGND DC Ground Current per Ground Pin ±150 mA TSTG Storage Temperature Range −65 to +150 °C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction Temperature Under Bias 150 °C qJA Thermal Resistance (Note 1) ULLGA6 496 °C/W PD Power Dissipation in Still Air at 85°C (Note 1) ULLGA6 252 mW MSL Moisture Sensitivity FR Flammability Rating VESD ILATCHUP 1. 2. 3. 4. 5. Parameter Level 1 Oxygen Index: 28 to 34 ESD Withstand Voltage UL 94 V−0 @ 0.125 in Human Body Mode (Note 2) Machine Mode (Note 3) Charged Device Mode (Note 4) Latchup Performance Above VCC and Below GND at 85°C (Note 5) >2000 >200 N/A V ±100 mA Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow. Tested to EIA/ JESD22−A114−A Tested to EIA/ JESD22−A115−A Tested to JESD22−C101−A Tested to EIA / JESD78. Table 2. RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VI/O Parameter Positive DC Supply Voltage Control Pin Input Voltage Switch Input / Output Voltage TA Operating Free−Air Temperature Dt / DV Input Transition Rise or Fall Rate Control Input Switch I/O http://onsemi.com 2 Min Max Unit 4.0 5.5 V 0 5.5 V 0 5.5 V −55 +125 °C 0 0 5 DC nS/V NL7SB3257 Table 3. DC ELECTRICAL CHARACTERISTICS TA = 255C Symbol Parameter Conditions VCC (V) IIN = −18 mA 4.5 Min Typ TA = −555C to +1255C Max Min −1.2 Max Unit −1.2 V VIK Clamp Diode Voltage VIH High−Level Input Voltage (Control) 4.0 to 5.5 VIL Low−Level Input Voltage (Control) 4.0 to 5.5 0.8 0.8 V IIN Input Leakage Current 0 ≤ VIN ≤ 5.5 V 5.5 ±0.1 ±1.0 mA IOFF Power Off Leakage Current VI/O = 0 to 5.5 V 0 ±0.1 ±1.0 mA ICC Quiescent Supply Current IO = 0, VIN = VCC or 0 V 5.5 ±0.1 ±1.0 mA DICC Increase in Supply Current (Control Pin) One input at 3.4 V; Other inputs at VCC or GND 5.5 2.5 mA RON Switch ON Resistance VI/O = 0, II/O = 64 mA II/O = 30 mA 4.5 VI/O = 2.4, II/O = 15 mA 4.5 VI/O = 2.4, II/O = 15 mA 4.0 2.0 2.0 V W 3 3 7 7 7 7 6 15 15 10 20 20 Table 4. AC ELECTRICAL CHARACTERISTICS TA = −555C to +1255C TA = 255C Symbol Parameter VCC (V) Test Condition See Figure 4 Min Typ Max Min Max Unit 0.25 ns ns tPD Propagation Delay, A to B or B to A 4.0 to 5.5 tEN Output Enable Time 4.5 to 5.5 0.8 2.5 4.2 0.8 4.2 4.0 0.8 3.0 4.6 0.8 4.6 4.5 to 5.5 0.8 3.1 4.8 0.8 4.8 4.0 0.8 2.9 4.4 0.8 4.4 tDIS CIN Output Disable Time Control Input Capacitance 5.0 CIO(ON) Switch On Capacitance 5.0 CIO(OFF) Switch Off Capacitance 5.0 VIN = 3 V or 0 0.25 ns 2.0 pF Switch ON 10 pF Switch OFF 5.0 pF http://onsemi.com 3 NL7SB3257 AC Loading and Waveforms TEST S1 tPD tPLZ/tPZL tPHZ/tPZH Open 7V GND 7V 500 W From Output Under Test S1 Open GND CL = 50 pF (see Note A) 500 W Output Waveform 1 S1 at 7 V (see Note B) 3V Input 1.5 V 1.5 V 0V tPHL tPLH Output Waveform 2 S1 at Open (see Note B) VOH 1.5 V 1.5 V Output 3V Output Control LOAD CIRCUIT VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.5 V 1.5 V 0V tPZL tPLZ 3.5 V 1.5 V VOL + 0.3 V tPZH VOL tPHZ 1.5 V VOH − 0.3 V VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 W, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The output is measured with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 3. Load Circuit and Voltage Waveforms DEVICE ORDERING INFORMATION Device NL7SB3257CMX1TCG Package Shipping† ULLGA6 − 1.0 x 1.0, 0.35P (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 4 NL7SB3257 PACKAGE DIMENSIONS A B D PIN ONE REFERENCE 0.10 C ÉÉ ÉÉ 0.10 C ULLGA6 1.0x1.0, 0.35P CASE 613AD ISSUE A E NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. DIM A A1 b D E e L L1 TOP VIEW 0.05 C A 6X 0.05 C SEATING PLANE SIDE VIEW MOUNTING FOOTPRINT SOLDERMASK DEFINED* C A1 MILLIMETERS MIN MAX −−− 0.40 0.00 0.05 0.12 0.22 1.00 BSC 1.00 BSC 0.35 BSC 0.25 0.35 0.30 0.40 5X 0.48 6X 0.22 e 5X L NOTE 4 3 1 1.18 L1 0.53 6 4 6X 1 PKG OUTLINE b DIMENSIONS: MILLIMETERS 0.10 C A B BOTTOM VIEW 0.05 C 0.35 PITCH NOTE 3 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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