Renesas HS56021 Silicon n channel mos fet high speed power switching Datasheet

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HS56021
Silicon N Channel MOS FET
High Speed Power Switching
REJ03G1670-0200
Rev.2.00
Apr 24, 2008
Features
• Low on-resistance
• Low drive current
• High density mounting
Outline
RENESAS Package code: PRSS0003DC-A
(Package name: TO-92 Mod)
D
1. Gate
2. Drain
3. Source
G
32
S
1
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body-drain diode reverse drain current
Body-drain diode reverse drain peak current
Channel dissipation
Channel to ambient thermal impedance
Channel temperature
Storage temperature
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%
REJ03G1670-0200 Rev.2.00 Apr 24, 2008
Page 1 of 6
Symbol
VDSS
VGSS
ID
ID (pulse)Note1
IDR
IDR (pulse)Note1
Ratings
600
±30
0.2
0.8
0.2
0.8
Unit
V
V
A
A
A
A
Pch
θch-a
Tch
Tstg
0.9
139
150
–55 to +150
W
°C/W
°C
°C
HS56021
Electrical Characteristics
(Ta = 25°C)
Item
Drain to source breakdown voltage
Zero gate voltage drain current
Gate to source leak current
Gate to source cutoff voltage
Static drain to source on state
resistance
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Total gate charge
Gate to source charge
Gate to drain charge
Body-drain diode forward voltage
Symbol
V(BR)DSS
IDSS
IGSS
VGS(off)
RDS(on)
Min
600
—
—
3
—
Typ
—
—
—
—
13
Max
—
1
±0.1
5
15
Unit
V
µA
µA
V
Ω
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
VDF
—
—
—
—
—
—
—
—
—
—
—
84
11
2
31
14
53
173
4.5
0.6
2.6
0.77
—
—
—
—
—
—
—
—
—
—
1.25
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
VDS = 25 V
VGS = 0
f = 1 MHz
trr
—
150
—
ns
IF = 0.2 A, VGS = 0
diF/dt = 100 A/µs
Body-drain diode reverse recovery time
Test conditions
ID = 10 mA, VGS = 0
VDS = 600 V, VGS = 0
VGS = ±30 V, VDS = 0
VDS = 10 V, ID = 1 mA
ID = 0.1 A, VGS = 10 V Note2
ID = 0.1 A
VGS = 10 V
RL = 3000 Ω
Rg = 10 Ω
VDD = 480 V
VGS = 10 V
ID = 0.2 A
IF = 0.2 A, VGS = 0 Note2
Notes: 2. Pulse test
3. Since this device is equipped with high voltage FET chip (VDSS ≥ 600 V), high voltage may be supplied.
Therefore, please be sure to confirm about Electric discharge between Drain terminal and other terminal.
REJ03G1670-0200 Rev.2.00 Apr 24, 2008
Page 2 of 6
HS56021
Main Characteristics
Power vs. Temperature Derating
Maximum Safe Operation Area
ID (A)
10
1.2
3
1
10
µs
PW
(1s = 1
1
00
ho 0 m
t)
µs
s
DC
Op
era
tio
1 ms
n
0.3
0.1
Drain Current
Channel Dissipation
Pch (W)
1.6
0.8
0.4
0.03
0.01
0.003 Operation in this
area is limited by
0.001 RDS(on)
0.0003
Ta = 25°C
0.0001
0
50
100
150
Ambient Temperature
1
200
Ta (°C)
3
Drain to Source Voltage
Typical Output Characteristics
Drain Current
VDS (V)
5.6 V
5.4 V
0.4
5.2 V
0.2
VGS = 5 V
ID (A)
10 V
VDS = 10 V
Pulse Test
0.5
6V
5.8 V
Drain Current
ID (A)
8V
0.6
0.2
0.1
0.05
0.02
0.01
Tc = 75°C
0.005
25°C
−25°C
0.002
0.001
8
12
16
VDS (V)
Static Drain to Source on State Resistance
vs. Drain Current
100
VGS = 10 V
50
20
10
5
2
1
0.01 0.03
Pulse Test
0.1
0.3
Drain Current
0
20
1
3
ID (A)
REJ03G1670-0200 Rev.2.00 Apr 24, 2008
Page 3 of 6
10
2
4
6
8
Gate to Source Voltage
Static Drain to Source on State Resistance
RDS(on) (Ω)
4
Drain to Source Voltage
Drain to Source on State Resistance
RDS(on) (Ω)
1000
1
Pulse Test
0
300
Typical Transfer Characteristics
1.0
0.8
100
30
10
10
VGS (V)
Static Drain to Source on State Resistance
vs. Temperature
50
VGS = 10 V
Pulse Test
40
0.2 A
30
ID = 0.4 A
20
0.1 A
10
0
−25
0
25
50
75
Case Temperature
100 125 150
Tc (°C)
HS56021
Typical Capacitance vs.
Drain to Source Voltage
Body-Drain Diode Reverse
Recovery Time
1000
500
Capacitance C (pF)
Reverse Recovery Time trr (ns)
1000
200
100
50
20
10
5
di / dt = 100 A / µs
VGS = 0, Ta = 25°C
2
1
0.1
0.3
1
3
10
30
Reverse Drain Current
300
VGS = 0
f = 1 MHz
100
Ciss
30
10
Crss
1
0.3
0.1
0
100
IDR (A)
4
VDD = 480 V
300 V
100 V
0
2
0
4
6
Gate Charge
8
10
Qg (nC)
Gate to Source Cutoff Voltage
vs. Case Temperature
Gate to Source Cutoff Voltage
VGS(off) (V)
5
ID = 10 mA
4
1 mA
3
0.1 mA
2
1
0
-25
VDS = 10 V
0
25
50
75
Case Temperature
100 125 150
Tc (°C)
REJ03G1670-0200 Rev.2.00 Apr 24, 2008
Page 4 of 6
IDR (A)
200
8
Reverse Drain Current
VDS
VGS (V)
12
VGS
300
VDS (V)
1.0
Gate to Source Voltage
VDS (V)
Drain to Source Voltage
16
ID = 0.2 A
400
200
Reverse Drain Current vs.
Source to Drain Voltage
800
600
100
Drain to Source Voltage
Dynamic Input Characteristics
VDD = 100 V
300 V
480 V
Coss
3
Pulse Test
0.8
0.6
0.4
0.2
0
VGS = 0, -5 V
5, 10 V
0.4
0.8
1.2
Source to Drain Voltage
1.6
2.0
VSD (V)
HS56021
Normalized Transient Thermal Impedance γ s (t)
Normalized Transient Thermal Impedance vs. Pulse Width
10
1
D=1
0.5
0.2
θch – a (t) = γ s (t) • θch – a
0.1
0.1
θch – a = 139°C/W, Ta = 25°C
0.05
D=
PDM
0.02
PW
T
0.01
ulse
ot p
h
s
1
0.01
10 µ
PW
T
100 µ
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S)
Switching Time Test Circuit
Waveform
Vout
Monitor
Vin Monitor
90%
D.U.T.
RL
10 Ω
Vin
10 V
Vin
Vout
10%
10%
10%
VDD
= 300 V
90%
td(on)
REJ03G1670-0200 Rev.2.00 Apr 24, 2008
Page 5 of 6
tr
90%
td(off)
tf
HS56021
Package Dimensions
Package Name
TO-92 Mod
JEITA Package Code
SC-51
RENESAS Code
PRSS0003DC-A
Previous Code
TO-92 Mod / TO-92 ModV
4.8 ± 0.4
MASS[Typ.]
0.35g
Unit: mm
2.3 Max
0.65 ± 0.1
0.75 Max
0.7
0.60 Max
0.55 Max
10.1 Min
8.0 ± 0.5
3.8 ± 0.4
0.5 Max
1.27
2.54
Since HS56021 is equipped with high voltage FET chip (VDSS ≥ 600 V), high voltage may be supplied.
Therefore, please be sure to confirm about Electric discharge between Drain terminal and other terminal.
Ordering Information
Part No.
HS56021TZ-E
Quantity
2500 pcs
REJ03G1670-0200 Rev.2.00 Apr 24, 2008
Page 6 of 6
Shipping Container
Hold Box, Radial Taping
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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and regulations, and procedures required by such laws and regulations.
4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this
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