Control Integrated POwer System (CIPOS™) IKCM10L60GA Datasheet Datasheet www.infineon.com Please read the Important Notice and Warnings at the end of this document <Revision 2.2> <2016-08-01> Control Integrated POwer System (CIPOS™) IKCM10L60GA Table of Contents CIPOS™ Control Integrated POwer System ............................................................................................................ 3 Features .................................................................................................................................................................. 3 Target Applications ...................................................................................................................................................... 3 Description .................................................................................................................................................................. 3 System Configuration .................................................................................................................................................. 3 Pin Configuration ................................................................................................................................................... 4 Internal Electrical Schematic ................................................................................................................................. 4 Pin Assignment ...................................................................................................................................................... 5 Pin Description ...................................................................................................................................................... 5 HIN(U, V, W) and LIN(U, V, W) (Low side and high side control pins, Pin 7 - 12)......................................................... 5 VFO (Fault-output and NTC, Pin 14) ............................................................................................................................ 6 ITRIP (Over current detection function, Pin 15).......................................................................................................... 6 VDD, VSS (Low side control supply and reference, Pin 13, 16) ................................................................................... 6 VB(U, V, W) and VS(U, V, W) (High side supplies, Pin 1 - 6) .......................................................................................... 6 NW, NV, NU (Low side emitter, Pin 17 - 19) ................................................................................................................. 6 W, V, U (High side emitter and low side collector, Pin 20 - 22) ................................................................................... 6 P (Positive bus input voltage, Pin 23) .......................................................................................................................... 6 Absolute Maximum Ratings ................................................................................................................................... 7 Module Section ............................................................................................................................................................ 7 Inverter Section............................................................................................................................................................ 7 Control Section ............................................................................................................................................................ 7 Recommended Operation Conditions ................................................................................................................... 8 Static Parameters .................................................................................................................................................. 9 Dynamic Parameters ........................................................................................................................................... 10 Bootstrap Parameters ......................................................................................................................................... 10 Thermistor ......................................................................................................................................................... 11 Mechanical Characteristics and Ratings .............................................................................................................. 11 Circuit of a Typical Application ............................................................................................................................ 12 Switching Times Definition .................................................................................................................................. 13 Electrical characteristic ....................................................................................................................................... 14 Package Outline ................................................................................................................................................... 15 Revision History ................................................................................................................................................... 16 Datasheet 2 <Revision 2.2> <2016-08-01> Control Integrated POwer System (CIPOS™) IKCM10L60GA CIPOS™ Control Integrated POwer System Dual In-Line Intelligent Power Module 3Φ -bridge 600V / 10A Features Description Fully isolated Dual In-Line molded module The CIPOS™ module family offers the chance for integrating various power and control components to increase reliability, optimize PCB size and system costs. TRENCHSTOP™ IGBTs Rugged SOI gate driver technology with stability against transient and negative voltage Allowable negative VS potential up to -11V for signal transmission at VBS=15V Integrated bootstrap functionality Over current shutdown Temperature monitor Under-voltage lockout at all channels Low side emitter pins accessible for all phase current monitoring (open emitter) Cross-conduction prevention All of 6 switches turn off during protection Lead-free terminal plating; RoHS compliant It is designed to control three phase AC motors and permanent magnet motors in variable speed drives for applications like an air conditioning, a refrigerator and a washing machine. The package concept is specially adapted to power applications, which need good thermal conduction and electrical isolation, but also EMI-save control and overload protection. TRENCHSTOP™ IGBTs and anti parallel diodes are combined with an optimized SOI gate driver for excellent electrical performance. Target Applications System Configuration Dish washers Refrigerators 3 half bridges with TRENCHSTOP™ IGBTs and anti parallel diodes Washing machines 3Φ SOI gate driver Air-conditioners Thermistor Fans Pin-to-heatsink clearance distance typ. 1.6mm Low power motor drives Datasheet 3 <Revision 2.2> <2016-08-01> Control Integrated POwer System (CIPOS™) IKCM10L60GA Pin Configuration Bottom View (24) NC (1) VS(U) (2) VB(U) (23) P (3) VS(V) (4) VB(V) (22) U (5) VS(W) (6) VB(W) (21) V (7) HIN(U) (8) HIN(V) (9) HIN(W) (10) LIN(U) (11) LIN(V) (12) LIN(W) (13) VDD (14) VFO (20) W (19) NU (18) NV (15) ITRIP (16) VSS (17) NW Figure 1 Pin configuration Internal Electrical Schematic NC (24) P (23) (1) VS(U) (2) VB(U) VB1 HO1 RBS1 VS1 U (22) (3) VS(V) (4) VB(V) VB2 RBS2 HO2 VS2 V (21) (5) VS(W) (6) VB(W) VB3 RBS3 (7) HIN(U) HIN1 (8) HIN(V) HIN2 (9) HIN(W) (10) LIN(U) HIN3 LIN1 (11) LIN(V) LIN2 (12) LIN(W) LIN3 (13) VDD VDD (14) VFO VFO (15) ITRIP ITRIP (16) VSS HO3 VS3 W (20) LO1 NU (19) LO2 NV (18) LO3 VSS NW (17) Thermistor Figure 2 Datasheet Internal schematic 4 <Revision 2.2> <2016-08-01> Control Integrated POwer System (CIPOS™) IKCM10L60GA Pin Assignment Pin Number Pin Name Pin Description 1 VS(U) U-phase high side floating IC supply offset voltage 2 VB(U) U-phase high side floating IC supply voltage 3 VS(V) V-phase high side floating IC supply offset voltage 4 VB(V) V-phase high side floating IC supply voltage 5 VS(W) W-phase high side floating IC supply offset voltage 6 VB(W) W-phase high side floating IC supply voltage 7 HIN(U) U-phase high side gate driver input 8 HIN(V) V-phase high side gate driver input 9 HIN(W) W-phase high side gate driver input 10 LIN(U) U-phase low side gate driver input 11 LIN(V) V-phase low side gate driver input 12 LIN(W) W-phase low side gate driver input 13 VDD Low side control supply 14 VFO Fault output / Temperature monitor 15 ITRIP Over current shutdown input 16 VSS Low side control negative supply 17 NW W-phase low side emitter 18 NV V-phase low side emitter 19 NU U-phase low side emitter 20 W Motor W-phase output 21 V Motor V-phase output 22 U Motor U-phase output 23 P Positive bus input voltage 24 NC No Connection Pin Description HIN(U, V, W) and LIN(U, V, W) (Low side and high side control pins, Pin 7 - 12) These pins are positive logic and they are responsible for the control of the integrated IGBT. The Schmitt-trigger input thresholds of them are such to guarantee LSTTL and CMOS compatibility down to 3.3V controller outputs. Pull-down resistor of about 5k is internally provided to pre-bias inputs during supply start-up and a zener clamp is provided for pin protection purposes. Input Schmitt-trigger and noise filter provide beneficial noise rejection to short input pulses. CIPOSTM Schmitt-Trigger HINx LINx Figure 3 a) INPUT NOISE FILTER UZ=10.5V SWITCH LEVEL VIH; VIL VSS Input pin structure tFILIN b) tFILIN HIN LIN HIN LIN HO LO HO LO high The noise filter suppresses control pulses which are below the filter time tFILIN. The filter acts according to Figure 4. Datasheet 5k Figure 4 5 low Input filter timing diagram <Revision 2.2> <2016-08-01> Control Integrated POwer System (CIPOS™) IKCM10L60GA It is not recommended for proper work to provide input pulse-width lower than 1µs. VDD, VSS (Low side control supply and reference, Pin 13, 16) The integrated gate drive provides additionally a shoot through prevention capability which avoids the simultaneous on-state of two gate drivers of the same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 and LO3). When two inputs of a same leg are activated, only former activated one is activated so that the leg is kept steadily in a safe state. VDD is the control supply and it provides power both to input logic and to output power stage. Input logic is referenced to VSS ground. The under-voltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltage of VDDUV+ = 12.1V is present. The IC shuts down all the gate drivers power outputs, when the VDD supply voltage is below VDDUV- = 10.4V. This prevents the external power switches from critically low gate voltage levels during on-state and therefore from excessive power dissipation. A minimum deadtime insertion of typically 380ns is also provided by driver IC, in order to reduce crossconduction of the external power switches. VFO (Fault-output and NTC, Pin 14) The VFO pin indicates a module failure in case of under voltage at pin VDD or in case of triggered over current detection at ITRIP. A pull-up resistor is externally required. CIPOS VDD RON,FLT VB(U, V, W) and VS(U, V, W) (High side supplies, Pin 1 - 6) VB to VS is the high side supply voltage. The high side circuit can float with respect to VSS following the external high side power device emitter voltage. TM From ITRIP - Latch VFO Due to the low power consumption, the floating driver stage is supplied by integrated bootstrap circuit. 1 VSS Thermistor Figure 5 From UV detection Internal circuit at pin VFO The under-voltage detection operates with a rising supply threshold of typical VBSUV+ = 12.1V and a falling threshold of VBSUV- = 10.4V. The same pin provides direct access to the NTC, which is referenced to VSS. An external pull-up resistor connected to +5V ensures that the resulting voltage can be directly connected to the microcontroller. VS(U, V, W) provide a high robustness against negative voltage in respect of VSS of -50V transiently. This ensures very stable designs even under rough conditions. ITRIP (Over current detection function, Pin 15) NW, NV, NU (Low side emitter, Pin 17 - 19) CIPOS™ provides an over current detection function by connecting the ITRIP input with the IGBT collector current feedback. The ITRIP comparator threshold (typ. 0.47V) is referenced to VSS ground. An input noise filter (typ.: tITRIPMIN = 530ns) prevents the driver to detect false overcurrent events. The low side emitters are available for current measurements of each phase leg. It is recommended to keep the connection to pin VSS as short as possible in order to avoid unnecessary inductive voltage drops. W, V, U (High side emitter and low side collector, Pin 20 - 22) Over current detection generates a shutdown of all outputs of the gate driver after the shutdown propagation delay of typically 1000ns. These pins are motor U, V, W input pins. P (Positive bus input voltage, Pin 23) The fault-clear time is set to minimum 40µs. Datasheet The high side IGBTs are connected to the bus voltage. It is noted that the bus voltage does not exceed 450V. 6 <Revision 2.2> <2016-08-01> Control Integrated POwer System (CIPOS™) IKCM10L60GA Absolute Maximum Ratings (VDD = 15V and TJ = 25°C, if not stated otherwise) Module Section Description Condition Storage temperature range Isolation test voltage RMS, f = 60Hz, t = 1min Operating case temperature range Refer to Figure 6 Symbol Value Unit min max Tstg -40 125 °C VISOL 2000 - V TC -40 100 °C Inverter Section Description Condition Symbol Value min max Unit Max. blocking voltage IC = 250µA VCES 600 - V DC link supply voltage of P-N Applied between P-N VPN - 450 V DC link supply voltage (surge) of P-N Applied between P-N VPN(surge) - 500 V Output current TC = 25°C, TJ < 150°C TC = 100°C, TJ < 150°C IC -10 -6 10 6 A Maximum peak output current less than 1ms IC(peak) -20 20 A Short circuit withstand time1 VDC ≤ 400V, TJ = 150°C tSC - 5 µs Power dissipation per IGBT Ptot - 25.2 W Operating junction temperature range TJ -40 150 °C Single IGBT thermal resistance, junction-case RthJC - 4.96 K/W Single diode thermal resistance, junction-case RthJCD - 6.88 K/W Control Section Description Condition Value min max Unit Module supply voltage VDD -1 20 V High side floating supply voltage (VB vs. VS) VBS -1 20 V VIN VITRIP -1 -1 10 10 V fPWM - 20 kHz Input voltage LIN, HIN, ITRIP Switching frequency 1 Symbol Allowed number of short circuits: <1000; time between short circuits: >1s. Datasheet 7 <Revision 2.2> <2016-08-01> Control Integrated POwer System (CIPOS™) IKCM10L60GA Recommended Operation Conditions All voltages are absolute voltages referenced to VSS -potential unless otherwise specified. Description Symbol Value min typ max Unit DC link supply voltage of P-N VPN 0 - 400 V High side floating supply voltage (VB vs. VS) VBS 13.5 - 18.5 V Low side supply voltage VDD 14.0 16 18.5 V Control supply variation ΔVBS, ΔVDD -1 -1 - 1 1 V/µs Logic input voltages LIN, HIN, ITRIP VIN VITRIP 0 0 - 5 5 V Between VSS - N (including surge) VSS -5 - 5 V Figure 6 TC measurement point1 Any measurement except for the specified point in figure 6 is not relevant for the temperature verification and brings wrong or different information. 1 Datasheet 8 <Revision 2.2> <2016-08-01> Control Integrated POwer System (CIPOS™) IKCM10L60GA Static Parameters (VDD = 15V and TJ = 25°C, if not stated otherwise) Description Condition min Value typ max VCE(sat) - 1.55 1.85 2.05 - V Symbol Unit IC = 6A Collector-Emitter saturation voltage TJ = 25°C 150°C IF = 6A Diode forward voltage TJ = 25°C 150°C VF - 1.75 1.78 2.5 - V Collector-Emitter leakage current VCE = 600V ICES - - 1 mA Logic "1" input voltage (LIN, HIN) VIH - 2.1 2.5 V Logic "0" input voltage (LIN, HIN) VIL 0.7 0.9 - V ITRIP positive going threshold VIT,TH+ 400 470 540 mV ITRIP input hysteresis VIT,HYS 40 70 - mV VDD and VBS supply under voltage positive going threshold VDDUV+ VBSUV+ 10.8 12.1 13.0 V VDD and VBS supply under voltage negative going threshold VDDUVVBSUV- 9.5 10.4 11.2 V VDD and VBS supply under voltage lockout hysteresis VDDUVH VBSUVH 1.0 1.7 - V Input clamp voltage (HIN, LIN, ITRIP) Iin=4mA VINCLAMP 9.0 10.1 12.5 V Quiescent VBx supply current (VBx only) HIN = 0V IQBS - 300 500 µA Quiescent VDD supply current (VDD only) LIN = 0V, HINX = 5V IQDD - 370 900 µA Input bias current VIN = 5V IIN+ - 1 1.5 mA Input bias current VIN = 0V IIN- - 2 - µA ITRIP input bias current VITRIP = 5V IITRIP+ - 65 150 µA VFO input bias current VFO = 5V, VITRIP = 0V IFO - 60 - µA VFO output voltage IFO = 10mA, VITRIP = 1V VFO - 0.5 1 V Datasheet 9 <Revision 2.2> <2016-08-01> Control Integrated POwer System (CIPOS™) IKCM10L60GA Dynamic Parameters (VDD = 15V and TJ = 25°C, if not stated otherwise) Description tITRIPmin min - Value typ 655 25 165 180 850 75 120 1300 530 max - VLIN, HIN = 0V & 5V tFILIN - 290 - ns VITRIP = 1V tFLTCLR 40 65 200 µs DTPWM 1.0 - - µs DTIC - 380 - ns Eon - 290 350 - µJ Eoff - 165 210 - µJ Erec - 30 55 - µJ min 600 Value typ - max - RBS1 22 - 35 40 50 65 80 Ω trr_BS VF_BS - 50 2.6 3.25 ns V Condition Turn-on propagation delay time Turn-on rise time Turn-on switching time Reverse recovery time Turn-off propagation delay time Turn-off fall time Turn-off switching time Short circuit propagation delay time Input filter time ITRIP Input filter time at LIN, HIN for turn on and off Fault clear time after ITRIP-fault Deadtime between low side and high side Deadtime of gate drive circuit IGBT turn-on energy (includes reverse recovery of diode) IGBT turn-off energy Diode recovery energy VLIN, HIN = 5V, IC = 6A, VDC = 300V VLIN, HIN = 0V, IC = 6A, VDC = 300V From VIT,TH+ to 10% ISC VITRIP = 1V VDC = 300V, IC = 6A TJ = 25°C 150°C VDC = 300V, IC = 6A TJ = 25°C 150°C VDC = 300V, IC = 6A TJ = 25°C 150°C Symbol ton tr tc(on) trr toff tf tc(off) tSCP Unit ns ns ns ns ns ns ns ns ns Bootstrap Parameters (TJ = 25°C, if not stated otherwise) Description Condition Repetitive peak reverse voltage Bootstrap diode resistance of U-phase1 Reverse recovery time Forward voltage drop 1 Symbol VRRM VS2 or VS3 = 300V, TJ = 25°C VS2 and VS3 = 0V, TJ = 25°C VS2 or VS3 = 300V, TJ = 125°C VS2 and VS3 = 0V, TJ = 125°C IF = 0.6A, di/dt = 80A/µs IF = 20mA, VS2 and VS3 = 0V Unit V RBS2 and RBS3 have same values to RBS1. Datasheet 10 <Revision 2.2> <2016-08-01> Control Integrated POwer System (CIPOS™) IKCM10L60GA Thermistor Description Condition Resistor min Value typ max RNTC - 85 - k B(25/100) - 4092 - K Symbol TNTC = 25°C B-constant of NTC (Negative Temperature Coefficient) Unit 3500 2500 2000 1500 Min. Typ. Max. 30 Thermistor resistance [kΩ ] Thermistor resistance [kΩ ] 35 3000 25 20 15 10 5 0 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130 1000 Thermistor temperature [℃] 500 0 -40 -30 -20 -10 0 Figure 7 10 20 30 40 50 60 70 80 90 100 110 120 130 Thermistor temperature [℃] Thermistor resistance – temperature curve and table (For more information, please refer to the application note ‘AN2016-10 CIPOS Mini Technical description’) Mechanical Characteristics and Ratings Description Mounting torque Flatness Weight Condition M3 screw and washer Refer to Figure 8 Value typ 0.69 6.15 min 0.59 -50 - max 0.78 100 - Unit Nm µm g + - - + Figure 8 Datasheet Flatness measurement position 11 <Revision 2.2> <2016-08-01> Control Integrated POwer System (CIPOS™) IKCM10L60GA Circuit of a Typical Application NC (24) P (23) (1) VS(U) (2) VB(U) HO1 VB1 RBS1 VS1 U (22) (3) VS(V) #4 (4) VB(V) VB2 RBS2 HO2 VS2 V (21) 3-ph AC Motor (5) VS(W) (6) VB(W) VB3 RBS3 HO3 VS3 W (20) #5 #1 (7) HIN(U) (8) HIN(V) (9) HIN(W) (10) LIN(U) (11) LIN(V) Micro Controller HIN1 LO1 HIN2 NU (19) HIN3 LIN1 LIN2 LO2 (12) LIN(W) #7 #6 LIN3 NV (18) (13) VDD VDD line (14) VFO (15) ITRIP (16) VSS VFO ITRIP LO3 NW (17) VSS Thermistor Control GND line 5 or 3.3V line Power GND line VDD #3 Temperature monitor <Signal for protection> Figure 9 1. - VFO output is an open drain output. This signal line should be pulled up to the positive side of the 5V/3.3V logic power supply with a proper resistor RPU. It is recommended that RC filter be placed as close to the controller as possible. Capacitor for high side floating supply voltage should be placed as close to VB and VS pins as possible. The wiring between CIPOS™ Mini and snubber capacitor including shunt resistor should be as short as possible. Shunt resistor - 7. To prevent protection function errors, CITRIP should be placed as close to Itrip and VSS pins as possible. Snubber capacitor - 6. To reduce input signal noise by high speed switching, the RIN and CIN filter circuit should be mounted. (100Ω, 1nF) CIN should be placed as close to VSS pin as possible. VB-VS circuit - 5. Typical application circuit VFO circuit - 4. <Signal for protection> Itrip circuit - 3. U-phase current sensing V-phase current sensing W-phase current sensing Input circuit - 2. #2 The shunt resistor of SMD type should be used for reducing its stray inductance. Ground pattern - Ground pattern should be separated at only one point of shunt resistor as short as possible. Datasheet 12 <Revision 2.2> <2016-08-01> Control Integrated POwer System (CIPOS™) IKCM10L60GA Switching Times Definition HINx LINx 2.1V 0.9V trr toff ton 10% iCx 90% 90% tf 10% tr 10% 10% 10% vCEx tc(on) tc(off) Figure 10 Datasheet Switching times definition 13 <Revision 2.2> <2016-08-01> Control Integrated POwer System (CIPOS™) IKCM10L60GA Electrical characteristic 20 TJ=25℃ 16 14 12 10 8 VDD=13V VDD=15V VDD=20V 6 4 2 0 0.0 20 VDD=15V 0.5 1.0 1.5 2.0 2.5 3.0 3.5 18 18 16 14 12 10 8 6 TJ=25℃ 4 TJ=150℃ 2 0 0.0 4.0 Typ. Collector – Emitter saturation voltage 1.0 2.0 2.5 3.0 3.5 4.0 High side @TJ=25℃ High side @TJ=150℃ Low side @TJ=25℃ 1.0 Low side @TJ=150℃ 0.8 0.6 0.4 0.2 2 4 6 8 10 12 14 16 18 High side @TJ=150℃ 0.5 Low side @TJ=25℃ Low side @TJ=150℃ 0.4 0.3 0.2 0.1 VDC=300V VDD=15V 20 2 4 6 8 10 12 14 16 18 High side @TJ=25℃ High side @TJ=150℃ Low side @TJ=25℃ Low side @TJ=150℃ 700 600 14 16 18 400 High side @TJ=25℃ High side @TJ=150℃ 350 Low side @TJ=25℃ 300 Low side @TJ=150℃ 250 200 150 100 20 2 4 6 8 10 12 14 16 18 trr, Reverse recovery time [ns] High side @TJ=25℃ High side @TJ=150℃ Low side @TJ=25℃ Low side @TJ=150℃ 200 150 100 0 High side @TJ=25℃ 300 High side @TJ=150℃ Low side @TJ=25℃ 250 Low side @TJ=150℃ 200 4 6 8 10 12 14 Ic, Collector current [A] Typ. Turn off switching time Datasheet 20 2 4 16 18 20 6 8 10 12 14 16 18 20 VDC=300V VDD=15V 1300 High side @TJ=25℃ 1200 Low side @TJ=25℃ High side @TJ=150℃ Low side @TJ=150℃ 1100 1000 900 800 0 2 4 6 8 10 12 14 16 18 20 10 1 D : duty ratio 0.1 D=50% D=20% D=10% D=5% D=2% Single pulse 0.01 150 100 1E-3 0 2 40 Typ. Turn off propagation delay time 50 50 0 60 Ic, Collector current [A] VDC=300V VDD=15V 350 400 250 80 20 400 300 Low side @TJ=150℃ 100 1400 Typ. Turn on switching time VDC=300V VDD=15V 350 Low side @TJ=25℃ 120 Ic, Collector current [A] Typ. Turn on propagation delay time 450 3.5 700 0 Ic, Collector current [A] 500 3.0 1500 VDC=300V VDD=15V 450 ZthJC, RC-IGBT transient thermal resistance [K/W] 12 2.5 Typ. Reverse recovery energy loss 0 10 2.0 Ic, Collector current [A] 50 500 1.5 High side @TJ=150℃ 140 0 toff, Turn off propagation delay time [ns] tc(on), Turn on switching time [ns] 900 8 1.0 High side @TJ=25℃ 160 20 500 6 0.5 VDC=300V VDD=15V 180 Typ. Turn off switching energy loss VDC=300V VDD=15V 4 TJ=150℃ 2 Ic, Collector current [A] 1000 2 TJ=25℃ 4 0 0 Typ. Turn on switching energy loss 0 6 200 High side @TJ=25℃ Ic, Collector current [A] 800 8 Typ. Diode forward voltage 0.0 0 10 VF, Emitter - Collector voltage [V] Erec, Reverse recovery energy loss [uJ] Eoff, Turn off switching energy loss [mJ] 1.4 1.2 12 0 0.0 4.5 0.6 VDC=300V VDD=15V 1.6 0.0 ton, Turn on propagation delay time [ns] 1.5 14 Typ. Collector – Emitter saturation voltage 1.8 Eon, Turn on switching energy loss [mJ] 0.5 16 VCE(sat), Collector - Emitter voltage [V] VCE(sat), Collector - Emitter voltage [V] tc(off), Turn off switching time [ns] IF, Emitter - Collector current [A] 18 Ic, Collector - Emitter current [A] Ic, Collector - Emitter current [A] 20 0 2 4 6 8 10 12 14 Ic, Collector current [A] Typ. Reverse recovery time 14 16 18 20 1E-4 1E-7 1E-6 1E-5 1E-4 1E-3 0.01 0.1 1 10 tP, Pulse width [sec.] IGBT transient thermal resistance at all six IGBTs operation <Revision 2.2> <2016-08-01> 100 Control Integrated POwer System (CIPOS™) IKCM10L60GA Package Outline Datasheet 15 <Revision 2.2> <2016-08-01> Control Integrated POwer System (CIPOS™) IKCM10L60GA Revision History Major changes since the last revision Page or Reference Description of change Additional information and typo corrections 4 Pin configuration 15 Package outline Datasheet 16 <Revision 2.2> <2016-08-01> Trademarks of Infineon Technologies AG µHVIC™, µIPM™, µPFC™, AU-ConvertIR™, AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolDP™, CoolGaN™, COOLiR™, CoolMOS™, CoolSET™, CoolSiC™, DAVE™, DI-POL™, DirectFET™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, GaNpowIR™, HEXFET™, HITFET™, HybridPACK™, iMOTION™, IRAM™, ISOFACE™, IsoPACK™, LEDrivIR™, LITIX™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OPTIGA™, OptiMOS™, ORIGA™, PowIRaudio™, PowIRStage™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, SmartLEWIS™, SOLID FLASH™, SPOC™, StrongIRFET™, SupIRBuck™, TEMPFET™, TRENCHSTOP™, TriCore™, UHVIC™, XHP™, XMC™ Trademarks updated November 2015 Other Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition <2016-08-01> Published by Infineon Technologies AG 81726 München, Germany ifx1owners. © 2016 Infineon Technologies AG. All Rights Reserved. Do you have a question about this document? Email: [email protected] Document reference ifx1 IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 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