Maxim MAX13046E Single- and dual-bidirectional low-level translator Datasheet

19-4149; Rev 1; 8/08
Single- and Dual-Bidirectional
Low-Level Translator
The MAX13046E/MAX13047E ±15kV ESD-protected
bidirectional level translators provide level shifting for
data transfer in a multivoltage system. The MAX13046E
is a single-channel translator, and the MAX13047E is a
dual-channel translator. Externally applied voltages,
VCC and VL, set the logic level on either side of the
device. The MAX13046E/MAX13047E utilize a transmission-gate-based design to allow data translation in
either direction (VL↔VCC) on any single data line. The
MAX13046E/MAX13047E accept VL from +1.1V to the
minimum of either +3.6V or (VCC + 0.3V), and VCC from
+1.65V to +5.5V, making these devices ideal for data
transfer between low-voltage ASICs/PLDs and higher
voltage systems.
The MAX13046E/MAX13047E feature a shutdown mode
that reduces supply current to less than 1µA thermal
short-circuit protection, and ±15kV ESD protection on the
VCC side for enhanced protection in applications that
route signals externally. The MAX13046E/MAX13047E
operate at a guaranteed data rate of 8Mbps when pushpull driving is used.
Features
♦ Bidirectional Level Translation
♦ Operation Down to +1.1V on VL
♦ Ultra-Low Supply Current in Shutdown Mode
1µA (max)
♦ Guaranteed Push-Pull Driving Data Rate
8Mbps (+1.2V ≤ VL ≤ +3.6V, VCC ≤ +5.5V)
16Mbps (+1.8V ≤ VL ≤ VCC ≤ +3.3V)
♦ Extended ESD Protection on the I/O VCC Lines
±15kV Human Body Model
±15kV IEC61000-4-2 Air-Gap Discharge Method
±8kV IEC61000-4-2 Contact Discharge
♦ Low Supply Current
♦ Short-Circuit Protection
♦ Space-Saving µDFN and UTQFN Packages
Pin Configurations
TOP VIEW
MAX13046E
The MAX13046E is available in a 6-pin µDFN package,
and the MAX13047E is available in a 10-pin UTQFN.
Both devices are specified over the extended -40°C to
+85°C operating temperature range.
VCC
SHDN
I/O VCC
6
5
4
+
Applications
1
2
3
VL1
GND
I/O VL
µDFN
1mm × 1.5mm
I2C and 1-Wire® Level Translation
CMOS Logic-Level Translation
MAX13047E
Cell Phones
Portable Devices
1-Wire is a registered trademark of Maxim Integrated Products, Inc.
N.C.
VCC
7
6
I/O VCC1
8
5
I/O VCC2
GND
9
4
SHDN
I/O VL1 10
3
N.C.
+
Typical Application Circuits appear at end of data sheet.
1
2
I/O VL2
VL
UTQFN
1.4mm × 1.8mm
Ordering Information/Selector Guide
PART
PIN-PACKAGE
NUMBER OF CHANNELS
TOP MARK
MAX13046EELT+
6 µDFN (1mm x 1.5mm)
1
OC
MAX13047EEVB+
10 UTQFN (1.4mm x 1.8mm)
2
AAC
Note: All devices are specified over the extended -40°C to +85°C operating temperature range.
+Denotes a lead-free/RoHS-compliant package.
EP = Exposed pad.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX13046E/MAX13047E
General Description
MAX13046E/MAX13047E
Single- and Dual-Bidirectional
Low-Level Translator
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.)
VCC ...........................................................................-0.3V to +6V
VL ..............................................................................-0.3V to +4V
I/O VCC .......................................................-0.3V to (VCC + 0.3V)
I/O VL ............................................................-0.3V to (VL + 0.3V)
SHDN........................................................................-0.3V to +6V
Short-Circuit Duration I/O VL, I/O VCC to GND...........Continuous
Power Dissipation (TA = +70°C)
6-Pin µDFN (derate 2.1mW/°C above +70°C) .............168mW
10-Pin UTQFN (derate 6.9mW/°C above +70°C).........559mW
Junction-to-Ambient Thermal Resistance (θJA) (Note 1)
6-Pin µDFN .................................................................477°C/W
10-Pin UTQFN ...........................................................20.1°C/W
Junction-to-Ambient Thermal Resistance (θJC) (Note 1)
6-Pin µDFN ................................................................20.1°C/W
10-Pin UTQFN .........................................................143.1°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +1.65V to +5.5V, VL = +1.1V to minimum of either +3.6V or ((VCC + 0.3V)), I/O VL and I/O VCC are unconnected, TA = -40°C to
+85°C, unless otherwise noted. Typical values are VCC = +3.3V, VL = +1.8V at TA = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER SUPPLY
VL Supply Range
VCC Supply Range
Supply Current from VCC
Supply Current from VL
VL
VCC > 3.3V
1.1
VCC ≤ 3.3V
1.1
VCC
3.6V
VCC + 0.3V
1.65
IQVCC
5.5
V
10
µA
15
µA
ISD-VCC
TA = +25°C, SHDN = GND
0.03
1
µA
VL Shutdown-Mode Supply Current
ISD-VL
TA = +25°C, SHDN = GND
0.03
1
µA
I/O VL and I/O VCC Shutdown-Mode
Leakage Current
ISD-LKG
TA = +25°C, SHDN = GND
0.02
0.5
µA
TA = +25°C
0.02
0.1
µA
VCC Shutdown-Mode Supply Current
IQVL
V
SHDN Input Leakage
ESD PROTECTION
Human Body Model
±15V
I/O VCC (Note 4)
IEC 61000-4-2 Air-Gap Discharge
±15V
IEC 61000-4-2 Contact Discharge
±8V
All Other Pins
Human Body Model
kV
±2
kV
LOGIC-LEVEL THRESHOLDS
I/O VL Input-Voltage High
VIHL
I/O VL Input-Voltage Low
VILL
2
VL 0.2
_______________________________________________________________________________________
V
0.15
V
Single- and Dual-Bidirectional
Low-Level Translator
(VCC = +1.65V to +5.5V, VL = +1.1V to minimum of either +3.6V or ((VCC + 0.3V)), I/O VL and I/O VCC are unconnected, TA = -40°C to
+85°C, unless otherwise noted. Typical values are VCC = +3.3V, VL = +1.8V at TA = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
VIHC
I/O VCC Input-Voltage Low
VILC
I/O VL Output-Voltage High
VOHL
I/O VL source current = 20µA,
VI/O VCC > VCC - 0.4V
I/O VL Output-Voltage Low
VOLL
I/O VL sink current = 1mA,
VI/O VCC < 0.15V
I/O VCC Output-Voltage High
VOHC
I/O VCC source current = 20µA,
VI/O VL > VL - 0.2V
I/O VCC Output-Voltage Low
VOLC
I/O VCC sink current = 1mA,
VI/O VL < 0.15V
VIH-SHDN
SHDN Input-Voltage Low
VIL-SHDN
TYP
MAX
VCC 0.4
I/O VCC Input-Voltage High
SHDN Input-Voltage High
MIN
V
0.15
0.67 x
VL
0.67 x
VCC
VL - 0.2
VL - 0.1
V
V
0.4
1.1 ≤ VL < 1.2
V
V
0.4
VL > 1.2
UNITS
V
V
0.15
V
80
250
Ω
VCC Shutdown Threshold Low
VTH_L_VCC
VCC falling, VL = +3.3V
0.5
0.8
1.1
V
VCC Shutdown Threshold High
VTH_H_VCC VCC rising, VL = +3.3V
VTH_VL
0.3
0.6
0.9
V
0.35
0.75
1.06
V
6
10
15.5
kΩ
I/O VL-to-I/O VCC Resistance
VL Shutdown Threshold
Pullup Resistance
VCC = VL = +3.3V
RISE/FALL-TIME ACCELERATOR STAGE
Accelerator Pulse Duration
20
ns
VL = 1.7V
13
Ω
I/O VCC Output-Accelerator Source
Impedance
VCC = 2.2V
17
Ω
I/O VL Output-Accelerator Source
Impedance
VL = 3.2V
6
Ω
I/O VCC Output-Accelerator Source
Impedance
VCC = 3.6V
10
Ω
I/O VL Output-Accelerator Source
Impedance
_______________________________________________________________________________________
3
MAX13046E/MAX13047E
ELECTRICAL CHARACTERISTICS (continued)
MAX13046E/MAX13047E
Single- and Dual-Bidirectional
Low-Level Translator
TIMING CHARACTERISTICS FOR +1.2V ≤ VL ≤ MINIMUM OF EITHER +3.6V OR (VCC + 0.3V)
(VCC ≤ ±5.5V, +1.2V ≤ VL ≤ minimum of either +3.6V or ((VCC + 0.3V)), RS = 50Ω, RL = 1MΩ, CL = 15pF, TA = -40°C to +85°C, unless
otherwise noted. Typical values are VCC = +3.3V, VL = +1.8V at TA = +25°C.) (Notes 2, 3, 5)
PARAMETER
SYMBOL
I/O VCC Rise Time
tRVCC
I/O VCC Fall Time
tFVCC
I/O VL Rise Time
tRVL
I/O VL Fall Time
tFVL
tPD-VL-VCC
CONDITIONS
Push-pull driving, Figure 1a
MAX
7
25
400
Push-pull driving, Figure 1a
6
37
Open-drain driving, Figure 1c
20
50
Push-pull driving, Figure 1b
Open-drain driving, Figure 1d
8
30
180
400
Push-pull driving, Figure 1
3
56
Open-drain driving, Figure 1d
30
60
5
30
210
1000
4
30
190
1000
Driving I/O VL
tPD-VCC-VL
Driving I/O VCC
tSKEW
Each translator
equally loaded
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
20
Open-drain driving
50
Push-pull driving
Maximum Data Rate
TYP
170
Open-drain driving, Figure 1c
Propagation Delay
Channel-to-Channel Skew
MIN
Open-drain driving
UNITS
ns
ns
ns
ns
ns
ns
8
Mbps
500
kbps
TIMING CHARACTERISTICS FOR +1.1V ≤ VL ≤ +1.2V
(VCC ≤ ±5.5V, +1.1V ≤ VL ≤ +1.2V, RS = 50Ω, RL = 1MΩ, CL = 15pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are
VCC = +3.3V, VL = +1.8V at TA = +25°C.) (Notes 2, 3, 5)
PARAMETER
SYMBOL
I/O VCC Rise Time
tRVCC
I/O VCC Fall Time
tFVCC
I/O VL Rise Time
tRVL
I/O VL Fall Time
tFVL
CONDITIONS
TYP
MAX
7
200
170
400
Push-pull driving, Figure 1a
6
37
Open-drain driving, Figure 1c
20
50
Open-drain driving, Figure 1c
Push-pull driving, Figure 1b
8
30
180
400
Push-pull driving, Figure 1
3
30
Open-drain driving, Figure 1d
30
60
Open-drain driving, Figure 1d
tPD-VL-VCC
Driving I/O VL
tPD-VCC-VL
Driving I/O VCC
Propagation Delay
Channel-to-Channel Skew
Maximum Data Rate
4
tSKEW
MIN
Push-pull driving, Figure 1a
Each translator
equally loaded
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
5
200
210
1000
4
200
190
1000
Push-pull driving
20
Open-drain driving
50
UNITS
ns
ns
ns
ns
ns
ns
Push-pull driving
1.2
Mbps
Open-drain driving
500
kbps
_______________________________________________________________________________________
Single- and Dual-Bidirectional
Low-Level Translator
(+1.8V ≤ VL ≤ VCC ≤ +3.3V, RS = 50Ω, RL = 1MΩ, CL = 15pF, TA = -40°C to +85°C, unless otherwise noted. Typical values are VCC = +3.3V,
VL = +1.8V at TA = +25°C.) (Notes 2, 3, 5)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ns
I/O VCC Rise Time
tRVCC
Push-pull driving, Figure 1a
15
I/O VCC Fall Time
tFVCC
Push-pull driving, Figure 1a
15
ns
I/O VL Rise Time
tRVL
Push-pull driving, Figure 1b
15
ns
tFVL
ns
I/O VL Fall Time
Propagation Delay
Channel-to-Channel Skew
Maximum Data Rate
Push-pull driving, Figure 1b
15
tPD-VL-VCC
Push-pull driving, driving I/O VL
15
tPD-VCC-VL
Push-pull driving, driving I/O VCC
15
tSKEW
Push-pull driving, each translator
equally loaded
10
Push-pull driving
16
ns
ns
Mbps
Note 2: All units are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design
and not production tested.
Note 3: For normal operation, ensure VL < (VCC + 0.3V). During power-up, VL > (VCC + 0.3V) does not damage the device.
Note 4: ESD protection is guaranteed by design. To ensure maximum ESD protection, place a 1µF ceramic capacitor between VCC
and GND. See Typical Application Circuits.
Note 5: Timing is measured using 10% of input to 90% of output.
_______________________________________________________________________________________
5
MAX13046E/MAX13047E
TIMING CHARACTERISTICS FOR +1.8V ≤ VL ≤ VCC ≤ +3.3V
Typical Operating Characteristics
(VCC = +3.3V, VL = +1.8V, RL = 1MΩ, CL = 15pF, push-pull driving data rate = 8Mbps, TA = +25°C, unless otherwise noted.)
VL DYNAMIC SUPPLY CURRENT
vs. VCC SUPPLY VOLTAGE
(PUSH-PULL DRIVING ONE I/O VCC)
200
150
100
150
100
50
500
0
2.75 3.30 3.85 4.40 4.95
VCC SUPPLY VOLTAGE (V)
50
40
30
20
180
160
10
1.2
1.9
2.6
VL SUPPLY VOLTAGE (V)
140
120
100
80
60
300
10
35
TEMPERATURE (°C)
60
85
-40
800
600
400
50
60
85
tFVCC
15
10
tRVCC
0
0
0
20
5
200
20
10
35
TEMPERATURE (°C)
25
MAX13046E/7E toc08
1000
-15
RISE/FALL TIME vs. CAPACITIVE LOAD
(PUSH-PULL DRIVING ONE I/O VL)
RISE/FALL TIME (ns)
40
20
30
40
CAPACITIVE LOAD (pF)
100
0
-15
1200
VCC SUPPLY CURRENT (μA)
60
10
150
VCC DYNAMIC SUPPLY CURRENT
vs. CAPACITIVE LOAD
(PUSH-PULL DRIVING ONE I/O VL)
80
0
200
50
-40
3.3
MAX13046E/7E toc07
100
250
40
VL DYNAMIC SUPPLY CURRENT
vs. CAPACITIVE LOAD
(PUSH-PULL DRIVING ONE I/O VL)
120
3.3
350
0
1.2
1.9
2.6
VL SUPPLY VOLTAGE (V)
VL DYNAMIC SUPPLY CURRENT
vs. TEMPERATURE
(PUSH-PULL DRIVING ONE I/O VCC)
20
0
6
5.50
MAX13046E/7E toc05
60
2.75 3.30 3.85 4.40 4.95
VCC SUPPLY VOLTAGE (V)
200
VL SUPPLY CURRENT (μA)
MAX13046E/7E toc04
VCC SUPPLY CURRENT (μA)
70
2.20
VL DYNAMIC SUPPLY CURRENT
vs. TEMPERATURE
(PUSH-PULL DRIVING ONE I/O VL)
VCC DYNAMIC SUPPLY CURRENT
vs. VL SUPPLY VOLTAGE
(PUSH-PULL DRIVING ONE I/O VCC)
80
200
0
1.65
5.50
300
MAX13046E/7E toc06
2.20
VL SUPPLY CURRENT (μA)
1.65
400
100
50
0
MAX13046E/7E toc03
200
600
MAX13046E/7E toc09
250
MAX13046E/7E toc02
VL SUPPLY CURRENT (μA)
300
250
VL SUPPLY CURRENT (μA)
MAX13046E/7E toc01
350
VCC DYNAMIC SUPPLY CURRENT
vs. VL SUPPLY VOLTAGE
(PUSH-PULL DRIVING ONE I/O VL)
VCC SUPPLY CURRENT (μA)
VL DYNAMIC SUPPLY CURRENT
vs. VCC SUPPLY VOLTAGE
(PUSH-PULL DRIVING ONE I/O VL)
VL SUPPLY CURRENT (μA)
MAX13046E/MAX13047E
Single- and Dual-Bidirectional
Low-Level Translator
0
10
20
30
40
CAPACITIVE LOAD (pF)
50
0
10
20
30
40
CAPACITIVE LOAD (pF)
_______________________________________________________________________________________
50
Single- and Dual-Bidirectional
Low-Level Translator
RISE/FALL TIME vs. CAPACITIVE LOAD
(PUSH-PULL DRIVING ONE I/O VCC)
4
3
2
8
6
tFVL
4
2
1
0
10
20
30
40
CAPACITIVE LOAD (pF)
50
3.0
2.5
2.0
1.5
1.0
0.5
0
0
3.5
MAX13046E/7E toc12
tRVL
10
RISE/FALL TIME (ns)
5
MAX13046E/7E toc11
6
PROPAGATION DELAY (ns)
12
MAX13046E/7E toc10
7
PROPAGATION DELAY vs. CAPACITIVE LOAD
(PUSH-PULL DRIVING ONE I/O VCC)
PROPAGATION DELAY (ns)
PROPAGATION DELAY vs. CAPACITIVE LOAD
(PUSH-PULL DRIVING ONE I/O VL)
0
0
10
20
30
40
CAPACITIVE LOAD (pF)
RAIL-TO-RAIL DRIVING
(DRIVING ONE I/O VL)
50
0
10
20
30
40
CAPACITIVE LOAD (pF)
50
EXISTING SHUTDOWN MODE
MAX13046E/7E toc13
MAX13046E/7E toc14
1V/div
1V/div
I/O VL
I/O VL
2V/div
I/O VCC
1V/div
I/O VCC
1V/div
SHDN
25ns/div
250ns/div
_______________________________________________________________________________________
7
MAX13046E/MAX13047E
Typical Operating Characteristics (continued)
(VCC = +3.3V, VL = +1.8V, RL = 1MΩ, CL = 15pF, push-pull driving data rate = 8Mbps, TA = +25°C, unless otherwise noted.)
Single- and Dual-Bidirectional
Low-Level Translator
MAX13046E/MAX13047E
MAX13046E Pin Description
MAX13046E
µDFN
NAME
1
VL
FUNCTION
VL Input Supply Voltage. Bypass VL with a 0.1µF ceramic capacitor located as close as possible to the input.
2
GND
Ground
3
I/O VL
Input/Output. Referenced to VL.
4
I/O VCC
5
SHDN
Shutdown Input. Drive SHDN high to enable the device. Drive SHDN low to put the device in shutdown mode.
6
VCC
VCC Input Supply Voltage. Bypass VCC with a 1µF ceramic capacitor located as close as possible to the input
for full ESD protection. If full ESD protection is not required, bypass VCC with a 0.1µF ceramic capacitor.
Input/Output. Referenced to VCC.
MAX13047E Pin Description
MAX13047E
UTQFN
NAME
1
I/O VL2
2
VL
3, 7
N.C.
4
SHDN
5
I/O VCC2
6
VCC
8
I/O VCC1
9
GND
10
I/O VL1
—
EP
FUNCTION
Input/Output 2. Referenced to VL.
VL Input Supply Voltage. Bypass VL with a 0.1µF ceramic capacitor located as close as possible to the
input.
Not Connected. Internally not connected.
Enable Input. Drive SHDN high to enable the device. Drive SHDN low to put the device in shutdown mode.
Input/Output 2. Referenced to VCC.
VCC Input Supply Voltage. Bypass VCC with a 1µF ceramic capacitor located as close as possible to the
input for full ESD protection. If full ESD protection is not required, bypass VCC with a 0.1µF ceramic
capacitor.
Input/Output 1. Referenced to VCC.
Ground
Input/Output 1. Referenced to VL.
Exposed Pad. Connect EP to GND.
Detailed Description
The MAX13046E/MAX13047E ±15kV ESD-protected
bidirectional level translators provide level shifting for
data transfer in a multivoltage system. The MAX13046E
is a single-channel translator and the MAX13047E is a
dual-channel translator. Externally applied voltages,
VCC and VL, set the logic level on either side of the
device. The MAX13046E/MAX13047E utilize a transmission-gate-based design to allow data translation in
either direction (VL ↔ VCC) on any single data line. The
MAX13046E/MAX13047E accept VL from +1.1V to the
minimum of either +3.6V or (VCC + 0.3V) and VCC from
8
+1.65V to +5.5V, making these devices ideal for data
transfer between low-voltage ASICs/PLDs and higher
voltage systems.
The MAX13046E/MAX13047E feature a shutdown mode
that reduces supply current to less than 1µA thermal
short-circuit protection, and ±15kV ESD protection on the
VCC side for enhanced protection in applications that
route signals externally. The MAX13046E/MAX13047E
operate at a guaranteed data rate of 8Mbps when pushpull driving is used. See the Functional Diagram.
_______________________________________________________________________________________
Single- and Dual-Bidirectional
Low-Level Translator
VCC
VL
PU1
ONE-SHOT
RISE-TIME
ACCELERATOR
ONE-SHOT
RISE-TIME
ACCELERATOR
10kΩ
PU2
10kΩ
GATE BIAS
I/O VL
I/O VCC
N
SHDN
Level Translation
For proper operation, ensure that +1.65V ≤ V CC ≤
+5.5V and +1.1V ≤ VL ≤ the minimum of either +3.6V or
(VCC + 0.3V). During power-up sequencing, VL ≥ (VCC
+ 0.3V) does not damage the device. The speed of the
rise time accelerator circuitry limits the maximum data
rate for the MAX13046E/MAX13047E to 16Mbps.
Rise-Time Accelerators
The MAX13046E/MAX13047E have an internal rise-time
accelerator, allowing operation up to 16Mbps. The risetime accelerators are present on both sides of the
device and act to speed up the rise time of the input
and output of the device, regardless of the direction of
the data. The triggering mechanism for these accelerators is both level and edge sensitive. To guarantee
operation of the rise time accelerators the maximum
parasitic capacitance should be less than 200pF on the
I/O lines.
Shutdown Mode
Drive SHDN low to place the MAX13046E/MAX13047E
in shutdown mode and drive SHDN high for normal
operation. Activating the shutdown mode disconnects
the internal 10kΩ pullup resistors on the I/O VCC and I/O
VL lines. This forces the I/O lines to a high-impedance
GND
state, and decreases the supply current to less than
1µA. The high-impedance I/O lines in shutdown mode
allow for use in a multidrop network. The MAX13046E/
MAX13047E have a diode from each I/O to the corresponding supply rail and GND. Therefore, when in shutdown mode, do not allow the voltage at I/O VL to exceed
(VL + 0.3V), or the voltage at I/O VCC to exceed (VCC +
0.3V).
Operation with One Supply Disconnected
Certain applications require sections of circuitry to be
disconnected to save power. When VL is connected and
VCC is disconnected or connected to ground, the device
enters shutdown mode. In this mode, I/O VL can still be
driven without damage to the device; however, data
does not translate from I/O VL to I/O VCC. If VCC falls
more than VTH_L_VCC below VL, the device disconnects
the pullup resistors at I/O VL and I/O VCC. To achieve the
lowest possible supply current from VL when VCC is disconnected, it is recommended that the voltage at the
VCC supply input be approximately equal to GND.
When VCC is connected and VL is less than VTH_VL, the
device enters shutdown mode. In this mode, I/O VCC
can still be driven without damage to the device; however, data does not translate from I/O VCC to I/O VL.
_______________________________________________________________________________________
9
MAX13046E/MAX13047E
Functional Diagram
MAX13046E/MAX13047E
Single- and Dual-Bidirectional
Low-Level Translator
VL
VCC
VL
VL
VCC
VCC
VL
SHDN
MAX13046E/
MAX13047E
RS
50Ω
VCC
SHDN
MAX13046E/
MAX13047E
DATA
I/O VCC
I/O VL
I/O VCC
I/O VL
RL
GND
RS
50Ω
DATA
CL
CL
I/O VL
(tRISE,
tFALL < 10ns)
RL
GND
I/O VCC
(tRISE,
tFALL < 10ns)
tPD-VL-VCC
tPD-VL-VCC
I/O VCC
tPD-VCC-VL
tPD-VCC-VL
tRVL
tFVL
I/O VL
tRVCC
tFVCC
Figure 1a. Rail-to-Rail Driving I/O VL
Figure 1b. Rail-to-Rail Driving I/O VCC
When VCC is disconnected or connected to ground, I/O
VCC must not be driven more than VCC + 0.3V. When VL
is disconnected or connected to ground, I/O VL must
not be driven more than VL + 0.3V.
operation, shutdown mode, and powered down. The
I/O VCC lines of the MAX13046E/MAX13047E are characterized for protection to the following limit:
Short-Circuit Protection
Thermal-overload detection protects the MAX13046E/
MAX13047E from short-circuit fault conditions. In the
event of a short-circuit fault, when the junction temperature (TJ) exceeds +150°C, the device enters shutdown
mode. When the device has cooled to below +140°C,
normal operation resumes.
±15kV ESD Protection
ESD protection structures are incorporated on all pins
to protect against electrostatic discharges encountered
during handling and assembly. The ESD structures
withstand electrostatic discharge in all states: normal
10
•
±15kV using the Human Body Model
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
Human Body Model
Figure 2a shows the Human Body Model, and Figure
2b shows the current waveform it generates when discharged into a low-impedance state. This model consists of a 100pF capacitor charged to the ESD voltage
of interest that is then discharged into the test device
through a 1.5kΩ resistor.
______________________________________________________________________________________
Single- and Dual-Bidirectional
Low-Level Translator
VCC
VL
VL
MAX13046E/MAX13047E
VL
VCC
VCC
VL
SHDN
VCC
SHDN
MAX13046E/
MAX13047E
MAX13046E/
MAX13047E
DATA
DATA
I/O VCC
I/O VL
I/O VCC
I/O VL
RL
GND
CL
I/O VL
CL
RL
GND
I/O VCC
tPD-VL-VCC
tPD-VCC-VL
tPD-VL-VCC
tPD-VCC-VL
I/O VCC
I/O VL
tRVCC
tFVCC
Figure 1c. Open-Drain Driving I/O VL
tRVL
tFVL
Figure 1d. Open-Drain Driving I/O VCC
IEC 61000-4-2
The IEC 61000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifically
refer to integrated circuits. The MAX13046E/MAX13047E
help to design equipment that meets Level 4 of IEC
61000-4-2 without the need for additional ESD-protection
components. The major difference between tests done
using the Human Body Model and IEC 61000-4-2 is higher peak current in IEC 61000-4-2 because series resistance is lower in the IEC 61000-4-2 model. Hence, the
ESD withstand voltage measured to IEC 61000-4-2 can
be lower than that measured using the Human Body
Model. Figure 3a shows the IEC 61000-4-2 model, and
Figure 3b shows the current waveform for the ±8kV, IEC
61000-4-2, Level 4, ESD contact-discharge test. The AirGap test involves approaching the device with a charged
probe. The contact-discharge method connects the
probe to the device before the probe is energized.
Applications Information
Power-Supply Decoupling
To reduce ripple and the chance of transmitting incorrect data, bypass VL and VCC to ground with a 0.1µF
ceramic capacitor. To ensure full ±15kV ESD protection, bypass VCC to ground with a 1µF ceramic capacitor. Place all capacitors as close as possible to the
power-supply inputs.
I2C Level Translation
The MAX13046E/MAX13047E level shifts the data present on the I/O lines between +1.1V and +5.5V, making
them ideal for level translation between a low-voltage
ASIC and an I2C device. A typical application involves
interfacing a low-voltage microprocessor to a +3V or
+5V D/A converter, such as the MAX517.
1-Wire Interface Translation
The MAX13046E/MAX13047E are ideal for level translation between a low-voltage ASIC and 1-Wire device. A
______________________________________________________________________________________
11
RC
1MΩ
CHARGE-CURRENTLIMIT RESISTOR
HIGHVOLTAGE
DC
SOURCE
Cs
100pF
RD
1500Ω
RC
50MΩ TO 100MΩ
DISCHARGE
RESISTANCE
DEVICE
UNDER
TEST
Ir
HIGHVOLTAGE
DC
SOURCE
Cs
150pF
DEVICE
UNDER
TEST
STORAGE
CAPACITOR
Figure 3a. IEC 61000-4-2 ESD Test Model
Figure 2a. Human Body ESD Test Model
IP 100%
90%
DISCHARGE
RESISTANCE
CHARGE-CURRENTLIMIT RESISTOR
STORAGE
CAPACITOR
RD
330Ω
I
100%
90%
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
IPEAK
MAX13046E/MAX13047E
Single- and Dual-Bidirectional
Low-Level Translator
AMPERES
36.8%
10%
0
10%
0
tRL
TIME
tDL
CURRENT WAVEFORM
Figure 2b. Human Body Current Waveform
typical application involves interfacing a low-voltage
microprocessor to an external memory, such as the
DS2502. The maximum data rate depends on the
1-Wire device. For the DS2502, the maximum data rate
is 16.3kbps. A 5kΩ pullup resistor is recommended
when interfacing with the DS2502.
Push-Pull vs. Open-Drain Driving
The MAX13046E/MAX13047E can be driven in a pushpull or open-drain configurations. For open-drain configuration, internal 10kΩ resistors pull up I/O VL and I/O
VCC to their respective power supplies. See the Timing
Characteristics table for maximum data rates when
using open-drain drivers.
tr = 0.7ns TO 1ns
30ns
t
60ns
Figure 3b. IEC 61000-4-2 ESD Generator Current Waveform
PCB Layout
The MAX13046E/MAX13047E require good PCB layout
for proper operation and optimal rise/fall time performance. Ensure proper high-frequency PCB layout even
when operating at low data rates.
Driving High-Capacitive Load
Capacitive loading on the I/O lines impacts the rise time
(and fall time) of the MAX13046E/MAX13047E when driving the signal lines. The actual rise time is a function of
the load capacitance, parasitic capacitance, the supply
voltage, and the drive impedance of the MAX13046E/
MAX13047E.
Operating the MAX13046E/MAX13047E at a low data rate
does NOT increase capacitive load driving capability.
12
______________________________________________________________________________________
Single- and Dual-Bidirectional
Low-Level Translator
+1.8V
+3.3V
0.1μF
1μF
VL
VCC
SHDN
+1.8V
SYSTEM
+3.3V
SYSTEM
MAX13046E
DATA
I/O VL
DATA
I/O VCC
+1.8V
+3.3V
0.1μF
1μF
VL
VCC
SHDN
+1.8V
SYSTEM
+3.3V
SYSTEM
MAX13047E
DATA
I/O VL1
I/O VCC1
I/O VL2
I/O VCC2
DATA
______________________________________________________________________________________
13
MAX13046E/MAX13047E
Typical Application Circuits
MAX13046E/MAX13047E
Single- and Dual-Bidirectional
Low-Level Translator
Package Information
Chip Information
PROCESS: BiCMOS
14
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
6 µDFN
L611-1
21-0147
10 UTQFN
V101A1CN-1
21-0028
______________________________________________________________________________________
Single- and Dual-Bidirectional
Low-Level Translator
REVISION
NUMBER
REVISION
DATE
0
5/08
Initial release
8/08
Removing future product asterisks from MAX13047, changing Electrical
Characteristics Table, packaging changes, changing ESD information
1
DESCRIPTION
PAGES
CHANGED
⎯
1–4, 6, 10
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15
© 2008 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
MAX13046E/MAX13047E
Revision History