E2B0014-27-Y2 This version: Nov. 1997 MSM9004-01/02 Previous version: Mar. 1996 ¡ Semiconductor MSM9004-01/02 ¡ Semiconductor 1/3, 1/4 DUTY LCD DRIVER WITH 4-DOT COMMON DRIVER AND 49-DOT SEGMENT DRIVER GENERAL DESCRIPTION The MSM 9004-01/02 is an LCD driver for dynamic display with a 1/3 or 1/4 duty select function. When the 1/3 duty is selected, it can display up to 147 segments, and when the 1/4 duty is selected, up to 196 segments. FEATURES : 5.0 V ± 10% : 3.7 V to 5.5 V : 2 MHz max. • Logic power supply voltage (VDD) • LCD drive power supply voltage (VLCD) • Serial transfer clock frequency • LCD output resistance Common driver Segment driver • Display duty • LCD segment output • Maximum number of display segments For 1/3 duty For 1/4 duty • Display blanking terminal attached • Operating temperature range • Interface with microcontroller MSM9004-01 MSM9004-02 • System clock MSM9004-01 MSM9004-02 : 20 kW : 60 kW : 1/3, 1/4 selectable : 49 : 147 segments max. : 196 segments max. : –40 to +85˚C : LOAD, DATA, CLOCK1, CLOCK2 : LOAD, DATA, CLOCK2 : external input : internal oscillation circuit (external resistor and capacitor required) • Package: 64-pin plastic QFP (QFP64-P-1414-0.80-BK) (Product name : MSM9004-01GS-BK) (Product name : MSM9004-02GS-BK) • Comparison of device codes and functions Function LCD segment Duty output Device code 50 MSM9004-01 — MSM9004-02 — 49 1/3 1/4 System clock External input Internal oscillation circuit — — MSM9004-03 — — MSM9004-04 — — — — 1/15 ¡ Semiconductor MSM9004-01/02 BLOCK DIAGRAM MSM9004-01 SEG1 SEG49 VDD BLANK VLC1 VLC2 VLC3 49-DOT SEGMENT DRIVER 3/4SEL TIMING GENERATOR 49-BIT DATA LATCH 1 49-BIT DATA SELECTOR 49-BIT DATA LATCH 2 49-BIT DATA LATCH 3 COMMON DRIVER COM1 COM2 COM3 COM4 49-BIT DATA LATCH 4 VDD CLOCK1 LOAD CLOCK2 DATA 49-BIT SHIFT REGISTER VSS CONTROL LOGIC 2/15 ¡ Semiconductor MSM9004-01/02 BLOCK DIAGRAM MSM9004-02 SEG1 SEG49 VDD BLANK VLC1 VLC2 VLC3 49-DOT SEGMENT DRIVER 3/4SEL TIMING GENERATOR 49-BIT DATA LATCH 1 49-BIT DATA SELECTOR 49-BIT DATA LATCH 2 49-BIT DATA LATCH 3 COMMON DRIVER COM1 COM2 COM3 COM4 49-BIT DATA LATCH 4 VDD OSC LOAD CLOCK2 DATA OSCILLATOR 49-BIT SHIFT REGISTER VSS CONTROL LOGIC 3/15 ¡ Semiconductor MSM9004-01/02 49 SEG49 50 BLANK 51 CLOCK2 52 DATA 53 LOAD 54 3/4SEL 55 VDD 56 CLOCK1 57 VSS 58 VLC3 59 VLC2 60 VLC1 61 COM1 62 COM2 63 COM3 64 COM4 MSM9004-01 8 41 SEG41 SEG9 9 40 SEG40 SEG10 10 39 SEG39 SEG11 11 38 SEG38 SEG12 12 37 SEG37 SEG13 13 36 SEG36 SEG14 14 35 SEG35 SEG15 15 34 SEG34 SEG16 16 33 SEG33 SEG32 32 SEG8 SEG31 31 42 SEG42 SEG30 30 43 SEG43 7 SEG29 29 6 SEG7 SEG28 28 SEG6 SEG27 27 44 SEG44 SEG26 26 45 SEG45 5 SEG25 25 4 SEG5 SEG24 24 SEG4 SEG23 23 46 SEG46 SEG22 22 47 SEG47 3 SEG21 21 2 SEG3 SEG20 20 SEG2 SEG19 19 48 SEG48 SEG18 18 1 SEG17 17 SEG1 64-Pin Plastic QFP 4/15 ¡ Semiconductor MSM9004-01/02 PIN CONFIGURATION (TOP VIEW) 49 SEG49 50 BLANK 51 CLOCK2 52 DATA 53 LOAD 54 3/4SEL 55 VDD 56 OSC 57 VSS 58 VLC3 59 VLC2 60 VLC1 61 COM1 62 COM2 63 COM3 64 COM4 MSM9004-02 SEG1 1 48 SEG48 SEG2 2 47 SEG47 SEG3 3 46 SEG46 SEG4 4 45 SEG45 SEG5 5 44 SEG44 SEG6 6 43 SEG43 SEG7 7 42 SEG42 SEG8 8 41 SEG41 SEG9 SEG32 32 SEG31 31 SEG30 30 SEG29 29 SEG28 28 33 SEG33 SEG27 27 34 SEG34 SEG16 16 SEG26 26 SEG15 15 SEG25 25 35 SEG35 SEG24 24 36 SEG36 SEG14 14 SEG23 23 SEG13 13 SEG22 22 37 SEG37 SEG21 21 38 SEG38 SEG12 12 SEG20 20 SEG11 11 SEG19 19 39 SEG39 SEG18 18 40 SEG40 SEG17 17 9 SEG10 10 64-Pin Plastic QFP 5/15 ¡ Semiconductor MSM9004-01/02 PIN DESCRIPTIONS Pin Symbol 56 CLOCK1 *1 56 OSC *2 Type Connected to I I Description Microcontroller System clock input pin. External resistor Capacitor Pin for oscillation. For details, see "MSM9004-02 Oscillation Circuit Characteristics". VDD Connecting the external resistor and capacitor to configure the oscillation circuit. Connect the resistor and capacitor as shown in the OSC right figure. Make the length of wiring between this pin and the VSS external resistor and capacitor as short as passible. 52 51 53 DATA CLOCK2 LOAD I I I Microcontroller Serial data input. Microcontroller Shift clock input (Schmitt circuit included). Microcontroller Load signal input (Schmitt circuit included). For details on the configuration of input data, see "Data Configuration". Input data is read synchronizing with the rising edge of this clock. Serial input data is transferred to the display latch when this LOAD signal is at a "H" level. 50 BLANK I Input pin for turning off all segments. — All segments turn off, regardless of the display data, when this pin is at a "L" level, and all segments return to the status before turning off. 54 3/4SEL I Input pin for selecting 1/3 or 1/4 duty. — 1/3 duty drive is selected when this pin is at a "H" level, and 1/4 duty drive is selected when this pin is at a "L" level. 61 to 64 COM1-4 O LCD LCD common outputs. Leave COM4 open for 1/3 duty drive. 1 to 49 SEG1-49 60 VLC1 59 VLC2 58 VLC3 O LCD LCD segment outputs. Bias power supply pins for driving the LCD. Power supply Conditions for bias voltage are as follows : — 3.7V £ VDD – VLC3 £ 5.5V 1 VLC1 = VDD – 3 (VDD – VLC3) 2 VLC2 = VDD – 3 (VDD – VLC3) VLC3 ≥ VSS 55 VDD 57 VSS Power supply — Power supply pins. Normally used as VDD = 4.5 to 5.5 V and Vss = 0 V. *1: Applied to MSM9004-01. *2: Applied to MSM9004-02. 6/15 ¡ Semiconductor MSM9004-01/02 ABSOLUTE MAXIMUM RATINGS Parameter Symbol Condition Rating Unit Power Supply Voltage VDD — –0.3 to +6.5 V LCD Driver Voltage VLCD — –0.3 to VDD +0.3 V Input Voltage VIN — –0.3 to VDD +0.3 V Power Dissipation PD Ta = +85˚C 450 mW TSTG — –55 to 150 °C Range Unit Storage Temperature RECOMMENDED OPERATING CONDITIONS Parameter Symbol Condition Power Supply Voltage VDD — LCD Driver Voltage VLCD * 1 4.5 to 5.5 *2 3.7V to VDD V *3 V System Clock Frequency fCP1 Applied to MSM9004-01 1.5 to 4.3 kHz Self Oscillation Frequency fOSC Applied to MSM9004-02 1.5 to 4.3 kHz Shift Frequency (Max) fCP2 — 2.0 MHz Operating Temperature Top — –40 to +85 °C *1: *2: *3: VDD–VLC3 The following relationship must be kept: VDD>VLC1>VLC2≥VSS VLC1=VDD – 1 (VDD – VLC3) 3 VLC2=VDD – 2 (VDD – VLC3) 3 VLC3=VDD – 3 (VDD – VLC3) 3 VDD is the reference potential for the LCD driving voltage. To decide the LCD driving voltage, change the voltage between VLC3 and VSS (VLC3 > 0). 7/15 ¡ Semiconductor MSM9004-01/02 ELECTRICAL CHARACTERISTICS DC Characteristics (MSM9004-01) (Ta= –40 to +85°C, VDD=4.5 to 5.5 V, VDD–VLC3=3.7 V to VDD) Parameter Symbol Condition Min. Max. Unit Applicable pin LOAD, CLOCK2 "H" Input Voltage — VIH1 0.8VDD VDD V DATA, 3/4SEL BLANK — VIH2 0.85VDD VDD V CLOCK1 LOAD, CLOCK2 "L" Input Voltage — VIL1 0.0 0.2VDD V DATA, 3/4SEL BLANK VIL2 — 0.0 0.15VDD V IIH1 VIN=VDD –1.0 1.0 mA IIH2 VIN=VDD –3.0 3.0 mA IIL1 VDD=5.5 V, VIN=0 V –1.0 1.0 mA IIL2 VDD=5.5 V, VIN=0 V –160 –20 mA BLANK — 60 kW SEG1-49 — 20 kW COM1-4 — 0.65 CLOCK1 LOAD, CLOCK1 "H" Input Current CLOCK2, DATA 3/4SEL BLANK LOAD, CLOCK1 "L" Input Current CLOCK2, DATA 3/4SEL RONV0 ON Resistance (SEG) ON Resistance (COM) IO=–10 mA RONV1 IO=±10 mA RONV2 IO=±10 mA RONV3 IO= 10 mA RONV0 IO=–30 mA RONV1 IO=±30 mA RONV2 IO=±30 mA RONV3 IO= 30 mA VDD=4.5 V VLC1= 2 V 3 DD VLC2= 1 V 3 DD VLC3=VSS fCP1=2.4 kHz * 1 fCP2=1 MHz Dynamic Supply Current IDD 1/4 duty mA VDD COM1-4 : No Load SEG1-49 : No Load *1 For input data, input a logic "0" and a logic "1" to LCD display bits alternately. The tr and tf time for the CLOCK1, CLOCK2, DATA and LOAD pins must be less than 20ns. 8/15 ¡ Semiconductor MSM9004-01/02 DC Characteristics (MSM9004-02) (Ta= –40 to +85°C, VDD=4.5 to 5.5 V, VDD–VLC3=3.7 V to VDD) Parameter Symbol Condition VIH1 — Min. Max. Unit Applicable pin LOAD, CLOCK2 "H" Input Voltage 0.8VDD VDD V DATA, 3/4SEL BLANK LOAD, CLOCK2 "L" Input Voltage — VIL1 0.0 0.2VDD V DATA, 3/4SEL BLANK "H" Input Current "L" Input Current VIN=VDD –1.0 1.0 mA IIH2 VIN=VDD –3.0 3.0 mA IIL1 VDD=5.5 V, VIN=0 V –1.0 1.0 mA VDD=5.5 V, VIN=0 V –160 –20 mA BLANK — 60 kW SEG1-49 — 20 kW COM1-4 — 1.00 IIL2 ON Resistance (SEG) ON Resistance (COM) RONV0 IO=–10 mA RONV1 IO=±10 mA RONV2 IO=±10 mA RONV3 IO= 10 mA RONV0 IO=–30 mA RONV1 IO=±30 mA RONV2 IO=±30 mA RONV3 IO= 30 mA IDD DATA, 3/4SEL BLANK LOAD, CLOCK2 DATA, 3/4SEL VDD=4.5 V VLC1= 2 VDD 3 1 VLC2= VDD 3 VLC3=VSS fCP2=1 MHz Dynamic Supply Current LOAD, CLOCK2 IIH1 1/4 duty COM1-4 : No Load *1 mA VDD SEG1-49 : No Load * 1: For input data, input a logic "0" and a logic "1" to LCD display bits alternately. External resistor for oscillation : RO = 62 kW External capacitor for oscillation : CO = 0.01 mF The tr, and tf time for the CLOCK2, DATA and LOAD pins must be less than 20ns. The current that flows through the external resistor and capacitor is not included. 9/15 ¡ Semiconductor MSM9004-01/02 AC Characteristics (Ta= –40 to +85°C, VDD=4.5 to 5.5 V, VDD–VLC3 = 3.7 V to VDD) Parameter Symbol Min. Max. Unit fCP1 Not applied to MSM9004-02 1.5 4.3 kHz tWCP1 Not applied to MSM9004-02 1.0 — ms System Clock Frequency System Clock Pulse Width Condition fCP2 — — 2.0 MHz tWCP2 — 200 — ns Data Setup Time tSU — 100 — ns Data Hold Time tHD — 100 — ns Load Pulse Width tWLD — 200 — ns Clock-Load Time tCL — 200 — ns Load-Clock Time tLC — 200 — ns Rise Time tr — — 100 ns Fall Time tf — — 100 ns Data Clock Frequency Data Clock Pulse Frequency twCP1 twCP1 tr tf 0.85VDD CLOCK1 0.15VDD *1 twCP2 1/fCP1 twCP2 tr tf 0.8VDD CLOCK2 0.2VDD tSU 1/fCP2 tHD 0.8VDD DATA 0.2VDD tr tf LOAD tWLD tCL tLC 0.8VDD 0.2VDD tr tf *1 Not applied to MSM9004-02. 10/15 ¡ Semiconductor MSM9004-01/02 FUNCTIONAL DESCRIPTION Display Data Input CLOCK2 DATA D49 D48 D47 D46 D45 D1 0 LCD display bit (49 bits) LOAD Note: D2 0 0 C1 Dummy bit (3 bits) C2 C3 C4 Select bit (4 bits) Always set a logic "0" to the dummy bit. LCD Display Bit - LCD Panel Lighting Status Correspondence Table LCD display bit LCD panel lighting (D1 to D49) status 1 ON 0 OFF LCD Display Bit - Segment Output Correspondence Table LCD display bit D1 D2 D45 D46 D47 D48 D49 Segment output SEG1 SEG2 SEG45 SEG46 SEG47 SEG48 SEG49 Select Bit - Data Latch Correspondence Table Display data writing Corresponding data latch common output Data latch 1 COM1 0 Data latch 2 COM2 0 Data latch 3 COM3 0 Data latch 4 COM4 C4 C3 C2 C1 0 0 0 1 0 0 1 0 1 0 1 0 0 The select bits C1 to C4 select Data latch 1 to Data latch 4 corresponding to COM 1 to COM 4 independently. If logic "1s" are selected to multiple select bits, the LCD display bits are written to all corresponding data latches. Example: When logic "1s" are set to all select bits C1 to C4, and logic "0s" are set to all LCD display bits D1 to D49, logic "0s" are written to Data latch 1 to Data latch 4 by one data input. This leads to turning off the entire LCD panel. 11/15 ¡ Semiconductor MSM9004-01/02 How to Decrease Transfer Time When Unused Segments Exist The MSM9004-01/02 can operate even if segment data is not full. Input data as shown in the figure below. In this case, the last 4 bits are the select bits. Transfer example: for 30 segments CLOCK2 DATA LOAD Note: D30 D29 D28 D27 D26 LCD display bits (30 bits) D2 D1 0 0 0 Dummy bits (3 bits) C1 C2 C3 C4 Select bits (4 bits) Always set "0" to the dummy bits. Recommended RC Values for MSM9004-02 Oscillation Circuit Shown below are the recommended oscillation resistor (RO) and capacitor (CO) values for providing frame frequency fFRM of approximately 62 Hz to 190 Hz. • RO = 62 kW ±5% • CO = 0.01 mF ±5% (Resistance and capacitance variations due to temperature change are not included.) For requirements of supply voltage (VDD), ambient temperature range (Ta), and frame frequency (fFRM): • VDD = 5.0 V • Ta = –40 to +85°C • fFRM = 1 oscillation frequency 24 12/15 ¡ Semiconductor MSM9004-01/02 APPLICATION CIRCUITS MSM9004-01 VDD +5 V SEG1 VDD DATA Output Port 1/4 DUTY CLOCK2 LCD PANEL LOAD CPU CLOCK1 VSS BLANK MSM9004-01 BIAS VLC1 CIRCUIT VLC2 SEG49 VLC3 COM1 COM2 COM3 COM4 VSS 3/4SEL MSM9004-02 VDD +5 V SEG1 VDD DATA Output Port 1/4 DUTY CLOCK2 LCD PANEL LOAD CPU VSS BLANK MSM9004-02 BIAS CIRCUIT VLC1 VLC2 VLC3 OSC R0 C0 VSS 3/4SEL SEG49 COM1 COM2 COM3 COM4 13/15 ¡ Semiconductor MSM9004-01/02 REFERENCE DATA Frame Frequency fFRM [Hz] fFRM vs. R0 VDD = 5 V Ta = 25˚C 500 300 100 CO = 0.01 mF CO = 0.015 mF CO = 0.022 mF 50 30 10 20 40 60 80 Resistance RO [kW] fFRM vs. Ta Frame Frequency fFRM [Hz] 140 VDD = 5 V RO = 33 kW CO = 0.015 mF 120 100 RO = 62 kW CO = 0.01 mF 80 RO = 62 kW CO = 0.015 mF 60 40 20 -40 -10 0 25 85 Temperature Ta [˚C] 14/15 ¡ Semiconductor MSM9004-01/02 PACKAGE DIMENSIONS (Unit : mm) QFP64-P-1414-0.80-BK Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.87 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 15/15