MITSUBISHI <STD. LINEAR ICs> M62333P/FP M62338P/FP 8-BIT 3CH I2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS DESCRIPTION PIN CONFIGURATION(TOP VIEW) The M62333/M62338 is an integrated circuit semiconductor of CMOS structure with 3 channels of built in D-A converters with output buffer operational amplifiers. The input is 2-wires serial method is used for the transfer format of digital data to allow connection with a microcomputer with minimum wiring. The output buffer operational amplifier employs AB class output circuit with sync and source drive capacity of 1.0mA or more,and it operates in the whole voltage range from Vcc to ground. The M62333 and the M62338 differ only in their slave address. 8 Vcc Ao1 1 Ao3 3 M62333 M62338 Ao2 2 N.C. 4 7 SCL 6 SDA 5 GND Outline 8P4 (P) 8P2S-A (FP) N.C.:NO CONNECTION FEATURES • Digital data transfer format I 2C BUS serial data method • Output buffer operational amplifier it operates in the whole voltage range from Vcc to ground. • High output current drive capacity ±1.0mA over APPLICATION Conversion from digital data to analog control data for home-use and industrial equipment. Signal gain control or automatic adjustment of DISPLAYMONITOR or CTV. BLOCK DIAGRAM Vcc SCL SDA GND 6 5 7 8 I 2 C BUS TRANSCEIVER POWER ON RESET CHANNEL DECODER 8 8bit Latch 8bit Latch 8bit Latch 8bit upper segment R-2R 8bit upper segment R-2R 8bit upper segment R-2R 1 2 3 Ao1 Ao2 Ao3 MITSUBISHI ELECTRIC 980714 rev.E (1 / 6 ) MITSUBISHI <STD. LINEAR ICs> M62333P/FP M62338P/FP 8-BIT 3CH I2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS EXPLANATION OF TERMINALS Pin No. Symbol Function 6 SDA Serial data input terminal 7 SCL Serial clock input terminal 1 Ao1 2 Ao2 3 Ao3 8 Vcc Power supply terminal 5 GND GND terminal 8-bit resolution D-A converter output terminal ABSOLUTE MAXIMUM RATING Symbol Parameter Conditions Ratings Unit –0.3 to 7.0 V Vcc Supply voltage Vin Input voltage –0.3 to Vcc+0.3 V Vo Output voltage –0.3 to Vcc+0.3 V Pd Power dissipation 417 (DIP) / 272 (FP) mW –20 to 85 °C –55 to 125 °C Topr Operating temperature Tstg Storage temperature ELECTRICAL CHARACTERISTICS (Vcc=+5V±10%,GND=0V,Ta=–20 to 85°C unless otherwise noted) Symbol Parameter Vcc Suplly voltage Icc Supply current MIN Ratings TYP MAX 2.7 5.0 5.5 V CLK=500kHz Operation, IAO=0µA Data : 6Ah (at maximum current ) 0 0.9 2.7 mA SDA=SCL=GND,IAO=0µA 0 0.6 1.8 mA 10 µA 0.2VCC V Test conditions IILK Input leak current VIL Input low voltage VIH Input high voltage VAO Buffer amplifier output voltage range IAO=±100µA IAO Buffer amplifier output drive range Upper side saturation voltage=0.3V Lower side saturation voltage=0.2V SDL Differential nonlinearity SL Nonlinearity SZERO Zero code error SFULL Full scale error Co Output capacitative load Ro Buffer amplifier output inpedance VIN=0 to Vcc –10 0.8VCC IAO=±500µA VCC=5.12V(20mV/LSB) without load (I AO=0) Unit V 0.1 0.2 VCC-0.1 VCC-0.2 V –1.0 1.0 mA –1.0 1.0 LSB –1.5 1.5 LSB –2.0 2.0 LSB –2.0 2.0 LSB 0.1 µF 5.0 MITSUBISHI ELECTRIC V Ω 980714 rev.E ( 2 / 6 ) MITSUBISHI <STD. LINEAR ICs> M62333P/FP M62338P/FP 8-BIT 3CH I2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS I2C BUS LINE CHARACTERISTICS Parameter Symbol Min. Max. units 0 100 KHz fSCL SCL clock frequency tBU F Time the bus must be free before a new transmission can start 4.7 - µs tHD :STA Hold time START Condition. After this period,the first clock pulse is generated. 4.0 - µs tLOW LOW period of the clock 4.7 - µs tHIGH HIGh period of the clock 4.0 - µs tSU:STA Set-up time for START condition (Only relevant for a repeated START condition) 4.7 - µs tHD :DAT Hold time DATA 0 - µs tSU:D AT Set-up time DATA 250 - ns tR Rise time of both SDA and SCL lines - 1000 ns tF Fall time of both SDA and SCL lines - 300 ns tSU:STO Set-up time for STOP condition 4.0 - µs • Note that a transmitter must internally provide at least a hold time to bridge the undefined region (max.300 ns) of the falling edge of SCL. TIMING CHART tR, tF tBUF V IH SDA V IL tHD:STA tSU:DAT tHD:DAT tSU:STA tSU:STO V IH SCL V IL tLOW START tHIGH START MITSUBISHI ELECTRIC STOP START 980714 rev.E ( 3 / 6 ) MITSUBISHI <STD. LINEAR ICs> M62333P/FP M62338P/FP 8-BIT 3CH I2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS I2C BUS FORMAT STA SLAVE ADDRESS W A SUB ADDRESS A STA: start condition W: write(SDA=Low) A: affirmation bit STP: stop condition • SLAVE ADDRESS M62333 1 M62338 Last First 0 0 1 1 1 1 1 Last First X X X X X S1 Last First • SUB ADDRESSS X DAC DATA A STP S0 Don't care CHANNEL SELECT DATA 0 0 1 1 1 0 CHANNEL SELECT DATA S1 S0 Channel selection 0 0 ch1 selection 0 1 1 1 0 1 ch2 selection ch3 selection Don't care • DAC DATA First MSB D7 Last LSB D6 D5 D4 D3 D2 D1 First MSB D7 0 0 0 0 : 1 1 D0 Last LSB D6 0 0 0 0 : 1 1 D5 0 0 0 0 : 1 1 D4 0 0 0 0 : 1 1 D3 0 0 0 0 : 1 1 D2 0 0 0 0 : 1 1 D1 0 0 1 1 : 1 1 D0 0 1 0 1 : 0 1 DAC output Vcc/256 Vcc/256 Vcc/256 Vcc/256 : Vcc/256 Vcc MITSUBISHI ELECTRIC x1 x2 x3 x4 x 255 980714 rev.E ( 4 / 6 ) MITSUBISHI <STD. LINEAR ICs> M62333P/FP M62338P/FP 8-BIT 3CH I2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS TIMING CHART (MODEL) •start condition to slave address bite SDA 1 2 3 4 5 6 7 W 2 3 4 5 6 7 8 A 3 4 5 6 7 8 A A SCL D/A output start condition •sub address bite 1 SDA SCL D/A output •DAC data bite to stop condition 1 SDA 2 SCL D/A output stop condition •Start condition With SCL at HIGH,SDA line goes from HIGH to LOW •Stop condition With SCL at HIGH,SDA line goes from LOW to HIGH (Under normal circumstances,SDA is changed when SCL is LOW) •Acknowledge bit The receiving IC has to pull down SDA line whenever receive slave data. (The transmitting IC releases the SDA line just then transmit 8bit data.) Digital Data Formats STA SLAVE ADDRESS W SUB ADDRESS 2 A DAC DATA 2 A SUB ADDRESS 1 A A DAC DATA 1 SUB ADDRESS n MITSUBISHI ELECTRIC A A DAC DATA n A STP 980714 rev.E (5 / 6 ) MITSUBISHI <STD. LINEAR ICs> M62333P/FP M62338P/FP 8-BIT 3CH I2C BUS D-A CONVERTER WITH BUFFER AMPLIFIERS PRECAUTION FOR USE Supply voltage terminal(Vcc) is also used for D-A converter upper reference voltage setting. IF ripple or spike is input this terminal,accuracy of D-A conversion is down. So,when use this device,please connect capacitor among Vcc to GND for stable D-A conversion. This IC's output amplifier has an advantage to capacitive load.So it's no problem at device action when connect capacitor (0.1µ F MAX) among output to GND for every noise eliminate. APPLICATION EXAMPLE 1 Ao1 VCC 8 10µF Analog output terminals 5V 2 Ao2 5V 3 Ao3 SCL 7 MCU SDA 6 4 GND 5 Note regarding I2C BUS • Purchase of MITSUBISHI ELECTRIC CORPORATION'S I2C components conveys a license under the Philips I2C Patent Rights to use these components an I2C system,provided that the system comforms to I2C Standard Specification as defined by Philips. Keep safety first in your circuit designs! • Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury,fire or property damage. Remember to give due consideration to safety when making your circuit design, in order to prevent fires from spreading, redundancy, malfunction or other mishap. MITSUBISHI ELECTRIC 980714 rev.E ( 6 / 6 )