Rohm BD3506F Ultra low dropout linear regulators for pc chipset Datasheet

TECHNICAL NOTE
High-performance Regulator IC Series for PCs
Ultra Low Dropout
Linear Regulators for PC Chipsets
BD3506F, BD3506EFV
Description
The BD3506F/EFV is an ultra-low dropout linear regulator for chipset that can achieve ultra-low voltage input to ultra-low
voltage output. By using N-MOS FET for built-in power transistor, the regulator can be used at ultra-low I/O voltage
difference up to voltage difference generated by ON resistor (Ron = 120 mΩ/100 mΩ). Because by reducing the I/O
voltage difference, large current (Iomax = 2.5A) output is achieved and conversion loss can be reduced, switching power
supply can be replaced. BD3506F/EFV does not need any choke coil, diode for rectification and power transistor which
are required for switching power supply, total cost of the set can be reduced and compact size can be achieved for the set.
Using external resistors, optional output from 0.65V to 2.5V can be set. In addition, since voltage output start-up time can
be adjusted by using the NRCS terminal, it is possible to meet the power supply sequence of the set.
Features
1) Built-in high-accuracy reference voltage circuit (0.65V±1%)
2) Built-in VCC low input maloperation prevention circuit (Vcc = 4.15V)
3) Reduced rush current by NRCS
4) Built-in ultra-low on-resistor (120/100 mΩ typ) Nch Power MOSFET (BD3506F/BD3506EFV)
5) Built-in current limiting circuit (2.5A min)
6) Built-in thermal shutdown circuit
7) Output variable type (0.65-2.5V)
8) Adoption of SOP8 package (BD3506F): 5.0 x 6.2 x 1.5 (mm)
9) Adoption of high power HTSSOP-B20 package (BD3506EFV): 5.0 x 6.4 x 1.0 (mm)
Applications
Mobile PC, desktop PC, LCD-TV, DVD, digital home appliances
●Line up
Parameter
Ron
Output Current
Package
BD3506F
120mΩ
2.5A
SOP8
BD3506EFV
100mΩ
2.5A
HTSSOP-B20
Oct. 2008
●ABSOLUTE MAXIMUM RATINGS
◎BD3506F
○ABSOLUTE MAXIMUM RATINGS(Ta=25℃)
Parameter
Input Voltage1
Symbol
BD3506F
1
VCC
7*
1
Input Voltage2
VIN
7*
Enable Input Voltage
Ven
7
Power Dissipation1
2
Pd1
560 *
3
BD3506EFV
Unit
1
V
1
7*
V
7
V
7*
-
mW
4
Power Dissipation2
Pd2
690 *
1000 *
mW
Operating Temperature Range
Topr
-10~+100
-10~+100
℃
Storage Temperature Range
Tstg
-55~+125
-55~+125
℃
Tjmax
+150
+150
℃
Maximum Junction Temperature
*1 However, not exceeding Pd.
*2 In the case of Ta≥25°C (no heat radiation board), derated at 4.48 mW/°C.
*3 In the case of Ta≥25°C (when mounting to 70mmx70mmx1.6mm glass epoxy substrate), derated at 5.52 mW/°C.
*4 In the case of Ta≥25°C (when mounting to 70mmx70mmx1.6mm glass epoxy substrate), derated at 8.00 mW/°C.
●RECOMMENDED OPERATING CONDITIONS
◎BD3506F/EFV
○RECOMMENDED OPERATING CONDITIONS(Ta=25℃)
Parameter
Input Voltage1
Input Voltage2
Symbol
MIN
MAX
VCC
4.3
5.5
V
5
VIN
1.2
Output Voltage
Vo
VFB
2.5
V
Enable Input Voltage
Ven
-0.3
5.5
V
CNRCS
0.001
1
uF
Capacitor in NRCS pin
*5 However, irrespective of charging order of VCC and VIN.
* No radiation-resistant design is adopted for the present product.
2/16
VCC-1 *
Unit
V
●ELECTRICAL CHARACTERISTICS
◎BD3506F/BD3506EFV
○ELECTRICAL CHARACTERISTICS
(unless otherwise noted, Ta=25℃ VCC=5V Ven=3V VIN=1.8V R1=3.9KΩ
Standard Value
Parameter
Symbol
MIN
TYP
MAX
Bias Current
ICC
0.7
1.4
Bias current
IST
0
10
Shut-Down Mode Current
VOUT
1.200
Output Voltage
Io
2.5
Maximum Output Current
Iost
2.0
Maximum Short Current
Tcvo
0.01
Temperature coefficient of Output
VFB1
0.643
0.650
0.657
Voltage
Feed Back Voltage 1
VFB2
0.630
0.650
0.670
Feed Back Voltage 2
Reg.l1
0.1
0.5
Line Regulation 1
Reg.l2
0.1
0.5
Line Regulation 2
Reg.L
0.5
10
Dropout Voltage (BD3506F)
dVo
120
200
Dropout Voltage (BD3506EFV)
dVo
100
160
Standby Discharge Current
Iden
150
[Enable]
High level Enable Input Voltage
Enhi
2
5.5
Low level Enable Input Voltage
Enlow
-0.3
0.8
Enable pin Input Current
Ien
7
10
[Voltage Feed Back]
Feed Back terminal Bias Current
IFB
-100
0
100
[NRCS]
NRCS Charge Current
Inrcs
14
20
26
NRCS Standby Voltage
VSTB
0
50
[UVLO]
VCC UVLO
VCCUVLO
4.00
4.15
4.30
VCC UVLO Hysterisis
Vcchys
100
160
220
*5 Design Guarantee
3/16
R2=3.3KΩ)
Unit
Condition
mA
uA Ven=0V
V
Io=50mA
A
A
Vo=0V
%/℃
V
Io=50mA
V
%/V
%/V
mV
mV
mV
mA
Io=0 to 2A, Ta=-10 to 100℃ *5
VCC=4.3V to 5.5V
VIN=1.2V to 3.3V
Io=0 to 2A
Io=1A,VIN=1.2V, Ta=-10 to 100℃ *5
Io=1A,VIN=1.2V, Ta=-10 to 100℃ *5
Ven=0V, Vo=1V
V
V
uA
Ven=3V
nA
uA
mV
Vnrcs=0.5V
Ven=0V
V
mV
Vcc:Sweep-up
Vcc:Sweep-down
●Reference Data
10
⊿Vout
(50mV/div)
EN
8
IIN(uA)
Vin
Vcc
Iout
(1A/div)
6
4
2
Vo
0
0
Fig.2 Input Voltage
SequenceFinal Input Voltage
EN
Fig.1 Transient Response
2
4
VIN(V)
6
8
Fig.3 VIN-IIN(Ta=25℃)
656
EN
EN
655
654
653
Vfb(mV)
Vin
Vcc
Vin
652
651
Vcc
650
649
648
Vo
Vo
647
646
-10
Fig.4 Input Voltage
SequenceFinal Input Voltage
VIN
10
30
50
Ta( ℃)
70
90
Fig.6 Input Voltage
SequenceFinal Input Voltage
VCC
Fig.5 Ta-Vfb
18
16
Vo
20mV/DIV
Vo
20mV/DIV
14
IEN(uA)
12
Io
1A/DIV
Io
1A/DIV
10
8
6
4
2
0
0
Fig.7 Transient Response (rise)
Cout=100uF
Vo
20mV/DIV
Fig.8 Transient Response (fall)
Cout=100uF
Fig.10 Transient Response (rise)
Cout=220uF
2
3
VEN(V)
4
5
Fig.9 VEN-IEN
EN
2V/DIV
EN
2V/DIV
NRCS
0.5V/DIV
NRCS
0.5V/DIV
Io
1A/DIV
1
Vo
0.5V/DIV
Vo
0.5V/DIV
Fig.11 Start up Wave Form
4/16
Fig.12 Shut down Wave Form
700
600
VFB(mV)
500
Vo
20mV/DIV
Vo
50mV/DIV
Io
1A/DIV
Io
1A/DIV
400
300
200
100
0
0
0.2
0.4
0.6
0.8
VNRCS(V)
1
1.2
Fig.13 VNRCS-VFB
Fig.14 Transient Response (fall)
Cout=220uF
Vo
50mV/DIV
Io
1A/DIV
Fig.16 Transient Response (fall)
47u MLCC+30mΩ
5/16
Fig.15 Transient Response (rise)
47u MLCC+30mΩ
●BLOCK DIAGRAM
◎BD3506F
VCC
VCC
4
VCC
Enable
EN
1
UVLO
Reference
VIN
Current
CL
VIN
2
Limit
Block
Vo1
7
CL
UVLO
TSD
Thermal
Vo
8
Vo2
EN
VFB
R2
3
Shutdown
NRCS
R1
TSD
5
6
NRCS
◎BD3506EFV
GND
VCC
17
VCC
VIN1
VCC
EN
13
Reference
Current
CL
UVLO
14
15
Limit
VCC
Block
5
6
7
CL
UVLO
TSD
Thermal
Shutdown
8
9
EN
10
16
NRCS
VIN
VIN2
Vo1
Vo2
Vo3
Vo
Vo4
Vo5
Vo6
R2
FB
R1
TSD
2
4
NRCS
6/16
GND
3
20
◎BD3506F
●PIN CONFIGRATION
●PIN FUNCTION
PIN No.
PIN NAME
EN 1
8 VO2
VIN 2
7 VO1
FB 3
6 NRCS
5 GND
VCC 4
◎BD3506EFV
●PIN CONFIGRATION
N.C. 1
GND2 3
18 N.C.
NRCS
17 VCC
Enable Pin
2
VIN
Input Voltage Pin
3
FB
Output Voltage Feedback
4
VCC
Power Source
5
GND
Ground Pin
6
NRCS
7
VO1
VO1 Pin
8
VO2
VO2 Pin
NRCS(Non Rush Current on
Start Up) time setup
PIN NAME
1
N.C.
2
GND1
Ground1 Pin
3
GND2
Ground2 Pin
4
NRCS
NRCS(Non Rush Current on
Start Up) time setup
5
VO1
VO1 Pin
6
VO2
VO2 Pin
7
VO3
VO3 Pin
8
VO4
VO4 Pin
9
VO5
VO5 Pin
10
VO6
VO6 Pin
11
N.C.
Non connection
12
N.C.
Non connection
13
EN
14
VIN1
Input Voltage1 Pin
15
VIN2
Input Voltage2 Pin
16
FB
17
VCC
Power Source
18
N.C.
Non connection
19
N.C.
Non connection
20
GND3
16 FB
VO2 6
15 VIN2
VO3 7
14 VIN1
VO4 8
EN
PIN No.
20 GND3
19 N.C.
VO1 5
1
●PIN FUNCTION
GND1 2
4
PIN FUNCTION
13 EN
VO5 9
12 N.C.
VO6 10
11 N.C.
7/16
PIN FUNCTION
Non connection
Enable Pin
Output Voltage Feedback
Ground3 Pin
●Block Function
AMP
An error amplifier that compares reference voltage (VREF) to Vo and drives Nch FET (Ron = 120/100 mΩ) of output. The
frequency characteristics are optimized so that low ESR functional polymer capacitor can be used for the output capacitor
and high-speed transient response can be achieved. The input voltage range at the AMP section is GND-2.5V and the
output voltage range of the AMP section is GND-VCC. At the time of EN OFF or UVLO, the output is brought to the LOW
level and the output NchFET is turned OFF.
EN
By the logic input pin, regulator ON/OFF is controlled. At the time of OFF, the circuit current is controlled to be 0 μA to
reduce the standby current consumption of the apparatus. In addition, EN turns ON FET that can discharge NRCS
terminal Vo and removes excess electric charge to prevent maloperation of IC on the load side. Since there is no electrical
connection with the Vcc terminal as is the case of Di for electrostatic measures, it does not depend on the input sequence.
UVLO
UVLO turned OFF output to prevent output voltage from making maloperation at the time of Vcc reduced voltage. Same
as EN, UVLO discharges NRCS Vo. When voltage exceeds the threshold voltage (TYP 4.15V), UVLO starts output.
CURRENT LIMIT
In the event the output current that exceeds the current (2.5A or more) set inside the IC flows when output is turned ON,
output voltage is attenuated to protect the IC on the load side. When current reduces, output voltage returns to the set
voltage.
NRCS
Connecting an external capacitor to the counter-GND of NRCS pin can achieve soft start. The output voltage startup time
is determined by the time when the NRCS terminal reaches VFB (0.65V). During start-up, the NRCS terminal serves as a
constant current source of 20 uA (Typ.) output, and charges the capacitor externally connected.
TSD (Thermal Shut down)
In order to prevent thermal breakdown and thermal runaway of the IC, the output is turned OFF when chip temperature
becomes high. In addition, when temperature returns to the specified temperature, the output is recovered. However,
since the temperature protection circuit is originally built in to protect the IC itself, thermal design within Tj(max) is
requested.
VIN
This is a large-current supply line. The VIN terminal is connected to the rain of output NchFET. Since there is no
electrical connection with the Vcc terminal as is the case of Di for electrostatic measures, it does not depend on the input
sequence. However, because there is body Di of output NchFET between VIN and Vo, there is electrical connection
(Di-connection) between VIN and Vo. Consequently, when the output is turned ON/OFF by VIN, reverse current flows from
Vo to VIN, to which care must be taken.
8/16
●TIMING CHART
EN ON/OFF
VIN
VCC
EN
NRCS
Start up Time
Vo
t
VCC ON/OFF
VIN
UVLO
hysterisis
VCC
EN
NRCS
Start up Time
Vo
t
9/16
●Evaluation Board
■ BD3506F Evaluation Board Circuit
U1
EN
1
VIN
2
Cin1
3
BD3506F
EN
VO2
VIN
VO1
FB
NRCS
Vo
8
7
R1
6
R2
GND
VCC
4
GND
VCC
CO
5
CNRCS
Ccc
■ BD3506F Evaluation Board Application Components
Part No
U1
R1
R2
Value
3.3k
3.9k
Company
ROHM
ROHM
ROHM
Parts Name
BD3506F
MCR03EZPF3301
MCR03EZPF3901
Part No
Ccc
Cin1
Co
C6
Value
1uF
10uF
220uF
0.01uF
Company
ROHM
ROHM
SANYO,etc
ROHM
Parts Name
MCH184CN105K
MCH218CN106K
2R5TPE220MF
■ BD3506F Evaluation Board Layout
Silk Screen
TOP Layer
For Evaluation Board, BD3506EFV is available.
10/16
Bottom Layer
●Recommended Circuits
R2
VOUT(1.2V)/2.5A
1
8
2
7
3
6
4
5
Ven
C3
+
C2
VIN
R1
C4
C1
Vcc
Part No
R1/R2
Value
6.5k/5.5k
Notes for use
The present IC can set output voltage by external reference voltage (VR) and value of output
voltage setting resistors (R1, R2).
Output voltage can be set by VRxR2/(R1+R2) but it is
recommended to use at the resistance value (total: about 10 kΩ) which is not susceptible to
VREF bias current (±100 nA).
C3
100μF
Connect the output capacitor between Vo1, Vo2 terminals and GND terminal without fail in
order to stabilize output voltage.
The output capacitor has a role to compensate for the phase
of loop gain and to reduce output voltage fluctuation when load is rapidly changed.
When
there is an insufficient capacity value, there is a possibility to cause oscillation, and when the
equivalent serial resistance (ESR) of the capacitors is large, output voltage fluctuation is
increased when load is rapidly changed.
About 100-µF high-performance electrolytic
capacitors are recommended but output capacitor greatly depends on temperature and load
conditions.
In addition, when only ceramic capacitors with low ESR are used, or various
capacitors are connected in series, the total phase allowance of loop gain becomes not
sufficient, and oscillation may result.
Thoroughgoing confirmation at application temperature
and under load range conditions is requested.
C1
0.1μF
The input capacitor plays a part to lower output impedance of a power supply connected to
input terminals (Vcc).
When output impedance of this power supply increases, the input
voltages (Vcc,) become unstable and there is a possibility of giving rise to oscillation and
degraded ripple rejection characteristics.
The use of capacitors of about 0.1 μF with low ESR,
which provide less capacity value changes caused by temperature changes, is recommended,
but since input capacitor greatly depends on characteristics of the power supply used for input,
substrate wiring pattern, thoroughgoing confirmation under the application temperature and
load range, is requested.
C2
10μF
The input capacitor plays a part to lower output impedance of a power supply connected to
input terminals (VIN).
When output impedance of this power supply increases, the input
voltages (VIN) become unstable and there is a possibility of giving rise to oscillation and
degraded ripple rejection characteristics.
The use of capacitors of about 10 μF with low ESR,
which provide less capacity value changes caused by temperature changes, is recommended,
but since input capacitor greatly depends on characteristics of the power supply used for input,
substrate wiring pattern, thoroughgoing confirmation under the application temperature and
load range, is requested.
C4
1μF
To the present IC, there mounted is a function (Non Rush Current on Start-up: NRCS) to
prevent rush current from VIN to load and output capacitor via Vo at the output voltage start-up.
When the EN terminal is reset from High or UVLO, constant current is allowed to flow from the
NRCS terminal.
By this current, voltage generated at the NRCS terminal becomes the
reference voltage and output voltage is started.
In order to stabilize the NRCS set time, it is
recommended to use a capacitor (B special) with less capacity value change caused by
temperature change.
11/16
●About heat loss
In designing heat, operate the apparatus within the following conditions.
(Because the following temperatures are warranted temperature, be sure to take margin, etc. into account.)
1. Ambient temperature Ta shall be not more than 100°C.
2. Chip junction temperature Tj shall be not more than 150°C.
Chip junction temperature Tj can be considered under the following two cases.
①Chip junction temperature Tj is found from
②Chip junction temperature Tj is found from ambient temperature Ta:
IC surface temperature TC under actual
Tj=Ta+θj-a×W
application conditions:
<Reference value>
Tj=TC+θj-c×W
<Reference value>
θj-a:SOP8
222.0℃/W (IC only)
θj-c:SOP8 41.0℃/W
181.0℃/W Single-layer substrate
HTSSOP-B20 45.0℃/W
(substrate surface copper foil area: less 3%)
Substrate size:70×70×1.6mm
θj-a:HTSSOP-B20 125.0℃/W Single-layer substrate
(Substrate surface capper
(substrate surface copper foil area: less 3%))
foil area:less3%)
86.2℃/W 2nd-layer
2
(substrate surface copper foil area:15×15mm )
θj-a:HTSSOP-B20 125.0℃/W
54.3℃/W 2nd-layer
86.2℃/W
2
(substrate surface copper foil area: 70×70mm )
54.3℃/W
39.1℃/W 4th-layer
39.1℃/W
2
(substrate surface copper foil area: 70×70mm )
Substrate size 70×70×1.6mm3 (thermal vias in the board.)
Most of heat loss in BD3506F/EFV occurs at the output Nch FET. The power lost is determined by multiplying the voltage
between VIN and Vo by the output current. Confirm voltage and output current conditions of VIN and Vo used, and collate
them with the thermal derating characteristics. Because BD3506EFV employs the power PKG, the thermal derating
characteristics significantly vary in accord with the pc board conditions. When designing, care must be taken to the size of
a pc board to be used.
Power dissipation (W) = {Input voltage (VIN) – Output voltage (V0≒VREF)}×Io (averaged)
Ex.) If VIN = 1.8 volts, V0=1.2 volts, and Io (averaged)=1.5 A, the power dissipation is given by the following:
Power dissipation (W) =(1.8 volts – 1.2 volts) × 1.5 (A)
= 0.9 W
●EQUIVALENT CIRCUIT
Vcc
Vcc
1kΩ
NRCS
1kΩ
1kΩ
1kΩ
VIN
1kΩ
10kΩ
10kΩ
1kΩ
Vcc
Vcc
1kΩ
VFB
1kΩ
Vo1
Vo2
50kΩ
EN
350kΩ
100kΩ
1kΩ
100kΩ
20pF
12/16
10kΩ
●NOTE FOR USE
1. Input terminals(VCC,VIN,EN)
In the present IC, EN terminal, VIN terminal, and VCC terminal have an independent construction. In addition, in order
to prevent malfunction at the time of low input, the UVLO function is equipped with the VCC terminal. They begin to
start output voltage when all the terminals reach threshold voltage without depending on the input order of input
terminals.
2. Operating range
Within the operating range, the operation and function of the circuits are generally guaranteed at an ambient
temperature within the range specified. The values specified for electrical characteristics may not be guaranteed, but
drastic change may not occur to such characteristics within the operating range.
3. Permissible dissipation
With respect to the permissible dissipation, the thermal derating characteristics are shown in the Exhibit, which we hope
would be used as a good-rule-of-thumb. Should the IC be used in such a manner to exceed the permissible dissipation,
reduction of current capacity due to chip temperature rise, and other degraded properties inherent to the IC would result.
You are strongly urged to use the IC within the permissible dissipation.
4. Built-in thermal shutdown protection circuit
The thermal shutdown circuit is first and foremost intended for interrupt IC from thermal runaway, and is not intended to
protect and warrant the IC. Consequently, never attempt to continuously use the IC after this circuit is activated or to
use the circuit with the activation of the circuit premised.
5. Inspection by set substrate
In the event a capacitor is connected to a pin with low impedance at the time of inspection with a set substrate, there is a
fear of applying stress to the IC. Therefore, be sure to discharge electricity for every process. As electrostatic
measures, provide grounding in the assembly process, and take utmost care in transportation and storage. Furthermore,
when the set substrate is connected to a jig in the inspection process, be sure to turn OFF power supply to connect the jig
and be sure to turn OFF power supply to remove the jig.
6. For the present product, thoroughgoing quality control is carried out, but in the event that applied voltage, working
temperature range, and other absolute maximum rating are exceeded, the present product may be destroyed.
Because it is unable to identify the short mode, open mode, etc., if any special mode is assumed, which exceeds the
absolute maximum rating, physical safety measures are requested to be taken, such as fuses, etc..
7. The use in the strong electromagnetic field may sometimes cause malfunction, to which care must be taken.
8. In the event that load containing a large inductance component is connected to the output terminal, and generation of
back-EMF at the start-up and when output is turned OFF is assumed, it is requested to insert a protection diode.
(Example)
OUTPUT PIN
9. We are certain that examples of applied circuit diagrams are recommendable, but you are requested to thoroughly
confirm the characteristics before using the IC. In addition, when the IC is used with the external circuit changed,
decide the IC with sufficient margin provided while consideration is being given not only to static characteristics but also
variations of external parts and our IC including transient characteristics.
13/16
10. The present IC is a monolithic IC and has P+ isolation between elements to separate elements and a P substrate. With this
P layer and N layer of each element, PN junction is formed, and various parasitic elements are formed.
For example, when resistors and transistors are connected to terminals as illustrated below,
at the resistor, when GND>terminal A, and at transistor (NPN), when GND>terminal B,
PN junction works as a parasitic diode.
at the transistor (NPN), when GND>terminal B,
the parasitic NPN transistor is operated by the N-layer of other element adjacent to the parasitic diode.
The parasitic element is inevitably formed because of the IC construction. The operation of the parasitic element gives rise
to mutual interference between circuits and results in malfunction, and eventually, breakdown. Consequently, take utmost
care not to use the IC to operate the parasitic element such as applying voltage lower than GND (P substrate) to the input
terminal.
(PIN A)
NPN Transistor Structure (NPN)
Resistor
(PIN B)
(PIN A)
B
E
C
Parasitic diode
GND
GND
N
P+
P+
P
N
(PIN B)
P+
N
N
N
N
P substrate
P
P+
C
N
Parasitic diode
B
E
P substrate
GND
GND
GND
Parasitic diode
Nearby other device
Parasitic diode
●POWER DISSIPATION
SOP8
HTSSOPB-20
(1) Mounted on board
70mm×70mm×1.6mm Glass-epoxy PCB
θj-a=181℃/W
(2) Without heat sink
θj-a=222℃/W
[mW]
700
PCB size:70mm×70mm×1.6mmt
[W]
(PCB with Thermal Via)
5
PCB①:Single-layer substrate
PCB②:Double-layer substrate
(1) 690mW
600
(substrate surface copper foil area 15mm×15mm)
4
Power Dissipation Pd
Power Dissipation [Pd]
measure:TH-156(Kuwano-Denki)
measure condition:Rohm Standard Board
500
(2) 560mW
400
100℃
300
200
PCB③:Double-layer substrate
④3.20W
3
(substrate surface copper foil area 70mm×70mm)
PCB④:Fourth-layer substrate
(substrate surface copper foil area 70mm×70mm)
③2.30W
PCB①:θja=125.0℃/W
2
PCB②:θja=86.2℃/W
1
②1.45W
PCB③:θja=54.3℃/W
①1.00W
PCB④:θja=39.1℃/W
100
0
0
25
50
75
100
125
Ambient Temperature [Ta]
150
0
[℃]
25
50
75
100
125
Ambient Temperature [Ta]
14/16
150
[℃]
●Ordering part number
B
D
3
Part Number
5
0
6
F
Package Type
・BD3506
E
―
2
E2 Embossed carrier tape
・F : SOP8
・EFV : HTSSOP-B20
●Package specification
SOP8
<Tape and Reel information>
<Dimension>
1
4
E2
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
0.15±0.1
1234
1234
1234
1234
Direction of feed
1Pin
Reel
(Unit:mm)
1234
1234
1.27
0.4±0.1
1234
0.1
1234
1.5±0.1
0.11
6.2±0.3
4.4±0.2
0.3Min.
5
Embossed carrier tape
2500pcs
Direction
of feed
5.0±0.2
8
Tape
Quantity
※When you order , please order in times the amount of package quantity.
HTSSOP-B20
<Dimension>
<Tape and Reel information>
6.5 ± 0.1
11
6.4 ± 0.2
4.4 ± 0.1
0.5 ± 0.15
1.0 ± 0.2
20
1
10
Embossed carrier tape
Quantity
2500pcs
Direction
E2
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
of feed
0.17 +0.05
−0.03
S
0.08 S
1234
1234
1234
1pin
1234
1234
(Unit:mm)
Reel
1234
0.2 +0.05
−0.04
1234
0.65
1234
1.0Max.
0.85 ± 0.05
0.08 ± 0.05
0.325
Tape
Direction of feed
※When you order , please order in times the amount of package quantity.
15/16
16/16
Catalog No.08T437A '08.10 ROHM ©
Appendix
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM
CO.,LTD.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you
wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM
upon request.
Examples of application circuits, circuit constants and any other information contained herein illustrate the
standard usage and operations of the Products. The peripheral conditions must be taken into account when
designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document. However, should
you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and examples of
application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or
exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility
whatsoever for any dispute arising from the use of such technical information.
The Products specified in this document are intended to be used with general-use electronic equipment or
devices (such as audio visual equipment, office-automation equipment, communication devices, electronic
appliances and amusement devices).
The Products are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or
malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard against the
possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as
derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your
use of any Product outside of the prescribed scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or system
which requires an extremely high level of reliability the failure or malfunction of which may result in a direct
threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment,
aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no
responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended
to be used for any such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may be controlled under
the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact your nearest sales office.
ROHM Customer Support System
www.rohm.com
Copyright © 2008 ROHM CO.,LTD.
THE AMERICAS / EUROPE / ASIA / JAPAN
Contact us : webmaster@ rohm.co. jp
21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan
TEL : +81-75-311-2121
FAX : +81-75-315-0172
Appendix1-Rev3.0
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