TI OPA1S2385 250-mhz, cmos transimpedance amplifier (tia) with integrated switch and buffer Datasheet

OPA1S2384
OPA1S2385
www.ti.com
SBOS645A – DECEMBER 2012 – REVISED JUNE 2013
250-MHz, CMOS Transimpedance Amplifier (TIA)
with Integrated Switch and Buffer
Check for Samples: OPA1S2384, OPA1S2385
FEATURES
DESCRIPTION
•
•
•
•
•
•
•
The OPA1S2384 and OPA1S2385 (OPA1S238x)
combine high bandwidth, FET-input operational
amplifiers with a fast SPST CMOS switch designed
for applications that require the tracking and capturing
of fast signals.
1
2
•
•
•
•
•
•
Wide Bandwidth: 250 MHz
High Slew Rate: 150 V/μs
Rail-to-Rail Input/Output (I/O)
Fast Settling
Low Input Bias Current: 3 pA
High Input Impedance: 1013 Ω || 2 pF
SPST Switch:
– Low On-Resistance: 4 Ω
– Low Charge Injection: 1 pC
– Low Leakage Current: 10 pA
Flexible Configuration:
– Transimpedance Gain
– External Hold Capacitor
– Post-Gain
Single Supply: +2.7 V to +5.5 V
Quiescent Current: 9.2 mA
Small Package: 3-mm × 3-mm SON-10
OPA1S2384: Internal Switch Active High
OPA1S2385: Internal Switch Active Low
APPLICATIONS
•
•
•
•
•
Communications:
– Optical Networking: EPON, GPON
– Signal Strength Monitors
– Burst-Mode RSSI
Photodiode Monitoring
Fast Sample-and-Hold Circuits
Charge Amplifiers
High-Speed Integrators
By providing a 250-MHz gain bandwidth product and
rail-to-rail input/output swings in single-supply
operation, the OPA1S238x is capable of wideband
transimpedance gain and large output signal swing
simultaneously. Low input bias current and voltage
noise (6 nV/√Hz) make it possible to amplify
extremely low-level input signals for maximum signalto-noise ratio.
The characteristics of the OPA1S238x make this
device ideally suited for use as a wideband
photodiode amplifier.
In addition, the CMOS switch and subsequent buffer
amplifier allow the OPA1S238x to be easily
configured as a fast sample-and-hold circuit. The
external hold capacitor and post-gain options make
the OPA1S238x easily adaptable to a wide range of
speed and accuracy requirements. Note that the
OPA1S2384 closes the internal switch with a logichigh signal, and the OPA1S2385 closes the internal
switch with a logic-low signal.
The OPA1S238x are optimized for low-voltage
operation from as low as +2.7 V up to +5.5 V. These
devices are specified for a temperature range of
–40°C to +85°C.
V-
V+
SC
(1)
OPA1S2384/5
+IN A
A
B
OUT B
-IN A
OUT A
(1)
IN S
+IN B -IN B
The OPA1S2384 internal switch is active
high; the OPA1S2384 internal switch is
active low.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012–2013, Texas Instruments Incorporated
OPA1S2384
OPA1S2385
SBOS645A – DECEMBER 2012 – REVISED JUNE 2013
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE INFORMATION (1)
(1)
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
PRODUCT
PACKAGE-LEAD
PACKAGE
DESIGNATOR
OPA1S2384
SON-10
DRC
–40°C to +85°C
OVAQ
OPA1S2385
SON-10
DRC
–40°C to +85°C
OUZQ
ORDERING NUMBER
OPA1S2384IDRCT
OPA1S2384IDRCR
OPA1S2385IDRCT
OPA1S2385IDRCR
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the
product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range (unless otherwise noted).
OPA1S238x
UNIT
6
V
(V–) – 0.3 to (V+) + 0.3
V
(2)
±10
mA
On-state switch current; VIN S, V+IN B = 0 to V+
±20
mA
Output (OUT A, OUT B) short-circuit current (3)
Continuous
Digital input voltage range (SC pin)
–0.3 to +6
V
Supply voltage, V+ to V–
Signal input terminals, op amp
section
Voltage (2)
Current
Digital input clamp current (SC pin)
–50
mA
Operating temperature, TA
–40 to +125
°C
Storage temperature, Tstg
–65 to +150
°C
Junction temperature, TJ
Electrostatic discharge (ESD)
ratings
(1)
(2)
(3)
2
+150
°C
Human body model (HBM)
4000
V
Charged-device model (CDM)
1000
V
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails should
be current limited to 10 mA or less.
Short-circuit to ground, one amplifier per package.
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SBOS645A – DECEMBER 2012 – REVISED JUNE 2013
ELECTRICAL CHARACTERISTICS: Amplifier Section, VSS = +2.7 V to +5.5 V (1) (2)
At TA = +25°C, RL = 1 kΩ connected to VS / 2, and VO = VCM = VS / 2, unless otherwise noted.
OPA1S238x
PARAMETER
CONDITIONS
MIN
TYP
MAX
2
8
UNIT
OFFSET VOLTAGE
VOS
Input offset voltage
ΔVOS/ΔT
Input offset voltage vs temperature
TA = –40°C to +85°C
PSRR
Input offset voltage vs power supply
VCM = (VS / 2) – 0.65 V
0.2
Channel separation
f = 5 MHz
33
mV
6
µV/°C
0.8
mV/V
µV/V
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
CMRR
Common-mode rejection ratio
No phase reversal, rail-to-rail input
(V–) – 0.1
(V+) + 0.1
V
VS = 5.5 V, (V–) – 0.1 V < VCM < (V+) – 2 V
66
80
dB
VS = 3.3 V, (V–) – 0.1 V < VCM < (V+) + 0.1 V
50
68
dB
INPUT BIAS CURRENT
IB
Input bias current
±3
±50
pA
IOS
Input offset current
±1
±50
pA
NOISE
f = 1 MHz
6
nV/√Hz
f = 10 MHz
26
nV/√Hz
f = 1 MHz
50
fA/√Hz
Differential
2
pF
Common-mode
2
pF
Input noise voltage density
Input current noise density
INPUT CAPACITANCE
OPEN-LOOP GAIN
AOL
Open-loop voltage gain
VS = 2.7 V, 0.3 V < VO < (V+) – 0.3 V, RL = 1 kΩ
88
100
dB
VS = 5.5 V, 0.3 V < VO < (V+) – 0.3 V, RL = 1 kΩ
90
110
dB
TA = –40°C to +85°C
VS = 5.5 V, 0.3 V < VO < (V+) – 0.3 V, RL = 1 kΩ
84
dB
FREQUENCY RESPONSE
Gain bandwidth product
Small-signal bandwidth
SR
Slew rate
VS = 3.3 V, RL = 1 kΩ, CL = 10 pF, G = 10
90
MHz
VS = 5.0 V, RL = 1 kΩ, CL = 10 pF, G = 10
100
MHz
VS = 5.0 V, G = 1, VO = 0.1 VPP, RF = 25 Ω
250
MHz
VS = 5.0 V, G = 2, VO = 0.1 VPP, RF = 25 Ω
90
MHz
VS = 3.3 V, G = 1, 2-V step
110
V/µs
VS = 5 V, G = 1, 2-V step
130
V/µs
VS = 5 V, G = 1, 4-V step
150
V/µs
tr
Rise time
VS = 5 V, G = 1, VO = 2 VPP, 10% to 90%
11
ns
tf
Fall time
VS = 5 V, G = 1, VO = 2 VPP, 90% to 10%
11
ns
To 0.1%, VS = 3.3 V, G = 1, 2-V step
30
ns
To 0.01%, VS = 3.3 V, G = 1, 2-V step
60
ns
5
ns
ts
Settling time
Overload recovery time
VS = 3.3 V, VIN × gain = VS
Voltage output swing from supply rails
VS = 5.5 V, RL = 1 kΩ
100
mV
VS = 5.0 V
100
mA
VS = 3.3 V
50
mA
OUTPUT
Short-circuit current
Closed-loop output impedance
Open-loop output impedance
(1)
(2)
0.05
Ω
35
Ω
Parameters with MIN and MAX specification limits are 100% production tested at +25ºC, unless otherwise noted. Over temperature
limits are based on characterization and statistical analysis.
Specified by design and/or characterization; not production tested.
Copyright © 2012–2013, Texas Instruments Incorporated
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OPA1S2384
OPA1S2385
SBOS645A – DECEMBER 2012 – REVISED JUNE 2013
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ELECTRICAL CHARACTERISTICS: Amplifier Section, VSS = +2.7 V to +5.5 V(1)(2) (continued)
At TA = +25°C, RL = 1 kΩ connected to VS / 2, and VO = VCM = VS / 2, unless otherwise noted.
OPA1S238x
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLY
VS
Operating supply range
IQ
Quiescent current (per amplifier)
2.7
VS = 5.5 V, IO = 0 mA
9.2
5.5
V
12
mA
TEMPERATURE
Specified range
–40
+85
°C
Operating range
–40
+125
°C
Storage range
–65
+150
°C
MAX
UNIT
ELECTRICAL CHARACTERISTICS: Switch Section (1)
At TA = +25°C and VS = 3.3 V, unless otherwise noted.
OPA1S238x
PARAMETER
CONDITIONS
MIN
TYP
DC
Analog voltage range
VS = 2.7 V to 5.5 V
Ron
On-state resistance
VIN = V+ / 2, ICOM = 10 mA
0
Ilkg
Off-state leakage current
VIN = V+ / 2, V+IN B = 0 V
tON
Turn-on time
VIN = V+ / 2, CL = 35 pF, RL = 300 Ω
20
tOFF
Turn-off time
VIN = V+ / 2, CL = 35 pF, RL = 300 Ω
15
ns
QC
Charge injection
CL = 1 nF, VBIAS = 4 V
1
pC
BW
Bandwidth
Signal = 0 dBm (0.632 mVPP, 50 Ω)
450
MHz
Off isolation
f = 1 MHz, signal = 1 Vrms, 50 Ω
–82
dB
Off capacitance (IN_S)
Switch open, f = 1 MHz, VBIAS = 0 V
6.5
pF
Off capacitance (+IN_B)
Switch open, f = 1 MHz, VBIAS = 0 V
8.5
pF
On capacitance (IN_S)
Switch closed, f = 1 MHz, VBIAS = 0 V
13
pF
On capacitance (+IN_B)
Switch closed, f = 1 MHz, VBIAS = 0 V
15
pF
–0.5
V+
V
4
16
Ω
0.01
0.5
nA
DYNAMIC
ns
DIGITAL CONTROL INPUT (SC pin)
VIH
High-level input voltage
VIL
Low-level input voltage
Ilkg(SC)
VS = 5.5 V, TA = –40°C to +85°C
2.4
VS+
V
VS = 3.3 V, TA = –40°C to +85°C
2.0
VS+
V
0
0.9
V
0.5
µA
5
µA
VIN
Input leakage current
S
= V+ or 0 V
–0.5
TA = –40°C to +85°C
0.01
–5
Input capacitance
(1)
3
pF
Parameters with MIN and MAX specification limits are 100% production tested at +25ºC, unless otherwise noted. Over temperature
limits are based on characterization and statistical analysis.
THERMAL INFORMATION
OPA1S238x
THERMAL METRIC
(1)
DRC (SON)
UNITS
10 PINS
θJA
Junction-to-ambient thermal resistance
46.2
θJCtop
Junction-to-case (top) thermal resistance
53.8
θJB
Junction-to-board thermal resistance
21.7
ψJT
Junction-to-top characterization parameter
1.1
ψJB
Junction-to-board characterization parameter
21.9
θJCbot
Junction-to-case (bottom) thermal resistance
6.1
(1)
4
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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SBOS645A – DECEMBER 2012 – REVISED JUNE 2013
PIN CONFIGURATION
DRC PACKAGE
DFN-10
(TOP VIEW)
OUT A
1
10
SC
IN S
2
9
V+
-IN A
3
8
OUT B
7
-IN B
6
+IN B
A
+IN A
4
B
V-
5
PIN DESCRIPTIONS
PIN
NAME
NO.
+IN A
4
Noninverting input of amplifier channel A
DESCRIPTION
–IN A
3
Inverting input of amplifier channel A
+IN B
6
Noninverting input of amplifier channel B
–IN B
7
Inverting input of amplifier channel B
IN S
2
Switch input
OUT A
1
Voltage output of amplifier channel A
OUT B
8
Voltage output of amplifier channel B
SC
10
Switch control pin. This logic input pin controls the SPST switch operation. For the OPA1S2384, a logic-low signal opens
the switch and a logic-high signal closes the switch. For the OPA1S2385, a logic-low signal closes the switch and a logic
high signal opens the switch.
V+
9
Positive supply voltage pin. Connect this pin to a voltage +2.7V to +5.5V.
V–
5
Negative supply voltage pin. Connect this pin to the ground (0 V) rail of the single-supply system power supply.
FUNCTIONAL BLOCK DIAGRAM
V-
V+
SC
(1)
OPA1S2384/5
+IN A
A
B
OUT B
-IN A
OUT A
(1)
IN S
+IN B -IN B
The OPA1S2384 internal switch is active high; the OPA1S2385 internal switch is active low.
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OPA1S2384
OPA1S2385
SBOS645A – DECEMBER 2012 – REVISED JUNE 2013
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TYPICAL CHARACTERISTICS
Table 1. Characteristic Performance Measurements
TITLE
FIGURE
Offset Voltage Production Distribution
Figure 1
Common-Mode Rejection Ratio and Power-Supply Rejection Ratio vs Frequency
Figure 2
Input Bias Current vs Temperature
Figure 3
Input Voltage and Current Noise Spectral Density vs Frequency
Figure 4
Open-Loop Gain and Phase
Figure 5
Noninverting Small-Signal Frequency Response
Figure 6
Inverting Small-Signal Frequency Response
Figure 7
Noninverting Small-Signal Step Response
Figure 8
Noninverting Large-Signal Step Response
Figure 9
Frequency Response for Various RL
Figure 10
Frequency Response for Various CL
Figure 11
Recommended RS vs Capacitive Load
Figure 12
Output Voltage Swing vs Output Current
Figure 13
OPEN−Loop Gain vs Temperature
Figure 14
Closed−Loop Output Impedance vs Frequency
Figure 15
Maximum Output Voltage vs Frequency
Figure 16
Output Settling Time to 0.1%
Figure 17
Supply Current vs Temperature
Figure 18
RON vs Temperature
Figure 19
RON vs VCOM
Figure 20
Leakage Current vs Temperature
Figure 21
Charge-Injection (QC) vs VCOM
Figure 22
tON and tOFF vs Supply Voltage
Figure 23
tON and tOFF vs Temperature (V+ = 5 V)
Figure 24
Gain vs Frequency
Figure 25
Off Isolation vs Frequency
Figure 26
6
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SBOS645A – DECEMBER 2012 – REVISED JUNE 2013
TYPICAL CHARACTERISTICS
Amplifier conditions: At TA = +25°C, RL = 1 kΩ connected to VS / 2, and VO = VCM = VS / 2, unless otherwise noted.
100
CMRR
Population
CMRR, PSRR (dB)
80
PSRR+
60
PSRR40
20
0
-8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3
Offset Voltage (mV)
4 5 6
7 8
10k
Figure 1. OFFSET VOLTAGE PRODUCTION DISTRIBUTION
100M
1G
10k
Voltage Noise (nV/ÖHz),
Current Noise (fA/ÖHz)
Input Bias Current (pA)
1M
10M
Frequency (Hz)
Figure 2. COMMON-MODE REJECTION RATIO AND
POWER-SUPPLY REJECTION RATIO vs FREQUENCY
10k
1k
100
10
1k
Voltage Noise
Current Noise
100
10
1
1
-55
-35
-15
5
25
45
65
Temperature (°C)
85
105 125 135
10
100
1k
10k
100k
1M
3
G = +1
RF = 25 W
VO = 0.1 VPP
160
0
Normalized Gain (dB)
140
Phase
100
80
60
40
Gain
20
100M
Figure 4. INPUT VOLTAGE AND CURRENT NOISE
SPECTRAL DENSITY vs FREQUENCY
180
120
10M
Frequency (Hz)
Figure 3. INPUT BIAS CURRENT vs TEMPERATURE
Open- Loop Phase (degrees)
Open- Loop Gain (dB)
100k
0
-3
G = +2, RF = 604 W
G = +5, RF = 604 W
-6
G = +10, RF = 604 W
-9
-12
-20
-40
10
100
1k
10k 100k
1M
Frequency (Hz)
10M
100M
Figure 5. OPEN-LOOP GAIN AND PHASE
1G
-15
100k
1M
10M
Frequency (Hz)
100M
1G
Figure 6. NONINVERTING SMALL-SIGNAL FREQUENCY
RESPONSE
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TYPICAL CHARACTERISTICS (continued)
Amplifier conditions: At TA = +25°C, RL = 1 kΩ connected to VS / 2, and VO = VCM = VS / 2, unless otherwise noted.
3
VO = 0.1 VPP, RF = 604 W
Output Voltage (40 mV/div)
Normalized Gain (dB)
0
-3
G = -1
-6
G = -5
G = -2
-9
G = -10
-12
-15
100k
1M
10M
Frequency (Hz)
100M
Time (20 ns/div)
1G
Figure 7. INVERTING SMALL-SIGNAL FREQUENCY
RESPONSE
Figure 8. NONINVERTING SMALL-SIGNAL STEP
RESPONSE
3
Output Voltage (500 mV/div)
RL = 10 kW
Normalized Gain (dB)
0
-3
RL = 1 kW
-6
RL = 100 W
-9
-15
100k
Time (20 ns/div)
Figure 9. NONINVERTING LARGE-SIGNAL
STEP RESPONSE
9
3
1M
RL = 50 W
10M
Frequency (Hz)
100M
1G
Figure 10. FREQUENCY RESPONSE FOR VARIOUS RL
160
G = +1
VO = 0.1 VPP
RS = 0 W
120
100
0
-3
CL = 47 pF
80
-6
60
-9
40
VIN
CL = 5.6 pF
RS
VO
CL
1 kW
20
-12
-15
100k
For 0.1-dB
Flatness
140
CL = 100 pF
RS (W)
Normalized Gain (dB)
6
0
1M
10M
Frequency (Hz)
100M
1G
Figure 11. FREQUENCY RESPONSE FOR VARIOUS CL
8
G = +1
RF = 0 W
VO = 0.1 VPP
CL = 0 pF
-12
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1
10
100
Capacitive Load (pF)
1k
Figure 12. RECOMMENDED RS vs CAPACITIVE LOAD
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TYPICAL CHARACTERISTICS (continued)
Amplifier conditions: At TA = +25°C, RL = 1 kΩ connected to VS / 2, and VO = VCM = VS / 2, unless otherwise noted.
5
120
4
110
Open- Loop Gain (dB)
Output Voltage (V)
RL = 1 kW
3
+125°C
+25°C
-55°C
2
100
90
1
80
0
70
0
25
50
75
100
125
Output Current (mA)
150
175
200
-55
Figure 13. OUTPUT VOLTAGE SWING vs OUTPUT
CURRENT
-35
-15
5
25
45
65
Temperature (°C)
85
105 125 135
Figure 14. OPEN−LOOP GAIN vs TEMPERATURE
6
100
VS = 5.5 V
10
Output Voltage (VPP)
Output Impedance (W)
5
1
0.1
Maximum Output
Voltage without
Slew- Rate
Induced Distortion
4
3
VS = 2.7 V
2
1
ZO
0
0.01
100k
1M
10M
Frequency (Hz)
100M
Figure 15. CLOSED−LOOP OUTPUT IMPEDANCE vs
FREQUENCY
0.5
1
1G
12
11
Supply Current (mA)
0.3
Output Error (%)
100
Figure 16. MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
VO = 2 VPP
0.4
10
Frequency (MHz)
0.2
0.1
0
-0.1
-0.2
10
9
8
-0.3
7
-0.4
-0.5
0
10
20
30
40
50
60
Time (ns)
70
80
90
Figure 17. OUTPUT SETTLING TIME TO 0.1%
100
6
-55
-35
-15
5
25
45
65
Temperature (ƒC)
85
105
125
C001
Figure 18. SUPPLY CURRENT vs TEMPERATURE
(VS = 5.5 V, IO = 0 mA)
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TYPICAL CHARACTERISTICS (continued)
Amplifier conditions: At TA = +25°C, RL = 1 kΩ connected to VS / 2, and VO = VCM = VS / 2, unless otherwise noted.
10
6
TA = +25°C
5.5
8
5
V+ = 3 V
6
rON (W)
RON ( )
4.5
4
4
3.5
V+ = 5 V
3
2
2.5
0
2
-55
-35
-15
5
25
45
65
Temperature (ƒC)
85
105
0
125
1
2
3
4
5
VCOM (V)
C002
Figure 19. RON vs TEMPERATURE
Figure 20. RON vs VCOM
1.0
2.0
1.5
Charge Injection (pC)
Leakage Current (nA)
0.8
INO(OFF)/ICOM(OFF)
0.6
0.4
0.2
1.0
V+ = 5 V
0.5
V+ = 3 V
0
-0.5
-1.0
-1.5
0
-2.0
25
TA (°C)
-40
85
0
Figure 21. LEAKAGE CURRENT vs TEMPERATURE
1
2
3
Bias Voltage (V)
4
5
Figure 22. CHARGE-INJECTION (QC) vs VCOM
12
20
tON
18
11
tOFF
tON/tOFF (ns)
tON/tOFF (ns)
16
14
12
10
9
tON
8
10
7
8
6
6
0
1
2
3
V+ (V)
4
5
Figure 23. tON AND tOFF vs SUPPLY VOLTAGE
10
tOFF
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6
-40
25
TA (°C)
85
Figure 24. tON AND tOFF vs TEMPERATURE (V+ = 5 V)
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Product Folder Links: OPA1S2384 OPA1S2385
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OPA1S2385
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SBOS645A – DECEMBER 2012 – REVISED JUNE 2013
TYPICAL CHARACTERISTICS (continued)
Amplifier conditions: At TA = +25°C, RL = 1 kΩ connected to VS / 2, and VO = VCM = VS / 2, unless otherwise noted.
0
0
-10
-0.5
-20
Attenuation (dB)
Gain (dB)
-1.0
-1.5
-2.0
-2.5
-30
-40
-50
-60
-70
-3.0
-80
-3.5
-4.0
100k
-90
1M
10M
Frequency (Hz)
100M
Figure 25. GAIN vs FREQUENCY
1G
-100
100k
1M
10M
Frequency (Hz)
100M
1G
Figure 26. OFF ISOLATION vs FREQUENCY
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OPA1S2384
OPA1S2385
SBOS645A – DECEMBER 2012 – REVISED JUNE 2013
www.ti.com
APPLICATION INFORMATION
OPERATING VOLTAGE
The OPA1S238x operates over a power-supply range of +2.7 V to +5.5 V. Supply voltages higher than +6 V
(absolute maximum) can permanently damage the device. Parameters that vary over supply voltage or over
temperature are shown in the Typical Characteristics section of this data sheet.
INPUT VOLTAGE
The OPA1S238x input common-mode voltage range extends 0.1 V beyond the supply rails. Under normal
operating conditions, the input bias current is approximately 3 pA. Input voltages exceeding the supply voltage
can cause excessive current to flow into or out of the input pins. If there is a possibility that this operating
condition may occur, the inputs must be protected. Momentary voltages that exceed the supply voltage can be
tolerated if the input current is limited to 10 mA. This limitation is easily accomplished with an input resistor
between the signal and the input pin of the device.
OUTPUT VOLTAGE
Rail-to-rail output is achieved by using a class AB output stage with common-source transistors. For highimpedance loads (> 200 Ω), the output voltage swing is typically 100 mV from the supply rails. With 10-Ω loads,
a useful output swing can be achieved while maintaining high open-loop gain; see Figure 13.
OUTPUT DRIVE
The OPA1S238x output stage can supply a continuous output current of ±100 mA and still provide approximately
2.7 V of output swing on a 5-V supply; see Figure 13.
The OPA1S238x provides peak currents of up to 200 mA, which corresponds to the typical short-circuit current.
Therefore, an on-chip thermal shutdown circuit is provided to protect the OPA1S238x from dangerously-high
junction temperatures. At +160°C, the protection circuit shuts down the amplifier. Normal operation resumes
when the junction temperature cools to below +140°C.
CAPACITIVE LOAD AND STABILITY
The OPA1S238x can drive a wide range of capacitive loads. However, all op amps can become unstable under
certain conditions. Op amp configuration, gain, and load value are just a few of the factors to consider when
determining stability. An op amp in a unity-gain configuration is most susceptible to the effects of capacitive
loading. The capacitive load reacts with the op amp output resistance, along with any additional load resistance,
to create a pole in the small-signal response that degrades the phase margin; see Figure 12 for details.
The OPA1S238x topology enhances its ability to drive capacitive loads. In unity gain, these op amps perform well
with large capacitive loads. See Figure 10 and Figure 11 for details.
One method of improving capacitive load drive in the unity-gain configuration is to insert a 10-Ω to 20-Ω resistor
in series with the output. This resistor significantly reduces ringing with large capacitive loads. For details about
stability with certain output capacitors, see Figure 11. However, if there is a resistive load in parallel with the
capacitive load, RS creates a voltage divider. This voltage divider introduces a dc error at the output and slightly
reduces output swing. This error may be insignificant. For instance, with RL = 10 kΩ and RS = 20 Ω, there is only
about a 0.2% error at the output.
WIDEBAND TRANSIMPEDANCE AMPLIFIER
Wide bandwidth, low input bias current and low current noise make the OPA1S238x an ideal wideband,
photodiode, transimpedance amplifier for low-voltage, single-supply applications. Low-voltage noise is important
because photodiode capacitance causes the effective noise gain of the circuit to increase at high frequencies.
POWER DISSIPATION
Power dissipation depends on power-supply voltage, signal, and load conditions. With dc signals, power
dissipation is equal to the product of output current times the voltage across the conducting output transistor.
Power dissipation can be minimized by using the lowest possible power-supply voltage necessary to assure the
required output voltage swing.
12
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SBOS645A – DECEMBER 2012 – REVISED JUNE 2013
For resistive loads, the maximum power dissipation occurs at a dc output voltage of one-half the power-supply
voltage. Dissipation with ac signals is lower. Application bulletin AB-039 (SBOA022), Power Amplifier Stress and
Power Handling Limitations, explains how to calculate or measure power dissipation with unusual signals and
loads, and is available for download at www.ti.com.
Repeated activation of the thermal protection circuit indicates excessive power dissipation or an inadequate
heatsink. For reliable operation, junction temperature should be limited to +150°C, maximum. To estimate the
margin of safety in a complete design, increase the ambient temperature until the thermal protection is triggered
at +160°C. However, for reliable operation, design your system to operate at a maximum of 35°C below the
thermal protection trigger temperature (that is, +125°C or less).
TYPICAL APPLICATIONS
The following sections show typical applications of the OPA1S238x and explain their basic functionality.
Signal Strength Detection
The OPA1S238x can be used to detect the signal strength of a fast changing optical signal. Figure 27 shows a
simplified circuit for this application.
Optical sensors like photodiodes often generate a current that is proportional to the amount of light detected by
these sensors. The current generated by this sensor is represented by the current source IIN, as shown in
Figure 27. One of the OPA1S238x op amps is configured in a transimpedance configuration. If it is assumed that
this op amp behaves like an ideal op amp, then all the current generated by IIN flows through R1 and generates a
voltage drop of IIN × R1. The voltage at the output of this op amp can then be calculated by VTIA = VBIAS + IIN ×
R1. This calulation assumes ideal components.
In real-life applications, the current generated by IIN can change very quickly. The current at a specific point in
time can be measured by using the internal switch of the OPA1S238x. When the switch is closed, the C2
capacitor is charged to the output voltage level of the first amplifier (VTIA). By opening the switch, the output is
disconnected from C2, and the voltage at the noninverting terminal of the second op amp remains at the same
voltage level as when the switch was opened. The second op amp is configured in a buffer configuration and
prevents the C2 capacitor from being discharged by a load at the VOUT terminal.
V–
+
–
V+
SC
+
VBIAS
+
VOUT
R1
C2
IIN
VTIA
Figure 27. Signal Strength Detection
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OPA1S2384
OPA1S2385
SBOS645A – DECEMBER 2012 – REVISED JUNE 2013
www.ti.com
Sample and Hold
The OPA1S238x can be used in a basic sample-and-hold configuration. Figure 28 shows the simplified circuit for
this application.
V–
VIN
V+
SC
+
+
VOUT
R1
C1
Figure 28. Sample-and-Hold Circuit
This sample-and-hold circuit can be used to sample the VIN voltage at a specific point in time and hold it at VOUT.
This functionality is especially useful when fast-moving signals must be digitized.
When the switch connecting the two op amps is closed, the circuit operates in track mode. In track mode, if ideal
components are assumed, the voltage at VOUT follows the voltage at VIN, only delayed by a filter consisting of R1
and C1.
As soon as the internal switch is opened, the output voltage no longer follows the input voltage. If ideal
components are assumed again, the change in C1 remains constant and voltage at VOUT reflects the voltage at
VIN at the moment that the switch was opened.
The values of R1 and C1 must be chosen depending on the bandwidth of the input signal, the sample time, and
the hold time. Long hold times require larger capacitors in order to reduce the error from any leakage currents
coming out of C1. Short sample times require smaller capacitors to allow for fast settling. It is important to
choose the R1 value according to Figure 12 to prevent ringing or excessive damping, and to include the
influence of switch on resistance in this selection.
There are several error sources that should be considered when designing a sample-and-hold circuit. The most
important ones are:
• Aperture Time is the time required for a switch to open and remove the charging signal from the capacitor
after the mode control signal has changed from sample to hold.
• Effective Aperture Time is the difference in propagation delay times of the analog signal and the mode
control signal from their respective input pins to the switch.
• Charge Offset is the output voltage change that results from a charge transfer into the hold capacitor through
stray capacitance when Hold mode is enabled.
• Droop Rate is the change in output voltage over time during Hold mode as a result of hold capacitor leakage,
switch leakage, and bias current of the output amplifier.
• Drift Current is the net leakage current affecting the hold capacitor during Hold mode.
• Hold Mode Feedthrough is the fraction of the input signal that appears at the output while in Hold mode. It is
primarily a function of switch capacitance, but may also be increased by poor layout practices.
• Hold Mode Settling Time is the time required for the sample-to-hold transient to settle within a specified
error band.
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SBOS645A – DECEMBER 2012 – REVISED JUNE 2013
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (December 2012) to Revision A
Page
•
Changed document status from Product Mix to Production Data ........................................................................................ 1
•
Changed first sub-bullet of SPST Switch Features bullet ..................................................................................................... 1
•
Changed Quiescent Current Features bullet ........................................................................................................................ 1
•
Added last two Features bullets ............................................................................................................................................ 1
•
Changed front-page graphic footnote ................................................................................................................................... 1
•
Moved OPA1S2384 to Production Data ............................................................................................................................... 2
•
Deleted transport media column from Package Information table ........................................................................................ 2
•
Deleted second footnote from Package Information table .................................................................................................... 2
•
Changed title of Electrical Characteristics: Amplifier Section table ...................................................................................... 3
•
Changed Offset Voltage, Channel separation parameter ..................................................................................................... 3
•
Changed Power Supply, IQ parameter .................................................................................................................................. 4
•
Changed DC, Analog voltage range parameter maximum specification and Ron parameter typical specification ............... 4
•
Changed Dynamic, QC parameter test conditions ................................................................................................................ 4
•
Changed block diagram footnote .......................................................................................................................................... 5
•
Added curve summary table ................................................................................................................................................. 6
•
Updated Figure 3 .................................................................................................................................................................. 7
•
Updated Figure 18 ................................................................................................................................................................ 9
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Jul-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
OPA1S2384IDRCR
PREVIEW
SON
DRC
10
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OVAQ
OPA1S2384IDRCT
PREVIEW
SON
DRC
10
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OVAQ
OPA1S2385IDRCR
ACTIVE
SON
DRC
10
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OUZQ
OPA1S2385IDRCT
ACTIVE
SON
DRC
10
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OUZQ
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jul-2013
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Jul-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
OPA1S2385IDRCR
SON
DRC
10
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
OPA1S2385IDRCT
SON
DRC
10
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Jul-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
OPA1S2385IDRCR
SON
DRC
10
3000
367.0
367.0
35.0
OPA1S2385IDRCT
SON
DRC
10
250
210.0
185.0
35.0
Pack Materials-Page 2
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