Fairchild FDMS8333L N-channel powertrenchâ® mosfet Datasheet

FDMS8333L
N-Channel PowerTrench® MOSFET
40 V, 76 A, 3.1 mΩ
Features
General Description
„ Max rDS(on) = 3.1 mΩ at VGS = 10 V, ID = 22 A
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency and to minimize switch node
ringing of DC/DC converters using either synchronous or
conventional switching PWM controllers. It has been optimized
for low gate charge, low rDS(on), fast switching speed and body
diode reverse recovery performance.
„ Max rDS(on) = 4.3 mΩ at VGS = 4.5 V, ID = 19 A
„ Advanced Package and Silicon combination for low rDS(on)
and high efficiency
„ Next generation enhanced
engineered for soft recovery
body
diode
technology,
Applications
„ MSL1 robust package design
„ OringFET / Load Switching
„ 100% UIL tested
„ Synchronous rectification
„ RoHS Compliant
„ DC-DC Conversion
Bottom
Top
Pin 1
S
Pin 1
D
D
D
S
S
G
D
S
D
S
D
S
D
G
D
Power 56
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current
ID
-Continuous
TC = 25 °C
-Continuous
TA = 25 °C
-Pulsed
Single Pulse Avalanche Energy
EAS
PD
TJ, TSTG
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Ratings
40
Units
V
±20
V
76
(Note 1a)
22
(Note 4)
250
(Note 3)
216
69
(Note 1a)
Operating and Storage Junction Temperature Range
2.5
-55 to +150
A
mJ
W
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
RθJA
Thermal Resistance, Junction to Ambient
1.8
(Note 1a)
50
°C/W
Package Marking and Ordering Information
Device Marking
FDMS8333L
Device
FDMS8333L
©2013 Fairchild Semiconductor Corporation
FDMS8333L Rev. C2
Package
Power 56
1
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com
FDMS8333L N-Channel PowerTrench® MOSFET
April 2013
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 32 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
±100
nA
3.0
V
40
V
22
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
VGS = 10 V, ID = 22 A
2.4
3.1
rDS(on)
Static Drain to Source On Resistance
VGS = 4.5 V, ID = 19 A
3.3
4.3
VGS = 10 V, ID = 22 A, TJ = 125 °C
3.6
4.7
VDS = 5 V, ID = 22 A
120
gFS
Forward Transconductance
1.0
1.8
-6
mV/°C
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = 20 V, VGS = 0 V,
f = 1 MHz
0.1
3245
4545
pF
840
1175
pF
32
55
pF
0.7
2.1
Ω
Switching Characteristics
td(on)
Turn-On Delay Time
14
25
ns
tr
Rise Time
4.7
10
ns
td(off)
Turn-Off Delay Time
33
53
ns
tf
Fall Time
4.2
10
ns
nC
VDD = 20 V, ID = 22 A,
VGS = 10 V, RGEN = 6 Ω
Qg
Total Gate Charge
VGS = 0 V to 10 V
46
64
Qg
Total Gate Charge
22
31
Qgs
Gate to Source Charge
VGS = 0 V to 4.5 V VDD = 20 V,
ID = 22 A
Qgd
Gate to Drain “Miller” Charge
nC
8.8
nC
5.5
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 1.9 A
(Note 2)
0.7
1.2
VGS = 0 V, IS = 22 A
(Note 2)
0.8
1.3
IF = 22 A, di/dt = 100 A/μs
V
38
61
ns
20
32
nC
Notes:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
a. 50 °C/W when mounted on a
1 in2 pad of 2 oz copper
SS
SF
DS
DF
G
SS
SF
DS
DF
G
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS of 216 mJ is based on starting TJ = 25 °C; N-ch: L = 3 mH, IAS = 12 A, VDD = 40 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 38 A.
4. Pulsed Id limited by junction temperature, td<=100 μS, please refer to SOA curve for more details.
©2013 Fairchild Semiconductor Corporation
FDMS8333L Rev. C2
2
www.fairchildsemi.com
FDMS8333L N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
5
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
250
VGS = 10 V
200
VGS = 4.5 V
VGS = 4 V
150
VGS = 3.5 V
100
VGS = 3 V
50
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0
1
2
3
4
VGS = 3 V
4
VGS = 3.5 V
3
VGS = 4 V
2
VGS = 4.5 V
1
0
5
0
50
VDS, DRAIN TO SOURCE VOLTAGE (V)
150
200
250
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
15
ID = 22 A
VGS = 10 V
rDS(on), DRAIN TO
1.6
1.4
1.2
1.0
0.8
0.6
-75
SOURCE ON-RESISTANCE (mΩ)
1.8
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
100
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
12
ID = 22 A
9
6
TJ = 125 oC
3
TJ = 25 oC
0
-50
-25
0
25
50
75
100 125 150
2
TJ, JUNCTION TEMPERATURE (oC)
IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
200
VDS = 5 V
150
TJ = 150 oC
TJ = 25 oC
50
TJ = -55 oC
0
1
2
3
4
300
100
8
10
VGS = 0 V
10
TJ = 150 oC
1
TJ = 25 oC
0.1
0.01
0.001
0.0
5
VGS, GATE TO SOURCE VOLTAGE (V)
TJ = -55 oC
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
Figure 5. Transfer Characteristics
©2013 Fairchild Semiconductor Corporation
FDMS8333L Rev. C2
6
Figure 4. On-Resistance vs Gate to
Source Voltage
250
100
4
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
ID, DRAIN CURRENT (A)
VGS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
3
www.fairchildsemi.com
FDMS8333L N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
5000
ID = 22 A
Ciss
8
VDD = 15 V
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
6
VDD = 20 V
4
VDD = 25 V
1000
Coss
100
2
Crss
f = 1 MHz
VGS = 0 V
0
0
10
20
30
40
10
0.1
50
1
10
40
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain
to Source Voltage
140
100
o
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT (A)
RθJC = 1.8 C/W
TJ = 25 oC
10
TJ = 100 oC
TJ = 125 oC
1
0.01
0.01
0.1
1
10
100
112
84
VGS = 10 V
56
Limited by Package
28
0
25
500
50
P(PK), PEAK TRANSIENT POWER (W)
ID, DRAIN CURRENT (A)
100 µs
10
0.01
1 ms
10 ms
100 ms
1s
SINGLE PULSE
TJ = MAX RATED
10 s
DC
RθJA = 125 oC/W
o
TA = 25 C
0.001
0.01
0.1
CURVE BENT TO
MEASURED DATA
1
10
100200
VDS, DRAIN to SOURCE VOLTAGE (V)
150
2000
1000
SINGLE PULSE
RθJA = 125 oC/W
TA = 25 oC
100
10
1
0.1
-4
10
-3
10
-2
10
-1
10
1
100
10
1000
t, PULSE WIDTH (sec)
Figure 11. Forward Bias Safe
Operating Area
©2013 Fairchild Semiconductor Corporation
FDMS8333L Rev. C2
125
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
300
100
0.1
100
TC, CASE TEMPERATURE ( C)
Figure 9. Unclamped Inductive
Switching Capability
THIS AREA IS
LIMITED BY rDS(on)
75
o
tAV, TIME IN AVALANCHE (ms)
1
VGS = 4.5 V
Figure 12. Single Pulse Maximum
Power Dissipation
4
www.fairchildsemi.com
FDMS8333L N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
NORMALIZED THERMAL
IMPEDANCE, ZθJA
2
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
0.01
t1
0.001
0.0001
-4
10
t2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
o
RθJA = 125 C/W
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
©2013 Fairchild Semiconductor Corporation
FDMS8333L Rev. C2
5
www.fairchildsemi.com
FDMS8333L N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
5.10
4.90
A
PKG
CL
8
5.10
3.91
B
5
8
7
6
1.27
5
0.77
4.52
PIN #1
IDENT MAY
APPEAR AS
OPTIONAL
1
KEEP OUT AREA
3.75
6.25
5.90
PKG CL
6.61
1.27
TOP VIEW
4
1
2
3
4
0.61
1.27
SEE
DETAIL A
3.81
LAND PATTERN
RECOMMENDATION
SIDE VIEW
5.10
4.90
3.81
OPTIONAL DRAFT
ANGLE MAY APPEAR
ON FOUR SIDES
OF THE PACKAGE
1.27
1
2
3
6
0.46 (8X)
0.36
0.10
C A B
(0.39)
4
(0.52)
0.71
0.44
CHAMFER
CORNER
AS PIN #1
IDENT MAY
APPEAR AS
OPTIONAL
6.25
5.90
(0.50)
(1.81)
(3.40)
4.29
4.09
(1.19)
8
7
6
0.15 MAX (2X)
5
3.86
3.61
OPTION - B (PUNCHED TYPE)
0.71
0.44
BOTTOM VIEW
0.10 C
0.08 C
0.30
0.20
1.10
0.90
0.05
0.00
DETAIL A
5.85
5.65
C
SEATING
PLANE
NOTES: UNLESS OTHERWISE SPECIFIED
A) PACKAGE STANDARD REFERENCE:
JEDEC MO-240, ISSUE A, VAR. AA,
DATED OCTOBER 2002.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH. MOLD FLASH OR
BURRS DOES NOT EXCEED 0.10MM.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-1994.
E) IT IS RECOMMENDED TO HAVE NO TRACES
OR VIAS WITHIN THE KEEP OUT AREA.
F) DRAWING FILE NAME: PQFN08AREV6.
SCALE: 2:1
OPTION - A (SAWN TYPE)
©2013 Fairchild Semiconductor Corporation
FDMS8333L Rev. C2
6
www.fairchildsemi.com
FDMS8333L N-Channel PowerTrench® MOSFET
Dimensional Outline and Pad Layout
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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As used here in:
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2.
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Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I64
©2013 Fairchild Semiconductor Corporation
FDMS8333L Rev. C2
7
www.fairchildsemi.com
FDMS8333L N-Channel PowerTrench® MOSFET
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