Fairchild FAN7318AMX Lcd backlight inverter drive ic Datasheet

FAN7318A
LCD Backlight Inverter Drive IC
Features
Description
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The FAN7318A is a LCD backlight inverter drive IC that
controls P-N half-bridge topology.
High-Efficiency, Single-Stage Power Conversion
Wide Input Voltage Range: 6V to 30V
Backlight Lamp Ballast and Soft Dimming
Minimal External Components Required
Precision Voltage Reference Trimmed to 2%
Half-Bridge Topology
Soft-Start
PWM Control at Fixed Frequency
Analog Dimming Function
Burst Dimming Function
Programmable Striking Frequency
Open-Lamp Protection (OLP)
Open-Lamp Regulation (OLR)
Over-Voltage Protection (OVP)
Short-Lamp Protection (SLP)
CMP-High Protection (CHP)
Thermal Shutdown (TSD)
16-Pin SOIC Package
The FAN7318A provides a low-cost solution and reduces
external components by integrating proprietary wave
rectifiers for open-lamp protection and regulation. The
operating voltage range is wide, so an external regulator
isn’t necessary to supply voltage to the IC.
The FAN7318A provides various protections, such as
open-lamp regulation, over-voltage protection, openlamp protection, short-lamp protection, and CMP-HIGH
protection, to increase the system reliability. The
FAN7318A provides burst dimming and analog dimming.
The FAN7318A is available in a 16-SOIC package.
Applications
ƒ
ƒ
LCD TV
LCD Monitor
Ordering Information
Part
Number
FAN7318AM
FAN7318AMX
Operating
Temperature
-25 to +85°C
Package
16-Lead, Small Outline Integrated Circuit (SOIC)
Packing
Method
Eco
Status
RoHS
Rail
Tape & Reel
For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
Protected under U.S. patent no. 5,652,479.
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
FAN7318A — LCD Backlight Inverter Drive IC
August 2009
Short-Lamp Protection
Min.
-
OLR1
Min. &
Max.
Detector
/Full Wave
Recifier
OLR2
50µA @ OVP,SLP
2µA @ OLP.CMP high
3V/1V @ striking/normal
+
0.3V
Over-Voltage Protection
Max.
TIMER
Protection
+
TSD 150oC
-
1.34V
+
2V
-
OUTA
0μA
+
1.34V
-
OUTB
Error. Amp. source
current change
2.2V
Output Driver
3μA
Gm Amp.
+
Open-Lamp Regulation
Oscillator
max. 2V
Control
Logic
On @ striking
-
GND
+
CMP
Error. Amp. source
current change
Vref
-
Error Amp.
+
VIN
+
+
-
UVLO 5.5V
3.5V
-
High_CMP
Hys. 0.45V
-
ADIM
Negative
Analog
Dimming
High CMP Protection
disable @ striking
52μA burst
sink current on
1.35V
+
CT
min. 0.5V
ENA
200k
OLP max.
Striking off
max. 2V
OLP
OLP min.
0.7V/0.5V
Striking/normal
+
150μs
Delay
52μA burst
sink current on
min. 0.5V
BCT
disable @ striking
+
OLP2
REF
17 Pulses Counter
And OLR<1.4V
Min. & Max.
Detector
/Full or Half
Wave
Rectifier
-
OLP1
5V, max. 3mA
Voltage Reference
& Internal Bias
BDIM
If ENA>2.5V, OLP & SLP disable.
If ENA<2.1V, OLP & SLP enable.
Figure 1. Internal Block Diagram
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
2
FAN7318A — LCD Backlight Inverter Drive IC
Block Diagram
FAN7318A — LCD Backlight Inverter Drive IC
Pin Configuration
16
15
14
13
12
11
10
9
7
8
F PXYTT
FAN7318A
1
2
3
4
5
6
Figure 2. Package Diagram
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
3
Pin #
Name
1
TIMER
2
CMP
Error amplifier output. Typically, a compensation capacitor is connected to this pin from the
ground.
3
ADIM
This pin is the input for negative analog dimming.
4
CT
5
REF
This pin is 5V reference output. Typically, resistors are connected to this pin from the CT pin
and the BCT pin.
6
BCT
This pin is for programming the frequency of the burst dimming. Typically, a capacitor is
connected to this pin from ground and a resistor is connected to this pin from the REF pin.
7
BDIM
This pin is the input for negative burst dimming. The voltage range of 0.5 to 2V at this pin
controls burst mode duty cycle from 0% to 100%.
8
ENA
This pin is for turning on/off the IC.
9
GND
This pin is the ground.
10
OUTB
This pin is NMOS gate-drive output.
11
OUTA
This pin is PMOS gate-drive output.
12
VIN
13
OLR2
This pin is for open-lamp regulation. Its functions are the same as the OLR1 pin.
14
OLP2
This pin is for open-lamp protection and feedback control of lamp currents. Its functions are
the same as the OLP1 pin.
OLR1
This pin is for open-lamp regulation and short-lamp protection. It is connected to the fullwave rectifier internally. When the maximum of rectified OLR inputs is between 1.34V and
2V, the error amplifier output current is limited to 3.0µA. When the maximum of rectified
OLR inputs reaches 2V, the error amplifier output current is 0A and its output voltage
maintains constant. The maximum of rectified OLR inputs is inputted to the negative of
another error amplifier for feedback control of lamp voltage. When the maximum of rectified
OLR inputs is more than 2.2V, another error amplifier for OLR is operating and lamp voltage
is regulated. In normal mode, if the maximum of rectified OLR inputs is higher than 1.34V or
if the minimum of rectified OLR inputs is lower than 0.3V for a predetermined time by the
TIMER pin capacitor and an internal current source 50µA, the IC shuts down to protect the
system in over-voltage condition or short-lamp condition, respectively.
OLP1
This pin is for open-lamp protection and feedback control of lamp currents. It is connected to
the half-wave rectifier and the full-wave rectifier internally. In striking mode, if the minimum
of rectified OLP inputs is less than 0.7V for a predetermined time by the TIMER pin
capacitor and an internal current source or; in normal mode, if the minimum of rectified OLP
inputs is less than 0.5V for another predetermined time by the TIMER pin capacitor and
another internal current source; the IC shuts down to protect the system in open-lamp
condition. The maximum of rectified OLP inputs is inputted to the negative of the error
amplifier for feedback control of lamp current.
15
16
Description
This pin is for protection delay time setting.
This pin is for programming the switching frequency. Typically, a capacitor is connected to
this pin from ground and a resistor is connected to this pin from the REF pin.
This pin is the supply voltage of the IC.
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
4
FAN7318A — LCD Backlight Inverter Drive IC
Pin Definitions
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In
addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
VIN
IC Supply Voltage
TA
Operating Temperature Range
TJ
Operating Junction Temperature
TSTG
Storage Temperature Range
θJA
Thermal Resistance Junction-Air
PD
Power Dissipation
Min.
Max.
Unit
6
30
V
-25
+85
°C
+150
°C
+150
°C
90
°C/W
1.4
W
-65
(1,2)
Notes:
1. Thermal resistance test board; size: 76.2mm x 114.3mm x 1.6mm (1S0P); JEDEC standard: JESD51-2, JESD51-3.
2. Assume no ambient airflow.
Pin Breakdown Voltage
Pin #
Name
Value
1
TIMER
7
2
CMP
7
3
ADIM
7
4
CT
7
5
REF
7
6
BCT
7
7
BDIM
7
8
ENA
7
9
GND
10
OUTB
30
11
OUTA
30
12
VIN
30
13
OLR2
±7
14
OLP2
±7
15
OLR1
±7
16
OLP1
±7
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
Unit
V
www.fairchildsemi.com
5
FAN7318A — LCD Backlight Inverter Drive IC
Absolute Maximum Ratings
For typical values, TA=25°C, VIN=15V, and -25°C ≤ TA ≤ 85°C, unless otherwise specified. Specifications to -25°C ~
85°C are guaranteed by design based on final characterization results.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Under-Voltage Lockout Section (UVLO)
Vth
Start Threshold Voltage
Increase VIN
4.9
5.2
5.5
V
Start Threshold Voltage Hysteresis
Decrease VIN
0.20
0.45
0.60
V
Ist
Startup Current
VIN=4.5V
10
70
100
µA
Iop
Operating Supply Current
VIN=15V, Not Switching
0.5
2.0
3.5
mA
5.0
V
0.7
V
Vthhys
ON/OFF Section
Von
On-State Input Voltage
Voff
Off-State Input Voltage
Isb
Standby Current
ENA=0V
50
120
190
µA
Pull-Down Resistor
ENA=2V
120
200
280
kΩ
4.9
5.0
5.1
V
RENA
1.4
Reference Section (Recommend 1µF X7R Capacitor)
V5
5V Regulation Voltage
V5line
5V Line Regulation
6 ≤ VIN ≤ 30V
4
50
mV
V5load
5V Load Regulation
10µA ≤ I5 ≤ 3mA
4
50
mV
Oscillator Section (Main)
fosc
fstr
Ictdcs
Ictdc
Oscillation Frequency
Oscillator Frequency in Striking Mode
CT Discharge Current
TA=25°C, CT=220pF,
RT=100kΩ
101.3
105.0
108.3
CT=220pF, RT=100kΩ
101.0
105.0
109.0
TA=25°C, CT=220pF,
RT=100kΩ
126.5
131.0
135.5
CT=20pF, RT=100kΩ
126.0
131.0
136.0
Striking
1.03
1.18
1.33
mA
Normal
770
870
970
μA
Striking
-15
-12
-9
μA
kHz
kHz
Ictcs
CT Charge Current
Vcth
CT High Voltage
2
V
Vctl
CT Low Voltage
0.45
V
Oscillator Section (Burst)
foscb
Burst Oscillation Frequency
TA=25°C, BCT=4.7nF,
BRT=1.4MΩ
321
BCT=4.7nF,
BRT=1.4MΩ
317
330
343
20
26
32
330
342
Hz
Ibctdc
BCT Discharge current
μA
Vbcth
BCT High Voltage
2
V
Vbctl
BCT Low Voltage
0.5
V
Continued on the following page…
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
6
FAN7318A — LCD Backlight Inverter Drive IC
Electrical Characteristics
For typical values, TA=25°C, VIN=15V, and -25°C ≤ TA ≤ 85°C, unless otherwise specified. Specifications to -25°C ~
85°C are guaranteed by design based on final characterization results.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
ADIM=0V, TA=25°C
1.244
1.329
1.421
ADIM=0V
1.231
1.329
1.427
Unit
Analog Dimming Section
AVrexx
Reference Voltage
ADIM=0.5V
1.178
ADIM=1.0V
1.008
V
Error Amplifier Section
lsin
Output Sink Current
OLP=2.5V, ADIM=2.5V
63
76
94
µA
lsur1
Output Source Current 1
OLP=0V, ADIM=0V
-65
-50
-35
µA
lsur2
Output Source Current 2
CMP=3V
-1.4
-1.0
-0.6
µA
Ibsin
Burst CMP Sink Current
BDIM=5V, BCT=0V
41
52
63
µA
Iolpi
OLP Input Current
OLP=2V
Iolpo
OLP Output Current
OLP=-2V
Vlpfx
Rectifiers Output of OLP
Volpr
OLP Input Voltage Range
0
-30
-20
µA
-10
µA
OLP=0.3V
0.34
V
OLP=1.5V
1.55
V
(3)
-4
4
V
-2.3
µA
Open-Lamp Regulation Section
Iolr1
Striking, OLR=1.6V
-3.4
-2.8
Iolr2
Error Amplifier Source Current for
Open-Lamp Regulation
OLR Sweep
Volr1
Open-Lamp Regulation Voltage 1
OLR Sweep
1.24
1.34
1.44
V
Volr2
Open-Lamp Regulation Voltage 2
Striking, OLR Sweep
1.88
1.98
2.08
V
Volr3
Open-Lamp Regulation Voltage 3
2.1
2.2
2.3
V
OLR Error Amplifier Transconductance
180
310
440
µmho
40
60
80
µA
-35
-25
-15
µA
4
V
GmOLR
Iors
OLR Error Amplifier Sink Current
Normal, OLR=2.5V
Iolri
OLR Input Current
OLR=2.5V
Iolro
OLR Output Current
OLR=-2.5V
Volrr
OLR Input Voltage Range
(3)
0
µA
0
-4
µA
Note:
3. These parameters, although guaranteed, are not 100% tested in production.
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
7
FAN7318A — LCD Backlight Inverter Drive IC
Electrical Characteristics (Continued)
For typical values, TA=25°C, VIN=15V, and -25°C ≤ TA ≤ 85°C, unless otherwise specified. Specifications to -25°C ~
85°C are guaranteed by design based on final characterization results.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Striking
0.65
0.70
0.75
V
0.42
0.49
0.56
V
Protection Section
(4)
Volp0
Open-Lamp Protection Voltage 0
Volp1
Open-Lamp Protection Voltage 1
Sweep OLP
Vcmpr
CMP-High Protection Voltage
Sweep CMP
3.40
3.50
3.60
V
Vslp
Short-Lamp Protection Voltage
Sweep TIMER
0.22
0.30
0.38
V
Vtmr1
Timer Threshold Voltage 1
Striking, Sweep TIMER
2.87
3.02
3.17
V
Vtmr2
Timer Threshold Voltage 2
Sweep TIMER
1.00
1.10
1.20
V
Itmr1
Timer Current 1
OLP=0V
1.7
2.1
2.5
µA
Itmr2
Timer Current 2
OLR=1.8V
40
50
60
µA
TSD
Thermal Shutdown
(4)
150
Vovp
Over-Voltage Protection Voltage
dcr
ENA2.3V OLP Disable/Enable Change
Voltage
Sweep OLR
°C
1.24
1.34
1.44
V
2.1
2.3
2.5
V
Output Section
(4)
Vpdhv
PMOS Gate High Voltage
Vpdlv
PMOS Gate Low Voltage
Vndhv
NMOS Gate High Voltage
Vndlv
Vpuv
Vnuv
Ipdsur
Ipdsin
NMOS Gate Low Voltage
VIN=15V
(4)
PMOS Gate Drive Source Current
VIN-9.0
VIN-7.5
VIN-6.5
V
VIN=15V
7.5
8.5
10.0
V
VIN=4.5V
(4)
Indsur
NMOS Gate Drive Source Current
Indsin
NMOS Gate Drive Sink Current
(4)
0
(4)
V
VIN-0.3
V
VIN=4.5V
(4)
V
VIN=15V
VIN=15V
PMOS Gate Voltage with UVLO
Activated
NMOS Gate Voltage with UVLO
Activated
PMOS Gate Drive Sink Current
VIN
0.3
V
VIN=15V
-300
mA
VIN=15V
400
mA
VIN=15V
300
mA
VIN=15V
-400
mA
0
%
Maximum / Minimum Duty Cycle
DCMIN
DCMAX
Minimum Duty Cycle
(4)
Maximum Duty Cycle
(4)
fosc=100kHz
fosc=100kHz
45
49
%
Note:
4. These parameters, although guaranteed, are not 100% tested in production.
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
8
FAN7318A — LCD Backlight Inverter Drive IC
Electrical Characteristics (Continued)
Figure 3. Start Threshold Voltage vs. Temperature
Figure 4. Start Threshold Voltage Hysteresis vs.
Temperature
Figure 5. Startup Current vs. Temperature
Figure 6. Operating Current vs. Temperature
Figure 7. Standby Current vs. Temperature
Figure 8. 5V Regulation Voltage vs. Temperature
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
9
FAN7318A — LCD Backlight Inverter Drive IC
Typical Performance Characteristics
Figure 9. Oscillation Frequency vs. Temperature
Figure 10. Oscillation Frequency in Striking
vs. Temperature
Figure 11. CT High Voltage vs. Temperature
Figure 12. CT Low Voltage vs. Temperature
Figure 13. Burst Dimming Frequency vs. Temperature
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
Figure 14. BCT Discharge Current vs. Temperature
www.fairchildsemi.com
10
FAN7318A — LCD Backlight Inverter Drive IC
Typical Performance Characteristics (Continued)
Figure 15. BCT High Voltage vs. Temperature
Figure 16. BCT Low Voltage vs. Temperature
Figure 17. Analog Dimming Reference Voltage 00
vs. Temperature
Figure 18. Analog Dimming Reference Voltage 05
vs. Temperature
Figure 19. Error Amplifier Source Current 1
vs. Temperature
Figure 20. Error Amplifier Source Current 2
vs. Temperature
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
11
FAN7318A — LCD Backlight Inverter Drive IC
Typical Performance Characteristics (Continued)
Figure 21. Error Amplifier Source Current for OLR
vs. Temperature
Figure 22. Error Amplifier Sink Current
vs. Temperature
Figure 23. Burst CMP Sink Current vs. Temperature
Figure 24. OLR Error Amplifier Sink Current
vs. Temperature
Figure 25. Open-Lamp Protection Voltage 1
vs. Temperature
Figure 26. High-CMP Protection Voltage
vs. Temperature
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
12
FAN7318A — LCD Backlight Inverter Drive IC
Typical Performance Characteristics (Continued)
Figure 27. Short-Lamp Protection Voltage
vs. Temperature
Figure 28. Open-Lamp Regulation Voltage 1
vs. Temperature
Figure 29. Open-Lamp Regulation Voltage 2
vs. Temperature
Figure 30. Open-Lamp Regulation Voltage 3
vs. Temperature
Figure 31. TIMER Threshold Voltage 1
vs. Temperature
Figure 32. TIMER Threshold Voltage 2
vs. Temperature
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
13
FAN7318A — LCD Backlight Inverter Drive IC
Typical Performance Characteristics (Continued)
Figure 33. TIMER Current 1 vs. Temperature
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
Figure 34. TIMER Current 2 vs. Temperature
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14
FAN7318A — LCD Backlight Inverter Drive IC
Typical Performance Characteristics (Continued)
1
[Hz]
⎛ 13.65 + ( 3I1 − 4.55I2 ) RT ⎞
⎜
⎟
⎜ −I ⋅ I ⋅ RT 2
⎟
RT ⋅ CT ⋅ ln ⎜ 1 2
13.65 + ( 4.55I1 − 3I2 ) RT ⎟
⎜
⎟
⎜ −I ⋅ I ⋅ RT 2
⎟
⎝ 1 2
⎠
-6
-3
Q I1 = 12 × 10 A, I2 = 1.128 × 10 A
fstr =
UVLO
The under-voltage lockout (UVLO) circuit guarantees the
stable operation of the IC’s control circuit by stopping
and starting it as a function of the VIN value. The UVLO
circuit turns on the control circuit when VIN exceeds
5.2V. When VIN is lower than 4.75V, the IC startup
current is less than 100µA.
ENA
Burst Dimming Oscillator
Applying voltage higher than 1.4V to the ENA pin
enables the IC. Applying voltage lower than 0.7V to the
ENA pin disables the IC. In terms of the protections,
applying voltage higher than 2.5V to the ENA pin
disables OLP and SLP. Applying voltage lower than
2.1V to the ENA pin enables the OLP and the SLP.
The burst dimming timing capacitor (BCT) is charged by
the current flowing from the reference voltage source,
which is formed by the burst dimming timing resistor
(BRT) and the burst dimming timing capacitor (BCT).
The sawtooth waveform charges up to 2V. Once the
BCT voltage reaches 2V, the capacitor begins
discharging down to 0.5V. Next, the BCT starts charging
again and a new burst dimming cycle begins, as shown
in Figure 36. The burst dimming frequency is
programmed by adjusting the BCT and BRT values. The
burst dimming frequency is calculated as:
Main Oscillator
In normal mode, the external timing capacitor (CT) is
charged by the current flowing from the reference
voltage source, which is formed by the timing resistor
(RT) and the timing capacitor (CT). The sawtooth
waveform charges up to 2V. Once CT voltage reaches
2V, the CT begins discharging down to 0.4V. Next, the
CT starts charging again and a new switching cycle
begins, as shown in Figure 35. The main frequency is
programmed by adjusting the RT and CT value. The
main frequency is calculated as:
fOSC =
1
[Hz]
⎛ 3.9585 ⋅ RT − 13650 ⎞
RT ⋅ CT ⋅ ln ⎜
⎟
⎝ 2.61⋅ RT − 13650 ⎠
(2)
fOSCB =
1
[Hz]
⎛ 0.039 ⋅ BRT − 4500 ⎞
(3)
BRT ⋅ BCT ⋅ ln⎜
⎟
⎝ 0.026 ⋅ BRT − 4500 ⎠
To avoid visible flicker, the burst dimming frequency
should be greater than 120Hz.
(1)
Figure 36. Burst Dimming Oscillator Circuit
Analog Dimming
For analog dimming, the lamp intensity is controlled with
the external dimming signal (VADIM) and resistors. Figure
37 shows how to implement an analog dimming circuit.
Figure 35. Main Oscillator Circuit
CMP
In striking mode, the external timing capacitor (CT) is
charged by the current flowing from the reference
voltage source and 12μA current source, which
increases the frequency. If the product of RT and CT
value is constant, the striking frequency is depending on
CT and is calculated as:
V ADIM
ADIM
Negative
Analog
Dimm ing
VREF
+
Error Amp.
-
OLP max .
Figure 37. Analog Circuit Implementation
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
15
FAN7318A — LCD Backlight Inverter Drive IC
Functional Description
max
i rms
= Vref _ max
π
2 2RS1
[ A]
(4)
The lamp intensity is inversely proportional to VADIM. As
VADIM increases, the lamp intensity decreases and the
rms value of the lamp current is calculated as:
max
i rms
= Vref
π
2 2Rs
[ A]
(5)
Vref = Vref _ max − 0.30VADIM [ A]
Figure 38 shows the lamp current waveform vs. VADIM in
an analog dimming mode.
2.0
Figure 39. Negative Burst Dimming Waveform Using
DC Voltage
V REF
Burst dimming can be implemented, not only DC
voltage, but also using PWM pulse as the BDIM signal.
Figure 40 shows how to implement burst dimming using
PWM pulse as BDIM signal.
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
ADIM
0.5
1.0
1.5
2.0
2.5
15mA
10mA
5mA
0
-5mA
-10mA
-15mA
Lamp Current
Figure 38. Analog Dimming Waveforms
Figure 40. Negative Burst Dimming Implementation
Circuit Using an External Pulse
Burst Dimming
Figure 41 shows the lamp current waveform vs. an
external pulse in negative burst dimming mode.
Lamp intensity is controlled with the BDIM signal over a
wide range. FAN7318A provide polarity selection. When
BDIM is inputted, the DC voltage or PWM pulse signal
and BCT is setting sawtooth waveform or DC voltage,
respectively. This structure can be implemented as
negative dimming polarity. When BDIM voltage is lower
than BCT voltage, the lamp current is turned on; 0V on
BDIM commands full brightness. The duty cycle of the
PWM pulse determines the lamp brightness. The lamp
intensity is inversely proportional to BDIM voltage. As
BDIM voltage increases, the lamp intensity decreases.
Figure 39 shows the lamp current waveform vs. DIM in
negative burst dimming mode.
Figure 41. Negative Burst Dimming Waveform Using
an External Pulse
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
16
FAN7318A — LCD Backlight Inverter Drive IC
In full brightness, the maximum rms value of the lamp
current is calculated as:
Soft-Start
A soft-start circuit ensures a gradual increase in the
input and output power. FAN7318A has no soft-start pin,
but provides soft-start function using the first BCT
waveform. The first BCT waveform limits CMP voltage at
initial operation, so lamp current increases gradually.
2.5
2
BCT
1.5
BDIM
1
0.5
0
2
3
4
5
6
7
8
9
10
11
12
-3
x 10
2
CMP
1.5
1
0.5
0
2
3
4
Striking
mode
0.01
5
6
7
8
9
10
11
12
-3
x 10
normal mode
iLamp
0.005
0
-0.005
Figure 45. Soft-Start in Normal Mode
-0.01
-0.015
2
3
4
5
6
7
8
9
10
11
12
-3
x 10
Figure 42. Burst Dimming During Striking Mode
When BDIM is setting over 2.2VDC and BCT is inputted
PWM pulse signal, this structure can be implemented as
positive dimming polarity. Figure 43 shows burst
dimming using PWM pulse as BDIM signal.
Figure 46. Soft-Start in Burst Dimming Mode
Output Drives
FAN7318A is designed to drive P-N half-bridge
MOSFETs with symmetric duty cycle. FAN7318A can
drive a P-MOSFET directly without a level-shift capacitor
and a Zener diode. A fixed dead time of 500ns is
introduced between two outputs at maximum duty cycle,
as shown in Figure 47.
Figure 43. Positive Burst Dimming Implementation
Circuit Using an External Pulse
Dead time
500ns at max. duty
CT
Figure 44 shows the lamp current waveform vs. an
external pulse in positive burst dimming mode.
CMP
SYNC
T
OUTA
OUTB
Figure 47. MOSFETs Gate Drive Signal
Figure 44. Positive Burst Dimming Waveform Using
an External Pulse
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
17
FAN7318A — LCD Backlight Inverter Drive IC
During striking mode, burst dimming operation is
disabled to guarantee continuous striking time. Figure
42 shows burst dimming disabled during striking mode.
FAN7318A has two OLP pins for lamp current feedback
and protections. The inputs of two OLP pins are
connected to the internal half-wave and full-wave
rectifier circuits. The half-wave rectified signals of two
OLP inputs are connected the maximum detector circuit.
The full-wave rectified signals of two OLP inputs are
connected to the minimum detector circuit.
The two inputs of the OLP pins should be inverse phase.
Lamp Voltage Feedback Circuit
FAN7318A has two OLR pins for lamp voltage feedback
and protections. The inputs of two OLR pins are
connected to the internal full-wave rectifier circuit. The
full-wave rectified signals of two OLR inputs are
connected to the maximum detector circuit for lamp
voltage feedback and protections. They are connected
to the minimum detector circuit for protections.
Protections
The FAN7318A provides the following latch-mode
protections: Open-Lamp Regulation (OLR), Open-Lamp
Protection (OLP), Short-Lamp Protection (SLP), CMPHigh Protection (CHP), and Thermal Shutdown (TSD).
The latch is reset when VIN falls to the UVLO voltage or
ENA is pulled down to GND.
The protection delay time can be adjusted by a capacitor
between the TIMER pin and GND.
Figure 49. Open-Lamp Regulation in Striking Mode
max
Finally, if VOLR
is more than 2.2V, the error amplifier for
OLR is operating and CMP sink current increases, so
CMP voltage decreases and the lamp voltage maintains
the determined value, as shown in Figure 50.
Figure 48. Protection Timing Delay
Assume that the TIMER pin capacitor is 1µF.
The striking time is calculated as:
tstrike =
C ΔVstr 1μ F • 3V
=
= 1.5s
Isur 1
2μ A
(6)
The OVP and SLP delay time are calculated as:
tOVP _ SLP =
C ΔVnor 1μ F • 1V
=
= 20ms
Isur 2
50 μ A
Figure 50. 2.2V Open-Lamp Regulation
(7)
Over-Voltage Protection
V max
In normal mode, while OLR is higher than 1.34V, the
TIMER pin capacitor is charged by an internal current
source of 50µA. Once the TIMER reaches 1V, the IC
enters shutdown, as shown in Figure 51. This protection
is disabled in striking mode to ignite lamps reliably.
The CMP-high protection and OLP delay time are
calculated as:
tOLP _ CMPH =
C ΔVnor 1μF • 1V
=
= 500ms
Isur 1
2μ A
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
(8)
www.fairchildsemi.com
18
FAN7318A — LCD Backlight Inverter Drive IC
Open-Lamp Regulation
When the maximum of the rectified OLR input voltages
max
( VOLR
) is more than 2V, the IC enters regulation mode
and controls CMP voltage. The IC limits the lamp
max
voltage by decreasing CMP source current. If VOLR
is
between 1.34V and 2V, CMP source current decreases
max
to 2.8µA. Then, if VOLR
reaches 2V, CMP source current
decreases to 0µA, so the CMP voltage remains constant
and the lamp voltage also remains constant, as shown
in Figure 49.
Lamp Current Feedback Circuit
Figure 51. Over-Voltage Protection in Normal Mode
max
In burst dimming mode, while VOLR
is higher than 1.34V,
burst dimming is disabled, so that the TIMER pin
capacitor is charged continuously by an internal current
source of 50µA. Once the TIMER reaches 1V, the IC
enters shutdown, as shown in Figure 52.
Figure 54. Mode Change from Striking to Normal
min
After ignition, if VOLP
is less than 0.5V for a time
predetermined by the TIMER pin capacitor and an
internal current source, 2µA in normal mode; the IC is
shut down, as shown in Figure 55 and Figure 56.
Figure 52. Over-Voltage Protection in Burst
Dimming Mode
OLP
Open-Lamp Protection
min
If the minimum of the rectified OLP voltages ( VOLP
) is
less than 0.7V during initial operation, the IC operates in
striking mode for a time predetermined by the TIMER pin
capacitor and an internal current source, 2µA, as shown
in Figure 53.
OLP1
OLP2
Min. & Max.
Detector
/Full or Half
Wave
Rectifier
OLP min.
-
0.5V
+
150μs
Delay
Figure 55. Open-Lamp Protection in Normal Mode
O LP 1
O LP 2
Tim er
Figure 53. Open-Lamp Protection in Striking Mode
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
19
FAN7318A — LCD Backlight Inverter Drive IC
The IC starts operating in striking mode and remains in
min
striking mode until 17 pulses of VOLP
higher than 0.7V
and OLR<1.34V occur. If more than 17 pulses and
OLR<1.34V, the IC changes from striking mode into
normal mode, as shown in Figure 54.
Lam p o p en
O LP 1
O LP 2
O LP 2
Figure 58. Open-Lamp Protection Disable in
DCR Mode
Tim er
Short-Lamp Protection
min
If the minimum of the rectified OLR voltages ( VOLR
) is
less than 0.3V for a time predetermined by the TIMER
pin capacitor and an internal current source of 50µA in
normal mode; the IC is shut down, as shown in Figure
59. This protection is disabled in striking mode to ignite
lamps reliably.
O LP1
O LP2
Figure 56. Open-Lamp Protection in Normal Mode
min
In burst dimming mode, if VOLP
is less than 0.5V for
another time predetermined by the TIMER pin capacitor
and an internal current source, 2µA; the IC is shut down,
as shown in Figure 57. The open-lamp protection delay
in burst dimming mode is shorter than in full-brightness
because short-lamp condition is detected at rising
interval of lamp voltage in burst dimming, then another
internal current source is turned on during the interval.
TIM ER
Figure 59. Short-Lamp Protection in Normal Mode
O LP 1
min
In burst dimming mode, if VOLR
is less than 0.3V for a
time predetermined by the TIMER pin capacitor and a
internal current source of 50µA turned on only burst
dimming on time; the IC is shut down, as shown in
Figure 60. SLP protection delay changes, depending on
burst dimming on duty ratio.
Z o o m o f O LP 2
O LP 2
Figure 57. Open-Lamp Protection in Burst Dimming
Mode
Applying voltage lower than 2.1V to the ENA pin enables
OLP. Applying voltage higher than 2.5V to the ENA pin
disables OLP and is called as DCR mode. Regardless of
DCR mode, OLP is enabled in striking mode.
Figure 60. Short-Lamp Protection in Burst
Dimming Mode
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
20
FAN7318A — LCD Backlight Inverter Drive IC
Tim er
O LP 1
Figure 63. CMP-High Protection Disable by a
Pull- Down Resistor
Figure 61. Short-Lamp Protection Disable in
DCR Mode
Thermal Shutdown
The IC provides the function to detect the abnormal
over-temperature. If the IC temperature exceeds
approximately 150°C, the thermal shutdown triggers.
CMP-High Protection
If CMP is more than 3.5V for a time predetermined by
the TIMER pin capacitor and a internal current source of
50µA in normal mode; the IC is shut down, as shown in
Figure 62.
Figure 62. CMP-High Protection
This protection is disabled by a pull-down resistor (a few
MΩ) between CMP and GND. If CMP voltage reaches
2.5V, CMP source current decreases to 2µA. Determine
a pull-down resistor value such that the whole of this
current can flow through the resistor. If so, CMP-high
protection can be disabled, as shown Figure 63. This
protection is disabled in striking mode to ignite the
lamps reliably.
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
21
FAN7318A — LCD Backlight Inverter Drive IC
Applying voltage higher than 2.5V to the ENA pin
disables SLP. Applying voltage lower than 2.1V to the
ENA pin enables SLP.
Application
Device
Input Voltage Range
Number of Lamps
22-Inch LCD Monitor
FAN7318A
15V±10%
2
1. Features
OUTB
GND
BCT
BDIM
ENA
6
7
8
9
OUTA
REF
5
10
VIN
CT
4
11
14
OLR2
ADIM
3
12
15
OLP2
CMP
2
13
16
OLP1
OLR1
TIMER
1
High-Efficiency, Single-Stage Power Conversion
P-N Half-Bridge Topology
Reduces Required External Components
Enhanced System Reliability through Protection Functions
IC1
ƒ
ƒ
ƒ
ƒ
BDIM
Figure 64. Typical Application Circuit
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
22
FAN7318A — LCD Backlight Inverter Drive IC
Typical Application Circuit (LCD Backlight Inverter)
10.00
9.80
A
8.89
16
9
B
4.00
3.80
6.00
PIN ONE
INDICATOR
1.75
1
5.6
8
0.51
0.35
1.27
(0.30)
0.25
M
1.27
C B A
0.65
LAND PATTERN RECOMMENDATION
1.75 MAX
1.50
1.25
SEE DETAIL A
0.25
0.10
C
0.25
0.19
0.10 C
0.50
0.25 X 45°
(R0.10)
NOTES: UNLESS OTHERWISE SPECIFIED
GAGE PLANE
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AC, ISSUE C.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD
FLASH AND TIE BAR PROTRUSIONS
D) CONFORMS TO ASME Y14.5M-1994
E) LANDPATTERN STANDARD: SOIC127P600X175-16AM
F) DRAWING FILE NAME: M16AREV12.
(R0.10)
0.36
8°
0°
SEATING PLANE
0.90
0.50
(1.04)
DETAIL A
SCALE: 2:1
Figure 65. -Lead, Small Outline Integrated Circuit (SOIC) Package
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
23
FAN7318A — LCD Backlight Inverter Drive IC
Physical Dimensions
FAN7318A — LCD Backlight Inverter Drive IC
© 2009 Fairchild Semiconductor Corporation
FAN7318A • 1.0.0
www.fairchildsemi.com
24
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