IDT IDTQS74FCT2821CTQ High-speed cmos bus interface 10-bit register Datasheet

IDTQS74FCT2821AT/BT/CT
HIGH-SPEED CMOS BUS INTERFACE 10-BIT REGISTER
INDUSTRIAL TEMPERATURE RANGE
HIGH-SPEED CMOS
BUS INTERFACE
10-BIT REGISTER
IDTQS74FCT2821AT/BT/CT
DESCRIPTION:
FEATURES:
The IDTQS74FCT2821T is a 10-bit high-speed CMOS TTL-compatible
buffered register with 3-state outputs, with a 25Ω resister that is useful for
driving transmission lines and reducing system noise. The 2821 series parts
can replace the 821 series to reduce noise in an existing design. All inputs
have clamp diodes for undershoot noise suppression. All outputs have
ground bounce suppression. Outputs will not load an active bus when Vcc
is removed from the device.
•
•
•
•
•
•
CMOS power levels: <7.5mW static
Undershoot clamp diodes on all outputs
True TTL input and output compatibility
Ground bounce controlled outputs
Reduced output swing of 0 to 3.5V
Ω series resistor outputs reduce reflection and other
Built-in 25Ω
system noise
• A, B, and C speed grades
• IOL = 12mA
• Available in SOIC and QSOP packages
FUNCTIONAL BLOCK DIAGRAM
OE
Q
D
25Ω
Dx
CP
Yx
CP
INDUSTRIAL TEMPERATURE RANGE
MARCH 2002
1
c
2002 Integrated Device Technology, Inc.
DSC-5256/4
IDTQS74FCT2821AT/BT/CT
HIGH-SPEED CMOS BUS INTERFACE 10-BIT REGISTER
INDUSTRIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS(1)
PIN CONFIGURATION
Symbol
OE
24
1
VCC
Unit
VTERM
Terminal Voltage with Respect to GND
–0.5 to +7
V
TSTG
Storage Temperature
–65 to +150
°C
2
23
Y0
IOUT
DC Output Current Max Sink Current/Pin
120
mA
D1
3
22
Y1
IIK
Input Diode Current, VIN < 0
–20
mA
IOK
Output Diode Current, VOUT < 0
–50
mA
D2
4
21
Y2
D3
5
20
Y3
D4
6
19
Y4
D5
7
18
Y5
D6
8
17
Y6
D7
9
16
Y7
D8
10
15
Y8
D9
11
14
Y9
13
12
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE (TA = +25°C, F = 1.0MHz)
CP
Typ.
Max.
Unit
VIN = 0V
4
—
pF
Input Capacitance
(3)
CIN
Input Capacitance
VIN = 0V
8
—
pF
COUT(4)
Output Capacitance
VOUT = 0V
6
—
pF
COUT(5)
Output Capacitance
VOUT = 0V
8
—
pF
NOTES:
1. This parameter is measured at characterization but not tested.
2. Pins 1, 3-11, 13.
3. Pin 2.
4. Pins 15-22.
5. Pins 14, 23.
Pin Names
I/O
Dx
I
D Flip-Flop Data Inputs
Description
CP
I
Clock Pulse for the register. Enters data into the register
on the LOW-to-HIGH transition.
Yx
O
Register 3-State Outputs
OE
I
Output Control. When the OE input is HIGH, the Yx
outputs are in the high impedance state. When the OE
input is LOW, the TRUE register data is present at the
Yx outputs.
FUNCTION TABLE(1)
Inputs
10
CP
OE
2
Value Qx
Yx
Function
H
L
↑
L
Z
High-Z
H
H
↑
H
Z
High-Z
H
L
↑
L
Z
Load
H
H
↑
H
Z
Load
L
L
↑
L
L
Load
L
H
↑
H
H
Load
↑ = LOW-to-HIGH transition
CP
Outputs
CP
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
Z = High-Impedance
Yx
Internal
Dx
OE
LOGIC SYMBOL
Q
Conditions
(2)
CIN
PIN DESCRIPTION
D
Parameter(1)
Symbol
SOIC/ QSOP
TOP VIEW
Dx
Max
D0
GND
10
Description
IDTQS74FCT2821AT/BT/CT
HIGH-SPEED CMOS BUS INTERFACE 10-BIT REGISTER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5%
Symbol
Parameter
Test Conditions
Min.
Typ.(1)
Max.
Unit
—
—
V
VIH
Input HIGH Level
Guaranteed Logic HIGH Level
2
VIL
Input LOW Level
Guaranteed Logic LOW Level
—
—
0.8
V
∆VT
Input Hysteresis
VTLH - VTHL for all inputs
—
0.2
—
V
IIH
Input HIGH Current
VCC = Max.
0 ≤ VIN ≤ VCC
—
—
±5
µA
IIL
Input LOW Current
IOZ
Off-State Output Current (Hi-Z)
0 ≤ VIN ≤ VCC
—
—
±5
µA
VCC = Max
2.0V(2)
IOR
VIC
Current Drive
Input Clamp Voltage
VCC = Max., VOUT =
VCC = Min, IIN = -18mA , TA = 25°C(2)
50
—
—
–0.7
—
–1.2
mA
V
VOH
VOL
ROUT(3)
Output HIGH Voltage
Output LOW Voltage
Output Resistance
VCC = Min.
VCC = Min.
VCC = Min.
2.4
—
18
—
—
25
—
0.5
40
V
V
Ω
IOH = -15mA
IOL = 12mA
IOH = 12mA
NOTES:
1. Typical values are at VCC = 5.0V, TA = 25°C.
2. This parameter is measured at characterization but not tested.
3. ROUT changed on March 8, 2002. See rear page for more information.
POWER SUPPLY CHARACTERISTICS
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = -40°C to +85°C, VCC = 5.0V ± 5%
Symbol
ICC
Parameter
Quiescent Power Supply Current
∆ICC
Supply Current per Input TTL Inputs HIGH
ICCD
Supply Current per Input per MHz
Test Conditions(1)
VCC = Max.
freq = 0
0V ≤ VIN ≤ 0.2V or
VCC - 0.2V ≤ VIN ≤ Vcc
VCC = Max.
VIN = 3.4V(2)
freq = 0
VCC = Max.
Outputs Open and Enabled
One Bit Toggling
50% Duty Cycle
Other inputs at GND or Vcc(3,4)
Min.
—
Max.
1.5
Unit
mA
—
2
mA
—
0.25
mA/MHz
NOTES:
1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics.
2. Per TLL driven input (VIN = 3.4V).
3. For flip-flops, ICCD is measured by switching one of the data input pins so that the output changes every clock cycle. This is a measurement of device power consumption
only and does not include power to drive load capacitance or tester capacitance.
4. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
3
IDTQS74FCT2821AT/BT/CT
HIGH-SPEED CMOS BUS INTERFACE 10-BIT REGISTER
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(1)
Symbol
tPLH
tPHL
tPLH
tPHL
tS
tH
Parameter
Clock to Y Delay
OE = LOW
Clock to Y Delay
OE = LOW(2)
Data to CP Setup Time
Data to CP Hold Time
FCT2821AT
Min.
Max.
—
10
FCT2821BT
Min.
Max.
—
7.5
FCT2821CT
Min.
Max.
—
6
Unit
ns
—
20
—
15
—
12.5
ns
4
2
—
—
3
1.5
—
—
3
1.5
—
—
ns
ns
NOTES:
1. CLOAD = 50pF, RLOAD = 500Ω unless otherwise noted.
2. CLOAD = 300pF.
TIMING REQUIREMENTS OVER OPERATING RANGE(1)
Symbol
tPLH
tPHL
tPZH
tPZL
tPZH
tPZL
tPHZ
tPLZ
tPHZ
tPLZ
Parameter(2)
Clock to Y Delay
HIGH or LOW
Output Enable Time
OE to Yx
Output Enable Time(3)
OE to Yx
Output Disable Time(4)
OE to Yx
Output Disable Time
OE to Yx
FCT2821AT
Min.
Max.
7
—
FCT2821BT
Min.
Max.
6
—
FCT2821CT
Min.
Max.
6
—
Unit
ns
—
12
—
8
—
7
ns
—
23
—
—
—
—
ns
—
7
—
6.5
—
6.2
ns
—
9
—
7.5
—
6.5
ns
NOTES:
1. CLOAD = 50pF, RLOAD = 500Ω unless otherwise noted.
2. See Test Circuits and Waveforms
3. CLOAD = 300pF.
4. CLOAD = 5pF.
4
IDTQS74FCT2821AT/BT/CT
HIGH-SPEED CMOS BUS INTERFACE 10-BIT REGISTER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
VCC
SWITCH POSITION
7.0V
500Ω
Pulse
Generator
VOUT
VIN
D.U.T.
50pF
RT
500Ω
Test
Switch
Open Drain
Disable Low
Enable Low
Closed
All Other Tests
Open
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
CL
FCTL link
Test Circuits for All Outputs
DATA
INPUT
tH
tSU
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
3V
1.5V
0V
3V
1.5V
0V
tREM
tSU
LOW-HIGH-LOW
PULSE
1.5V
tW
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
3V
1.5V
0V
tH
FCTL link
Pulse Width
FCTL link
Set-Up, Hold, and Release Times
ENABLE
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
OPPOSITE PHASE
INPUT TRANSITION
tPHL
3V
1.5V
0V
DISABLE
3V
1.5V
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
3V
1.5V
0V
OUTPUT
NORMALLY
HIGH
FCTL link
SWITCH
CLOSED
tPZH
SWITCH
OPEN
0V
tPLZ
tPZL
VOH
1.5V
VOL
3.5V
1.5V
3.5V
0.3V
VOL
tPHZ
0.3V
VOH
1.5V
0V
0V
FCTL link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
5
IDTQS74FCT2821AT/BT/CT
HIGH-SPEED CMOS BUS INTERFACE 10-BIT REGISTER
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDTQS
XX
FCT
XXXX
Device Type
Temp. Range
XX
Package
SO
Q
Small Outline IC (gull wing)
Quarter-size Small Outline Package
2821AT
2821BT
2821CT
High-Speed CMOS Bus Interface 10-Bit Register
74
–40°C to +85°C
As per PCN L0201-02, the Output Resistance (ROUT) specifications have changed as of March 8, 2002. The original specifications were:
Parameter
ROUT
Description
Min.
Typ.
Max.
Unit
VCC = Min, IOL = -15mA
20
28
40
Ω
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6
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