Fujitsu MB3789PFV Switching regulator controller (supporting external synchronization) Datasheet

FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27211-3E
ASSP For Power Supply Applications
BIPOLAR
Switching Regulator Controller
(Supporting External Synchronization)
MB3789
■ DESCRIPTION
The MB3789 is a PWM (pulse width modulation) switching regulator controller supporting an external sync signal.
The MB3789 incorporates two error amplifiers which can be used respectively for voltage control and current
control, allowing the IC to serve as a DC/DC converter with current regulating functions.
The MB3789 is the ideal IC for supplying power to the back-lighting fluorescent tube for a liquid crystal display
(LCD) device such as a camera-integrated VTR.
■ FEATURES
•
•
•
•
•
•
•
•
•
Wide range of operating power supply voltages: 3 V to 18 V
Low current consumption: 1.5 mA (Typ.)
Wide input voltage range of error amplifier: –0.2 V to VCC – 1.8 V
Built-in two error amplifier
Oscillator capable of operating with an external sync signal
Built-in timer latch short protection circuit
Variable dead time provides control over total operating range
Output supporting a power MOSFET
16-pin SSOP package mountable at high density
■ PACKAGE
16-pin Plastic SSOP
(FPT-16P-M05)
MB3789
■ PIN ASSIGNMENT
(TOP VIEW)
VCC1
1
16
GND
VREF
2
15
OUT
CT
3
14
VCC2
SYNC
4
13
CB
SCP
5
12
DTC
6
11
FB2 *2
−IN1 *1
7
10
−IN2 *2
+IN1 *1
8
9
+IN2 *2
FB1
*1
(FPT-16P-M05)
*1: Pins on error amplifier 1
*2: Pins on error amplifier 2
2
MB3789
■ PIN DESCRIPTION
Power-supply
circuit
Sawtooth waveform
oscillator
I/O control unit
Pin no.
Pin symbol
I/O
Function
7
–IN1
I
Error amplifier 1 inverting input pin
8
+IN1
I
Error amplifier 1 noninverting input pin
6
FB1
O
Error amplifier 1 output pin
10
–IN2
I
Error amplifier 2 inverting input pin
9
+IN2
I
Error amplifier 2 noninverting input pin
11
FB2
O
Error amplifier 2 output pin
13
CB
—
Output bootstrap pin.
Connect a capacitor between the CB and OUT pins to bootstrap the
output transistor.
5
SCP
—
Capacitor connection pin for short-circuit protection circuit
12
DTC
I
Dead time control pin
15
OUT
O
Totem-pole output pin
3
CT
—
Sawtooth waveform frequency setting capacitor/resistor connection
pin
4
SYNC
I
1
VCC1
—
Reference power supply, control circuit power-supply pin
14
VCC2
—
Output circuit power-supply pin
2
VREF
O
Reference voltage output pin
16
GND
—
Ground pin
External sync signal input pin
3
MB3789
■ BLOCK DIAGRAM
Error amp. 1
13
PWM comparator
+IN1 8
CB
14 VCC2
−IN1 7
OUT
FB1 6
15
Error amp. 2
10 kΩ
+IN2 9
−IN2 10
FB2 11
DTC 12
−0.9 V
8 µA
4 µA
−0.3 V
SCP comparator 1
1.25 V
SCP comparator 3
1.25 V
2 µA
VREF
SCP comparator 2
VCC1 1
1.1 V
VREF 2
1.8 V
Reference Power
voltage
ON/OFF
supply
circuit
16
GND
SR latch
Under voltage
Lock-out
protection
circuit
5
4
SCP
SYNC
External sync signal
4
Sawtooth
wave
oscillator
3
CT
MB3789
■ FUNCTIONAL DESCRIPTION
1. Switching Regulator Functions
(1) Reference voltage generator
The reference voltage generator uses the voltage supplied from the power supply pin (pin 1) to generate a
temperature-compensated, reference voltage (about 2.50 V) as the reference supply voltage for the IC’s internal
circuitry.
The reference voltage can be output, up to 50 µA, to an external device through the VREF pin (pin 2).
This regulated reference voltage can be used as the reference voltage for the switching regulator and also
used for setting the dead time.
(2) Sawtooth waveform oscillator
With a timing capacitor and a timing resistor connected to the CT pin (pin 3), the sawtooth waveform oscillator
generates a sawtooth wave which remains stable even with supply voltage variations or temperature changes.
The sawtooth wave is input to the PWM comparator. The amplitude of oscillating waveform is 0.3 V to 0.9 V.
In addition, the oscillator can be used for external synchronization, where it generates a sawtooth waveform
synchronous to the input signal from the SYNC pin (pin 4).
(3) Error amplifiers
The error amplifiers detect the output voltage from the switching regulator and outputs the PWM control signal.
Since they support a wide range of in-phase input voltages from –0.2 V to “VCC – 1.8 V”, they can be set easily
from an external power supply.
An arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the error amplifier output
pin to the inverting input pin, enabling stable phase compensation to the system.
The MB3789 can make a current-regulated DC/DC converter using the two internal error amplifiers respectively
for voltage control and current control.
(4) PWM comparator
The PWM comparator is a voltage comparator with one inverting input and three noninverting inputs, serving
as a voltage-pulse width converter for controlling the output duty depending on the input voltage.
The PWM comparator turns on the output transistor during the interval in which the sawtooth wave voltage
level is lower than the voltage levels at all of the error amplifier output pins, the SCP pin (pin 5), and at the
DTC pin (pin 12).
(5) Output circuit
The output circuit is a power MOSFET driven, output circuit in a totem-pole configuration. It can drive the gate
voltage up to near the supply voltage with a bootstrap capacitor connected between the OUT pin (pin 15) and
CB pin (pin 13). (See “■ SETTING THE BOOTSTRAP CAPACITOR (CBS).”)
2. Protection Functions
(1) Timer-latch short-circuit protection circuit
SCP comparator 1 detects the output voltage levels of error amplifiers 1 and 2. When the output voltage level
of either (or both) of the two error amplifiers reaches 1.25 V, the timer circuit is actuated to start charging the
external protection-enable capacitor connected to the SCP pin (pin 5).
If the error amplifier output is not restored to the normal voltage level before the capacitor voltage reaches
1.8 V, the latch circuit is actuated to turn off the output transistor while making the dead time 100%.
To reset the actuated protection circuit, turn the power supply on back. (See “■ SETTING THE SOFT START/
SHORT-CIRCUIT DETECTION TIME.”)
5
MB3789
(2) Low input voltage malfunction preventive circuit
The transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned
on, may cause errors in the control IC, resulting in breakdown or degradation of the system. The low input
voltage malfunction preventive circuit detects the internal reference voltage level according to the supply voltage
level and, if the input voltage is low, turn off the output transistor and maintains the SCP pin (pin 5) at 0 V while
making the dead time 100%.
The circuit restores voltage supply when the supply voltage reaches its threshold voltage.
6
MB3789
■ ABSOLUTE MAXIMUM RATINGS
(Ta = +25°C)
Parameter
Symbol
Condition
Power supply voltage
VCC
—
Power dissipation
PD
Ta
+25°C
Rating
Unit
Min.
Max.
—
20
V
—
440*
mW
Operating temperature
Top
—
–30
+85
°C
Storage temperature
Tstg
—
–55
+125
°C
* : When mounted on a 10 cm-square double-side epoxy board.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
(Ta = +25°C)
Parameter
Power supply voltage
Symbol
Condition
VCC1
—
VCC2
Value
Unit
Min.
Typ.
Max.
3.0
5.0
18
V
—
6.0
18
V
Reference voltage output
current
IOR
—
–50
–30
—
µA
Error amp. input voltage
VI
—
–0.2
—
VCC – 1.8
V
IO+
CB = 4700 pF, t 2 µs
–70
–40
—
mA
IO–
CB = 4700 pF, t 2 µs
—
40
70
mA
Timing resistance
RT
—
10
39
200
kΩ
Timing capacitance
CT
—
470
1000
6800
pF
Oscillation frequency
fOSC
—
1
20
200
kHz
Operating temperature
TOP
—
–30
+25
+85
°C
Output current
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
7
MB3789
■ ELECTRICAL CHARACTERISTICS
(VCC1 = 5 V, VCC2 = 6 V, Ta = +25°C)
Parameter
Output voltage
Reference
voltage block
Output voltage
temperature
variation
Soft start
block
Short circuit
detection
block
Triangular
waveform
oscillator
block
Max.
IOR = 0 µA
2.400
2.500
2.600
V
∆VREF/VREF Ta = –30°C to +85°C*
—
0.2
2
%
—
1
10
mV
VREF
Load stability
Load
IOR = 0 µA to –50 µA
Hysteresis width
Unit
Typ.
VCC = 3.0 V to 18 V
Threshold voltage
Value
Min.
Line
IOS
VREF = 0 V
—
2
10
mV
–700
–450
–300
µA
VTH
—
—
2.15
2.62
V
VTL
—
1.62
1.90
—
V
VHYS
—
80
250
—
mV
Reset voltage (VCC)
VR
—
1.0
1.4
—
V
Charge current
ICHG
VSCP 0.9 V
–2.8
–2.0
–1.2
µA
VT0
Duty cycle = 0%
0.2
0.3
0.4
V
Threshold voltage
VT100
0.8
0.9
1.0
V
Threshold voltage
VTH
—
1.70
1.80
1.90
V
Input standby
voltage
VSTB
—
1.15
1.25
1.35
mV
Duty cycle = 100%
Input latch voltage
VI
—
Input source current
II
VSCP = 1.5 V
—
50
100
mV
–8.4
–6.0
–3.6
µA
Oscillator frequency
fOSC
CT = 1000 pF,
RT = 39 kΩ
17
20
23
kHz
Frequency voltage
variation
∆f/fdv
VCC = 3 V to 18 V
—
1
10
%
Frequency
temperature
variation
∆f/fdT
Ta = –30°C to +85°C*
—
3
—
%
Synchronous pin
input current
ISYNC
VTHSY = 5 V
0.9
1.3
2.2
mA
Synchronous pin
threshold voltage
VTHSY
0.65
0.75
0.85
V
* : Standard design value
8
Condition
Input stability
Short output current
Under
voltage
lockout
protection
circuit
Symbol
—
(Continued)
MB3789
(Continued)
(VCC1 = 5 V, VCC2 = 6 V, Ta = +25°C)
Parameter
Error
amplifier
Value
Min.
Typ.
Max.
Unit
VIO
VFB = 0.6 V
—
—
10
mV
Input offset current
IIO
VFB = 0.6 V
—
—
100
nA
Input bias current
IB
VFB = 0.6 V
–200
–30
—
nA
Common mode
input voltage range
VCM
—
–0.2
—
VCC – 0.8
V
Common mode
rejection ratio
CMRR
—
60
100
—
dB
Voltage gain
AV
—
60
100
—
dB
Frequency
bandwidth
BW
—
800
—
kHz
AV = 0 dB*
Maximum output
voltage range
VOM+
—
VREF – 0.3
2.4
—
V
VOM–
—
—
0.05
0.3
V
Output sink current
IOM+
VFB = 0.6 V
30
60
—
µA
Output source
current
IOM–
VFB = 0.6 V
—
–2
–0.6
mA
VT0
Duty cycle = 0%
0.2
0.3
0.4
V
Duty cycle = 100%
0.8
0.9
1.0
V
Vdt = VREF/4.2
45
55
65
%
Dead time
control block ON duty cycle
Input bias current
Threshold voltage
VT100
Dtr
IIbdt
VT0
VT100
Input sink current
IIN+
Input source current
IIN–
Power supply
current when output
off
–500
–100
—
nA
Duty cycle = 0%
—
0.2
0.3
0.4
V
Duty cycle = 100%
0.8
0.9
1.0
V
—
30
60
—
µA
—
—
–2
–0.6
mA
VOH
CL = 2000 pF,
CB = 4700 pF
5.5
6.0
—
V
VOL
CL = 2000 pF,
CB = 4700 pF
—
1.1
1.4
V
Output block Output voltage
General
Condition
Input offset voltage
Threshold voltage
PWM
comparator
block
Symbol
ICC1
—
—
1.15
1.65
mA
ICC2
—
—
350
500
µA
* : Standard design value
9
MB3789
■ TYPICAL CHARACTERISTICS
Output power supply current vs.
power supply voltage characteristics
Power supply current vs.
power supply voltage characteristics
500
Output power supply current ICC1 (µA)
Power supply current ICC1 (mA)
2.4
VCC2 = 6 V
Ta = +25°C
2.0
1.6
1.2
0.8
0.4
400
300
200
100
0
0
0
4
8
12
16
0
20
4
8
12
16
20
Power supply voltage VCC1 (V)
Power supply voltage VCC2 (V)
Reference voltage vs.
power supply voltage characteristics
Reference voltage vs.
ambient temperature characteristics
2.56
5.0
2.54
VCC2 = 6 V
IOR = 0 µA
Ta = +25°C
4.0
Reference voltage VREF (V)
Reference voltage VREF (V)
VCC1 = 5 V
Ta = +25°C
3.0
2.0
1.0
VCC1 = 5 V
VCC2 = 6 V
IOR = 0 µA
2.52
2.50
2.48
2.46
2.44
0
0
4
8
12
16
−40
20
−20
0
20
40
60
80
Power supply voltage VCC1 (V)
Ambient temperature Ta (°C)
Sawtooth waveform maximum amplitude voltage vs.
timing capacitance characteristics
(With CT/RT oscillation)
Sawtooth wave frequency vs.
timing resistance characteristics
(With CT/RT oscillation)
500 k
VCC1 = 5 V
VCC2 = 6 V
RT = 39 kΩ
SYNC = GND
Ta = +25°C
1.2
1.0
0.8
0.6
0.4
0.2
0
10 2
5 × 102 103
5 × 103 104
Timing capacitance CT (pF)
5 × 104
Sawtooth wave frequency f (Hz)
1.4
Sawtooth waveform maximum
amplitude voltage VCT (V)
100
VCC1 = 5 V
VCC2 = 6 V
SYNC = GND
Ta = +25°C
100 k
50 k
10 k
5k
CT = 470 pF
1k
CT = 1500 pF
500
CT = 4700 pF
CT = 6800 pF
100
2k
5k
10 k
50 k 100 k
500 k 1 M
Timing resistance RT (Ω)
(Continued)
10
MB3789
Duty vs. sawtooth wave
frequency characteristics
(With CT/RT oscillation)
Sawtooth waveform period vs.
timing capacitance characteristics
(With CT/RT oscillation)
100
40
20
5
5 × 10
3
4
10
5 × 10
0
4
200
500 1 k
5 k 10 k
50 k 100 k
Timing capacitance CT (pF)
Sawtooth wave frequency f (Hz)
Sawtooth wave frequency vs.
ambient temperature characteristics
(With CT/RT oscillation)
Sawtooth wave frequency vs.
ambient temperature characteristics
(In external synchronization)
VCC1 = 5 V
VCC2 = 6 V
CT = 1500pF
RT = 39 kΩ
SYNC = GND
+10
Frequency regulation ∆f/f (%)
Frequency regulation ∆f/f (%)
60
10
2
2
2
3
2 × 10 5 × 10 10 5 × 10 10
+5
0
−5
−10
−40
−20
0
20
40
60
80
500 k
VCC1 = 5 V
VCC2 = 6 V
CT = 1500pF
RT = 43 kΩ
fSYNC = 15.0 kHz
+10
+5
0
−5
10
−40
100
−20
0
20
40
60
80
100
Ambient temperature Ta (°C)
Ambient temperature Ta (°C)
Gain vs. frequency and phase vs.
frequency characteristics
Measurement circuit for gain-frequency
characteristics and phase-frequency characteristics
VCC1 = 5 V
VCC2 = 6 V
Ta = +25°C
40
Av
20
Gain AV (dB)
Duty (%)
50
VCC1 = 5 V
VCC2 = 6 V
VDT = 0.6 V
CT = Variable
RT = 39 kΩ
SYNC = GND
Ta = −25°C
80
VCC1 = 5 V
VCC2 = 6 V
RT = 39 kΩ
SYNC = GND
Ta = +25°C
100
90
0
0
φ
−20
2.5 V
180
−90
4.7 kΩ
Phase φ (deg)
Sawtooth waveform period t (µs)
500
2.5 V
4.7 kΩ
240 kΩ
10 µF
OUT
Error amp.
IN
4.7 kΩ
4.7 kΩ
−180
−40
1k
10 k
100 k
1M
10 M
Frequency f (Hz)
(Continued)
11
MB3789
(Continued)
Duty vs. DTC pin voltage characteristics
Output pin (OUT) voltage and current waveforms
VCC1 = 5 V
VCC2 = 6 V
CT = 1500 pF
RT = 39 kΩ
SYNC = GND
6
4
2
60
Output current IO (mA)
Duty (%)
80
40
20
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
DTC pin voltage Vdt (V)
Power comsumption vs.
ambient temperature characteristics
500
Power comsumption PD (mW)
440
400
300
200
100
0
−30 −20
0
20
40
60
Ambient temperature Ta (°C)
12
80
100
100
0
50
0
−50
−100
0
4
8
12
Time t (µs)
16
20
Output voltage VOUT (V)
VCC1 = 5 V,
VCC2 = 6 V
100
MB3789
■ SETTING THE OUTPUT VOLTAGE
Set the output voltage by connecting the input pins (+IN, –IN) and output pin (FB) of error amplifiers 1 and 2 as
shown in Figures 1 and 2.
VREF
VOUT +
R
R1
R
R2
VREF
+
VOUT =
2 × R2
(R1 + R2)
RNF
Figure 1 Setting the output voltage (positive output voltage (VOUT))
VREF
R
R
VOUT− = −
R1
VREF
2 × R1
(R1 + R2) + VREF
R2
RNF
VOUT−
Figure 2 Setting the output voltage (negative output voltage (VOUT))
13
MB3789
■ CONNECTION FOR OUTPUT CONTROL WITH ONE ERROR AMPLIFIER
The MB3789 can make up a system using only one of the two error amplifiers. In this case, connect the +IN and
–IN pins of the unused error amplifier to the VREF and GND pins, respectively, and leave the FB pin open.
When VCC – 1.8 V < VREF, divide the VREF voltage using a resistor and apply the voltage to the +IN pin.
VREF
2
+IN1
8
−IN1
7
FB1
6
“Open”
Figure 1 Connection without using error amplifier 1
VREF
2
+IN2
9
−IN2
10
FB2
11
“Open”
Figure 2 Connection without using error amplifier 2
14
MB3789
■ CONNECTING THE SAWTOOTH WAVEFORM OSCILLATOR
1. Connection for internal oscillation
For internal oscillation, connect the frequency setting capacitor (CT) and resistor (RT) to the CT pin (pin 3) and
leave the SYNC pin (pin 4) open or connect it to GND.
The oscillation frequency can be set with the CT and RT constants.
CT
SYNC
3
4
CT
RT
Leave “open” or connect to GND
Figure 5 Connection for internal oscillation
2. Connection for external synchronous oscillation
For external synchronous oscillation, connect the frequency setting capacitor (CT) and resistor (RT) to the CT pin
(pin 3) and connect the external sync signal to the SYNC pin (pin 4).
In this case, select the CT and RT conditions so that the oscillation frequency is 5% to 10% lower than the
frequency of the external sync signal excluding the setting error of the oscillation frequency.
CT
SYNC
3
4
External sync signal
CT
RT
Figure 6 Connection for external synchronous oscillation
15
MB3789
■ SETTING THE DEAD TIME
When the device is set for step-up inverting output based on the flyback method, the output transistor is fixed
to a full-ON state (ON duty = 100%) when the power supply is turned on. To prevent this problem, you may
determine the voltage at the DTC pin (pin 12) from the VREF voltage so you can set the output transistor’s dead
time (maximum ON-duty period) as shown in Figure 7 below.
1. Setting the dead time
When setting the dead time, use resistors as shown in Figure 7 to connect the VREF and DTC pins to GND. When
the voltage at the DTC pin (pin 12) is lower than the sawtooth wave output voltage from the oscillator, the output
transistor is turned off.
To set the dead time, see “Duty vs. DTC pin voltage” (in “■ STANDARD CHARACTERISTIC CURVES”).
Vdt =
R2
× VREF
R1 + R2
2. Connection without setting the dead time
If you do not set the dead time, connect the VREF and DTC pins as shown in Figure 8.
2 VREF
R1
12 DTC
Vdt
R2
Figure 7 Connection for setting the dead time
2 VREF
12 DTC
Figure 8 Connection without setting the dead time
16
MB3789
■ SETTING THE SOFT START/SHORT-CIRCUIT DETECTION TIME
Connecting capacitor CPE to the SCP pin (pin 5) as shown in Figure 9 enables a soft start and short-circuit
protection.
SCP comparator 1
8 µA
4 µA
1.25 V
Output OFF
SCP comparator 3
1.25 V
2 µA
SCP comparator 2
VREF
1.1 V
1.8 V
SR latch
Low input
voltage
protection
circuit
5
SCP
CPE
Figure 9 Soft start/short-circuit detection circuit
2
SCP pin voltage (V)
1.8 V
1.25 V
Output short-circuit
1
100%
Output short-circuit
tPE
50%
0%
0
ts
Soft start
Time t (s)
Figure 10 SCP pin operating waveform
17
MB3789
1. Soft Start
To prevent surge currents when the IC is turned on, you can set a soft start by connecting capacitor CPE to the
SCP pin (pin 5).
• Softstart time(ts): Time required up to duty cycle ~ 50% with output on
tS (s) ~ 0.15 × CPE (µF)
2. Protection from short circuit
SCP comparator 1 always compares the output voltage levels at error amplifiers 1 and 2 with the 1.25 V
reference voltage.
When the load conditions for the switching regulator are stable, the outputs from error amplifiers 1 and 2 do
not vary and thus short-circuit protection control remains balanced. In this case, the SCP pin (pin 5) is held at
the soft start end voltage (about 1.25 V).
If the load conditions change rapidly and the output voltage of error amplifier 1 or 2 reaches 1.25 V, for example,
because of a short-circuit of a load, capacitor CPE is charged further. When capacitor CPE is charged up to about
1.8 V, the SR latch is set and the output drive transistor is turned off. At this time, the dead time is set to 100%,
capacitor CPE is discharged, and the SCP pin becomes ~ 50 mV.
• Short-circuit detection time (tPE)
tPE (s) ~ 0.09 × CPE (µF)
3. Connection without using short-circuit protection
Add a clamp circuit as shown in Figure 11 so that the clamp voltage (VCRP) falls within the following range when
a short-circuit is detected: 1.0 V < VCRP < 1.7 V
Clamp circuit
5 SCP
VCRP
CPE
Figure 11 Connection without using short-circuit protection
18
MB3789
■ SETTING THE BOOTSTRAP CAPACITOR
When a bootstrap capacitor is connected, it raises the output-ON voltage (at the OUT pin (pin 15) when the
external MOS FET is turned “ON”) to the ~ VCC2 level. It can therefore drive the MOS FET at a higher threshold
voltage (Vth).
1. Connecting the bootstrap capacitor
Connect the bootstrap capacitor between the CB pin (pin 13) and OUT pin (pin 15).
VCC2
VCBS
id
13
14
CB
VCC2
VCC1
CBS
iC
I
15
OUT
10 kΩ
External
MOS FET
VOUT
: Charge current ic
: Discharge current id
Figure 12 Circuit with a bootstrap capacitor connected and current flow
• Calculation of bootstrap capacitance
CBS
500 × 106
× tON (max) [pF]
VCC2 – 2.6
tON (max): Maximum ON duty time
19
MB3789
2. Connection with no bootstrap capacitor
Connect the CB pin (pin 13) and VCC2 pin (pin 14) as shown in Figure 13.
VCC2
CB 13
VCC2 14
OUT 15
External
MOS FET
Note: Under a condition of “VCC2 − Vth < 1.1 V”, bootstrap capacitor CBS should be connected because
the external MOS FET cannot be driven sufficiently.
Vth: External MOS FET threshold voltage
Figure 13 Connection with no bootstrap capacitor connected
20
MB3789
3. Operation of the Bootstrap Capacitor
When voltage VOUT at the OUT pin (pin 15) is “L” level, the voltages (VC1) at both ends of the bootstrap capacitor
CBS is charged up to the VCC2 voltage level by charge current (iC).
When VOUT changes from “L” level to “H” level, the CB pin (pin 13) voltage VCBS rises to ~ 2 × VCC2 and VOUT
reaches almost the VCC2 level.
The charge accumulated at CBS at this time is released by discharge current id (output unit supply current).
See Figure 12 for circuit operation.
(VCC1 = 5 V, VCC2 = 6 V, CBS = 4700 pF)
2V
12
10
OUT pin voltage VOUT (V)
8
VCBS *1
6
6
4
4
CB pin voltage VCBS (V)
*2
2
2
VOUT
0
0
10 µs
2V
0
20
tON
40
60
80
100
tOFF
Time t (µs)
*1: Use the device with a setting of VCBS 18 V.
*2: The slant of VCBS is determined by the value of discharge current id (output unit supply current).
Figure 14 Bootstrap operating waveform
21
MB3789
■ EQUIVALENT SERIES RESISTANCE OF SMOOTHING CAPACITOR AND SYSTEM
STABILITY
The equivalent series resistance (ESR) value of a smoothing capacitor for the DC/DC converter largely affects
the loop phase characteristic.
Depending on the ESR value, the phase characteristic causes the ideal capacitor in a high-frequency domain
advance the loop phase (as shown in Figures 16 and 17) and thus the system is improved in stability. In contrast,
using a smoothing capacitor with low ESR lowers system stability. Use meticulous care when a semiconductor
electrolytic capacitor with low ESR (such as an OS capacitor) or a tantalum capacitor is used. (The next page
gives an example of reduction in phase margin when an OS capacitor is used.)
L
Tr
RC
VIN
D
RL
C
Figure 15 Basic circuit of step-down DC/DC converter
20
Gain (dB)
0
−20
(2)
Phase (deg)
0
(2)
−90
−40
(1) : RC = 0 Ω
(2) : RC = 31 mΩ
(1) : RC = 0 Ω
(2) : RC = 31 mΩ
−60
10
100
10 k
Frequency f (Hz)
Figure 16 Gain vs. frequency
22
−180
(1)
1k
(1)
100 k
10
100
1k
10 k
Frequency f (Hz)
Figure 17 Phase vs. frequency
100 k
MB3789
(Reference data)
Changing the smoothing capacitor from an aluminum electrolytic capacitor (RC ~ 1.0 Ω) to a low-ESR
semiconductor electrolytic capacitor (OS capacitor: RC ~ 0.2 Ω) halves the phase margin. (See Figures 19 and
20.)
VOUT
VO +
CNF
AV-phase characteristic
in this range
−IN
VIN
FB
+IN
R2
R1
VREF/2
Error amplifier
Figure 18 DC/DC converter Av vs. phase measurement diagram
AI electrolytic capacitor gain vs. frequency, phase vs. Frequency (DC/DC converter +5 V output)
60
Gain (dB)
AV
φ⇒
20
62°
0
90
0
−90
−20
−40
10
180
Phase (deg)
VCC = 10 V
RL = 25 Ω
CP = 0.1 µF
40
100
1k
10 k
VO +
AI electrolytic capacit
220 µF (16 V)
RC 1.0 Ω: fOSC = 1 kHz
GND
−180
100 k
Frequency f (Hz)
Figure 19 Gain vs. frequency
23
MB3789
OS capacitor gain vs. frequency, phase vs. frequency (DC/DC converter +5 V output)
60
Gain (dB)
20
180
90
φ⇒
0
27°
−90
−20
−40
10
0
Phase (deg)
VCC = 10 V
RL = 25 Ω
CP = 0.1 µF
AV
40
100
1k
Frequency f (Hz)
10 k
−180
100 k
Figure 20 Phase vs. frequency characteristic curves
24
VO +
OS capacitor
22 µF (16 V)
RC 0.2 Ω: fOSC = 1 kHz
GND
MB3789
■ APPLICATION EXAMPLE
2
VREF
8 +IN1
1
VCC1
VCC2 14
7 −IN1
CB 13
100 kΩ
18 kΩ
10 µH
10 µF
VCC
(5 V)
100 kΩ
2.7 kΩ
100 kΩ
6 FB1
4700 pF
150 kΩ
9 +IN2
MB3789
100 kΩ
Back
light
OUT 15
10 −IN2
10 kΩ
100 kΩ
11 FB2
150 kΩ
GND 16
12 DTC
SYNC
4
100 kΩ
CT
3
SCP
5
10 µF
39 Ω
1 µF
22 kΩ
33 pF
1500 pF
4.7 kΩ
Synchronous signal
4.7 µF
33 kΩ
25
MB3789
■ USAGE PRECAUTIONS
1. Do not input voltages greater than the maximum rating.
Inputting voltages greater than the maximum rating may damage the device.
2. Always use the device under recommended operating conditions.
If a voltage greater than the maximum value is input to the device, its electrical characteristics may not be
guaranteed. Similarly, inputting a voltage below the minimum value may cause device operation to become
unstable.
3. For grounding the printed circuit board, use as wide ground lines as possible to prevent
high-frequency noise.
Because the device uses high frequencies, it tends to generate high-frequency noise.
4. Take the following measures for protection against static charge:
•
•
•
•
For containing semiconductor devices, use an antistatic or conductive container.
When storing or transporting device-mounted circuit boards, use a conductive bag or container.
Ground the workbenches, tools, and measuring equipment to earth.
Make sure that operators wear wrist straps or other appropriate fittings grounded to earth via a resistance of
250 k to 1 MΩ placed in series between the human body and earth.
■ ORDERING INFORMATION
Part number
MB3789PFV
26
Package
16-pin Plastic SSOP
(FPT-16P-M05)
Remarks
MB3789
■ PACKAGE DIMENSION
16-pin Plastic SSOP
(FPT-16P-M05)
*: These dimensions do not include resin protrusion.
+0.20
* 5.00±0.10(.197±.004)
1.25 –0.10
+.008
.049 –.004
(Mounting height)
0.10(.004)
INDEX
*4.40±0.10
(.173±.004)
0.65±0.12
(.0256±.0047)
4.55(.179)REF
C
1994 FUJITSU LIMITED F16013S-2C-4
+0.10
0.22 –0.05
+.004
.009 –.002
6.40±0.20
(.252±.008)
5.40(.213)
NOM
"A"
+0.05
0.15 –0.02
+.002
.006 –.001
Details of "A" part
0.10±0.10(.004±.004)
(STAND OFF)
0
10°
0.50±0.20
(.020±.008)
Dimensions in mm (inches)
27
MB3789
FUJITSU LIMITED
For further information please contact:
Japan
FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
KAWASAKI PLANT, 4-1-1, Kamikodanaka
Nakahara-ku, Kawasaki-shi
Kanagawa 211-8588, Japan
Tel: 81(44) 754-3763
Fax: 81(44) 754-3329
All Rights Reserved.
The contents of this document are subject to change without
notice. Customers are advised to consult with FUJITSU sales
representatives before ordering.
http://www.fujitsu.co.jp/
North and South America
FUJITSU MICROELECTRONICS, INC.
Semiconductor Division
3545 North First Street
San Jose, CA 95134-1804, USA
Tel: (408) 922-9000
Fax: (408) 922-9179
Customer Response Center
Mon. - Fri.: 7 am - 5 pm (PST)
Tel: (800) 866-8608
Fax: (408) 922-9179
http://www.fujitsumicro.com/
Europe
FUJITSU MIKROELEKTRONIK GmbH
Am Siebenstein 6-10
D-63303 Dreieich-Buchschlag
Germany
Tel: (06103) 690-0
Fax: (06103) 690-122
http://www.fujitsu-ede.com/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE LTD
#05-08, 151 Lorong Chuan
New Tech Park
Singapore 556741
Tel: (65) 281-0770
Fax: (65) 281-0220
http://www.fmap.com.sg/
F9906
 FUJITSU LIMITED Printed in Japan
28
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications,
and are not intended to be incorporated in devices for actual use.
Also, FUJITSU is unable to assume responsibility for
infringement of any patent rights or other rights of third parties
arising from the use of this information or circuit diagrams.
FUJITSU semiconductor devices are intended for use in
standard applications (computers, office automation and other
office equipment, industrial, communications, and
measurement equipment, personal or household devices, etc.).
CAUTION:
Customers considering the use of our products in special
applications where failure or abnormal operation may directly
affect human lives or cause physical injury or property damage,
or where extremely high levels of reliability are demanded (such
as aerospace systems, atomic energy controls, sea floor
repeaters, vehicle operating controls, medical devices for life
support, etc.) are requested to consult with FUJITSU sales
representatives before such use. The company will not be
responsible for damages arising from such use without prior
approval.
Any semiconductor devices have an inherent chance of
failure. You must protect against injury, damage or loss from
such failures by incorporating safety design measures into your
facility and equipment such as redundancy, fire protection, and
prevention of over-current levels and other abnormal operating
conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Law of Japan, the prior
authorization by Japanese government will be required for
export of those products from Japan.
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