ON NCP3712ASNT1 Over voltage protected high side switch Datasheet

NCP3712ASNT1
Over Voltage Protected
High Side Switch
This switch is primarily intended to protect loads from transients by
isolating the load from the transient energy rather than absorbing it.
Features
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• Capable of Switching Loads of up to 200 mA without External
•
•
•
•
•
•
•
•
Rboost
Switch Shuts Off in Response to an Over Voltage Input Transient
Features Active Turn Off for Fast Input Transient Protection
Flexible Over Voltage Protection Threshold Set with External Zener
Automatic Recovery after Transient Decays Below Threshold
Withstands Input Transients up to 105 V Peak
Guaranteed Off State with Enbl Input
ESD Resistant in Accordance with the 2000 V Human Body Model
Extremely Low Saturation Voltage
MARKING
DIAGRAM
1
High Voltage Transient Isolation
Power Switching to Electronic Modules
DC Power Distribution in Line Operated Equipment
Buffering Sensitive Circuits from Poorly Regulated Power Supplies
Pre–conditioning of Voltage Regulator Input Voltage
BAGYW
BAG = Specific Device Code
Y
= Year
W = Work Week
Applications Include:
•
•
•
•
•
TSOP–6
(SOT23–6, SC59–6)
CASE 318G
6
INTERNAL CIRCUIT DIAGRAM/
PIN CONFIGURATION
Vin
Vout
Q2
(5)
(6)
R2
R4
Q1
Rboost
N.C.
(3)
(2)
Vin
Vout
R1
R3
Rboost
NCP3712ASNT1
+
VZ
(4)
Ropt
or
1 k (min)
P. S.
–
(1)
Enbl
ORDERING INFORMATION
L
O
A
D
Enbl
VZ
Device
NCP3712ASNT1
Package
Shipping
TSOP–6
3000 Units
(SOT23–6, SC59–6) on 7” Reel
SW
Figure 1. Typical Application Circuit
 Semiconductor Components Industries, LLC, 2001
September, 2001 – Rev. 2
1
Publication Order Number:
NCP3712ASNT1/D
NCP3712ASNT1
MAXIMUM RATINGS* (TJ = 25°C unless otherwise noted) (Note 1)
Symbol
Value
Unit
Vio
105
V
Reverse Input–to–Vz. Voltage
Vin(rev)
–9.0
V
Reverse Input–to–Rboost Voltage
Vin(rev)
–5.0
V
Output Load Current – Continuous
Iload
–300
mA
Enbl Input Current – Continuous
Ienbl
5.0
mA
Rating
Input–to–Output Voltage
Vz Input Current – Continuous
Iz
3.0
mA
Iboost
10
mA
Junction Temperature
TJ
125
°C
Operating Ambient Temperature Range
TA
–40 to +85
°C
Storage Temperature Range
Tstg
–65 to +150
°C
Device Power Dissipation (Minimum Footprint)
PD
300
mW
–
2.4
mW/°C
Rboost Input Current – Continuous
Derate Above 25°C
Latch–up Performance:
ILatch–up
Positive
Negative
mA
200
200
*Maximum Ratings are those values beyond which damage to the device may occur.
1. This device contains ESD protection and exceeds the following tests:
Human Body Model 1500 V per MIL–STD–883, Method 3015.
Machine Model Method 150 V.
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2
NCP3712ASNT1
ELECTRICAL CHARACTERISTICS (Vin = 12.5 VDC Ref to Gnd, TA = 25°C unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
V(BRio)
105
–
–
Vdc
V(–BRout)
–
–0.7
–
Vdc
–
–
–100
Venbl(off)
13
–
–
Vdc
Required “Off” State Iz Current (Rload = 100 )
Iz(off)
150
–
–
µAdc
Vin(off)
(Vz = 16 V, Iload = 100 mA, Renbl = 1500 )
Voff
15.5
–
18.7
–
0.2
0.5
–
–
–
–
–
–
–200
–200
–300
8.5
–
10.5
–
–
–1.0
Symbol
Min
Typ
Max
tPHL
tPLH
–
–
1.5
1.5
–
–
tf
tr
–
–
75
400
–
–
Input Leakage Resistor
R2
7.0
10
13
k
Input Resistor
R1
3.3
4.7
6.1
k
Output Leakage Resistor
R4
1.4
2.4
3.2
k
Enable Input Resistor
R3
1.4
2.4
3.2
k
OFF CHARACTERISTICS
Input–Output Breakdown Voltage (@ Iout = 200 µA)
Output Reverse Breakdown Voltage (@ Iout = –1.0 mA Pulse)
Output Leakage Current
(Vin = Venbl = 30 V, TA = 25°C)
Guaranteed “Off” State “ENBL NOT” Voltage
µAdc
Iload(off)
(IO ≤ 100 µA)
Vdc
ON CHARACTERISTICS
Input–Output On Voltage
(Io = 100 mA, Ienbl = –3.0 mA)
Vio(on)
Output Load Current  Continuous
(Ienbl = –3.0 mA, Vio(on) = 0.5 Vdc)
(Iboost = –9.0 mA, Vio(on) = 0.5 Vdc)
(Iboost = –9.0 mA, Vio(on) = 0.6 Vdc)
Io(on)
Vin(on)
(Vz = 16 V, Iload = 100 mA, Renbl = 1500 )
Von
“ENBL NOT” Input Current
(Io = 100 mA, Vio(on) = 0.35 Vdc, Renbl = 1500 )
Ienbl
Vdc
mAdc
Vdc
mAdc
SWITCHING CHARACTERISTICS
Characteristic
Units
µS
Propagation Delay Time:
Hi to Lo Prop Delay; Fig. 3 (Vin = Venbl = 13.5 V)
Lo to Hi Prop Delay; Fig. 3 (Vin = 13.5 V, Venbl = 0 V)
S
Transition Times:
Fall Time; Fig. 4 (Vin = Venbl = 13.5 V)
Rise Time; Fig. 4 (Vin = Venbl = 0 V)
INTERNAL RESISTORS
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3
NCP3712ASNT1
KEY
A+
FB*
1N4004
0.01 F
TYP
Vout
Enbl
0.027 F
TYP
1
Ienbl
N.C.
18 V
TYP R
opt
2
Rboost
Iboost
FB*
NCP3712
ASNT1
6
Vin
Iload
Renbl
5
VZ
4
3
0–500 Rload
1.0 k TYP
IZ
A–
*FB = MMZ2012 Y601B
Figure 2. Typical Applications Circuit for Load Dump Transient Protection
120
13.5 V SUPPLY RAIL
“ENABLE
NOT”
INPUT
10
50%
AMPLITUDE
LOAD
DEPENDENT
EXP DECAY
tpLH
TYPICAL
INPUT
TRANSIENT
100
DEVICE OUTPUT
VOLTAGE
AMPLITUDE (V)
AMPLITUDE (V)
15
5
80
60
13.5 V
SUPPLY
RAIL
40
Voff
20
0
LOAD
DEPENDENT
OUTPUT
EXP DECAY
Von
0
0
5
10
15
20
25
30
35
40
45
50
0
50
100
150
200
250
300
TIME (s)
TIME (s)
Figure 3. Enable NOT Switching Waveforms
Figure 4. Load Dump Waveforms
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350
NCP3712ASNT1
INFORMATION FOR USING THE TSOP–6 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.094
2.4
0.037
0.95
0.074
1.9
0.037
0.95
0.028
0.7
0.039
1.0
inches
mm
TSOP–6
(SOT23–6, SC59–6)
TSOP–6 POWER DISSIPATION
SOLDERING PRECAUTIONS
The power dissipation of the TSOP–6 is a function of the
drain pad size. This can vary from the minimum pad size
for soldering to a pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
determined by TJ(max), the maximum rated junction
temperature of the die, RθJA, the thermal resistance from
the device junction to ambient, and the operating
temperature, TA. Using the values provided on the data
sheet for the TSOP–6 package, PD can be calculated as
follows:
PD =
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied
during cooling.
TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature TA of 25°C,
one can calculate the power dissipation of the device which
in this case is 950 milliwatts.
PD =
150°C – 25°C
132°C/W
= 950 milliwatts
The 132°C/W for the TSOP–6 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 950
milliwatts. There are other alternatives to achieving higher
power dissipation from the TSOP–6 package. Another
alternative would be to use a ceramic substrate or an
aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
* * Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
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NCP3712ASNT1
PACKAGE DIMENSIONS
TSOP–6
CASE 318G–02
ISSUE H
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
L
6
S
1
5
4
2
3
B
D
G
M
J
C
0.05 (0.002)
H
K
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DIM
A
B
C
D
G
H
J
K
L
M
S
MILLIMETERS
MIN
MAX
2.90
3.10
1.30
1.70
0.90
1.10
0.25
0.50
0.85
1.05
0.013
0.100
0.10
0.26
0.20
0.60
1.25
1.55
0
10 2.50
3.00
INCHES
MIN
MAX
0.1142 0.1220
0.0512 0.0669
0.0354 0.0433
0.0098 0.0197
0.0335 0.0413
0.0005 0.0040
0.0040 0.0102
0.0079 0.0236
0.0493 0.0610
0
10 0.0985 0.1181
NCP3712ASNT1
Notes
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NCP3712ASNT1
Thermal Clad is a registered trademark of the Bergquist Company.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
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NCP3712ASNT1/D
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