PRELIMINARY Integrated Circuit Systems, Inc. ICS842023I FEMTOCLOCKS™ CRYSTAL-TO- HSTL CLOCK GENERATOR GENERAL DESCRIPTION FEATURES The ICS842023I is an Ethernet Clock Generator and a member of the HiPerClocks TM HiPerClockS™ family of high performance devices from ICS. For Ethernet applications, a 25MHz crystal is used to generate 250MHz. The ICS842023I uses ICS’ 3rd generation low phase noise VCO technology and can achieve <1ps r ms phase jitter, easily meeting Ether net jitter requirements. The ICS842023I is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space. • (1) Differential HSTL output ICS • Crystal oscillator interface, 18pF parallel resonant crystal (24.5MHz - 34MHz) • Output frequency range: 245MHz - 340MHz • VCO range: 490MHz - 680MHz • RMS phase jitter @ 250MHz, using a 25MHz crystal (1.875Hz - 20MHz): 0.33ps (typical) • 3.3V or 2.5V operating supply • -40°C to 85°C ambient operating temperature COMMON CONFIGURATION TABLE - 1 Gb ETHERNET Inputs Crystal Frequency (MHz) M N 25 20 2 Multiplication Value M/N 10 Output Frequency (MHz) 250 BLOCK DIAGRAM PIN ASSIGNMENT OE Pullup XTAL_IN OSC XTAL_OUT Phase Detector VCO 490MHz - 680MHz N = ÷2 (fixed) Q0 nQ0 VDDA GND XTAL_OUT XTAL_IN 1 2 3 4 8 7 6 5 VDD Q0 nQ0 OE ICS842023I 8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View M = ÷20 (fixed) The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. 842023AGI www.icst.com/products/hiperclocks.html REV. B JUNE 14, 2005 1 PRELIMINARY Integrated Circuit Systems, Inc. ICS842023I FEMTOCLOCKS™ CRYSTAL-TO- HSTL CLOCK GENERATOR TABLE 1. PIN DESCRIPTIONS Number Name 1 VDDA Power Analog supply pin. 2 GND XTAL_OUT, XTAL_IN Power 5 OE Input 6, 7 nQ0, Q0 Output Power supply ground. Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output. Output enable pin. When HIGH, Q0/nQ0 output is active. When LOW, the Q0/nQ0 output is in a high impedance state. LVCMOS/LVTTL interface levels. Differential clock outputs. HSTL interface levels. 8 VDD Power Core supply pin. 3, 4 Type Description Input Pullup NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol Parameter CIN Input Capacitance 4 pF RPULLUP Input Pullup Resistor 51 kΩ 842023AGI Test Conditions www.icst.com/products/hiperclocks.html 2 Minimum Typical Maximum Units REV. B JUNE 14, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS842023I FEMTOCLOCKS™ CRYSTAL-TO- HSTL CLOCK GENERATOR ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD 4.6V Inputs, VI -0.5V to VDD + 0.5V Outputs, IO Continuous Current Surge Current 50mA 100mA Package Thermal Impedance, θJA 101.7°C/W (0 mps) Storage Temperature, TSTG -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, TA = -40°C TO 85°C Symbol Parameter Minimum Typical Maximum Units VDD Core Supply Voltage Test Conditions 3.135 3.3 3.465 V VDDA Analog Supply Voltage 3.135 3. 3 3.465 V IDD Power Supply Current TBD mA IDDA Analog Supply Current TBD mA TABLE 3B. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 2.5V±5%, TA = -40°C TO 85°C Symbol Parameter Minimum Typical Maximum Units VDD Core Supply Voltage Test Conditions 2.375 2.5 2.625 V VDDA Analog Supply Voltage 2.375 2.5 2.625 V IDD Power Supply Current TBD mA IDDA Analog Supply Current TBD mA TABLE 3C. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = 3.3V±5% OR 2.5V±5%, TA = -40°C TO 85°C Symbol Parameter Test Conditions Minimum Maximum Units 3.3V 2 VDD + 0.3 V 2.5V 1. 7 VDD + 0.3 V 3.3V -0.3 0.8 V 2.5V -0.3 0.7 V 5 µA VIH Input High Voltage VIL Input Low Voltage IIH Input High Current OE VDD = VIN = 3.465V or 2.625V IIL Input Low Current OE VDD = 3.465V or 2.625V, VIN = 0V 842023AGI www.icst.com/products/hiperclocks.html 3 -150 Typical µA REV. B JUNE 14, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS842023I FEMTOCLOCKS™ CRYSTAL-TO- HSTL CLOCK GENERATOR TABLE 3D. HSTL DC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, TA = -40°C TO 85°C Symbol Parameter VOH Output High Voltage; NOTE 1 Test Conditions Minimum Typical Maximum Units 1 1.8 V VOL Output Low Voltage; NOTE 1 0 0.6 V VOX Output Crossover Voltage; NOTE 2 40 60 % 0.4 1.8 V Maximum Units VSWING Peak-to-Peak Output Voltage Swing NOTE 1: Outputs terminated with 50Ω to GND. NOTE 2: Defined with respect to output voltage swing at a given condition. TABLE 3E. HSTL DC CHARACTERISTICS, VDD = VDDA = 2.5V±5%, TA = -40°C TO 85°C Symbol Parameter Test Conditions Minimum Typical VOH Output High Voltage; NOTE 1 1 1.4 V VOL Output Low Voltage; NOTE 1 0 0. 4 V VOX Output Crossover Voltage; NOTE 2 40 60 % 0.6 1.4 V Maximum Units 34 MHz VSWING Peak-to-Peak Output Voltage Swing NOTE 1: Outputs terminated with 50Ω to GND. NOTE 2: Defined with respect to output voltage swing at a given condition. TABLE 4. CRYSTAL CHARACTERISTICS Parameter Test Conditions Minimum Mode of Oscillation Typical Fundamental Frequency 24.5 Equivalent Series Resistance (ESR) 50 Ω Shunt Capacitance 7 pF Drive Level 1 mW Maximum Units 340 MHz TABLE 5A. AC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, TA = -40°C TO 85°C Symbol Parameter fOUT Output Frequency RMS Phase Jitter ( Random); NOTE 1 Output Rise/Fall Time tjit(Ø) tR / tF Test Conditions Minimum Typical 245 250MHz @ Integration Range: 1.875MHz - 20MHz 20% to 80% odc Output Duty Cycle NOTE 1: Please refer to the Phase Noise Plots following this section. 0.33 ps 300 ps 50 % TABLE 5B. AC CHARACTERISTICS, VDD = VDDA = 2.5V±5%, TA = -40°C TO 85°C Symbol Parameter fOUT Output Frequency RMS Phase Jitter ( Random); NOTE 1 Output Rise/Fall Time tjit(Ø) tR / tF Test Conditions Typical 245 250MHz @ Integration Range: 1.875MHz - 20MHz 20% to 80% odc Output Duty Cycle NOTE 1: Please refer to the Phase Noise Plots following this section. 842023AGI Minimum www.icst.com/products/hiperclocks.html 4 Maximum Units 340 MHz 0.4 ps 325 ps 50 % REV. B JUNE 14, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS842023I FEMTOCLOCKS™ CRYSTAL-TO- HSTL CLOCK GENERATOR PARAMETER MEASUREMENT INFORMATION 2.5V ± 5% 3.3V ± 5% VDD, VDDA SCOPE Qx VDD, VDDA SCOPE Qx HSTL HSTL nQx nQx GND GND 0V 0V HSTL 3.3V OUTPUT LOAD AC TEST CIRCUIT HSTL 2.5V OUTPUT LOAD AC TEST CIRCUIT Phase Noise Plot Noise Power nQ0 Q0 t PW t Phase Noise Mask odc = f1 Offset Frequency PERIOD t PW x 100% t PERIOD f2 RMS Jitter = Area Under the Masked Phase Noise Plot RMS PHASE JITTER OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD 80% 80% VSW I N G Clock Outputs 20% 20% tR tF OUTPUT RISE/FALL TIME 842023AGI www.icst.com/products/hiperclocks.html 5 REV. B JUNE 14, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS842023I FEMTOCLOCKS™ CRYSTAL-TO- HSTL CLOCK GENERATOR APPLICATION INFORMATION POWER SUPPLY FILTERING TECHNIQUES As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS842023I provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. VDD and VDDA should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10Ω resistor along with a 10μF and a .01μF bypass capacitor should be connected to each VDDA pin. 3.3V or 2.5V VDD .01μF 10 Ω VDDA .01μF 10μF FIGURE 1. POWER SUPPLY FILTERING CRYSTAL INPUT INTERFACE The ICS842023I has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 2 below were determined using a 25MHz, 18pF parallel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts. XTAL_IN C1 22p X1 18pF Parallel Cry stal XTAL_OUT C2 22p ICS84332 ICS842023I Figure 2. CRYSTAL INPUt INTERFACE 842023AGI www.icst.com/products/hiperclocks.html 6 REV. B JUNE 14, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS842023I FEMTOCLOCKS™ CRYSTAL-TO- HSTL CLOCK GENERATOR RELIABILITY INFORMATION TABLE 6. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP θJA by Velocity (Meters per Second) Multi-Layer PCB, JEDEC Standard Test Boards 0 1 2.5 101.7°C/W 90.5°C/W 89.8°C/W TRANSISTOR COUNT The transistor count for ICS842023I is: 2538 842023AGI www.icst.com/products/hiperclocks.html 7 REV. B JUNE 14, 2005 PRELIMINARY Integrated Circuit Systems, Inc. PACKAGE OUTLINE - G SUFFIX FOR ICS842023I FEMTOCLOCKS™ CRYSTAL-TO- HSTL CLOCK GENERATOR 8 LEAD TSSOP TABLE 7. PACKAGE DIMENSIONS SYMBOL Millimeters Minimum N Maximum 8 A -- 1.20 A1 0.05 0.15 A2 0.80 1.05 b 0.19 0.30 c 0.09 0.20 D 2.90 E E1 3.10 6.40 BASIC 4.30 e 4.50 0.65 BASIC L 0.45 0.75 α 0° 8° aaa -- 0.10 Reference Document: JEDEC Publication 95, MO-153 842023AGI www.icst.com/products/hiperclocks.html 8 REV. B JUNE 14, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS842023I FEMTOCLOCKS™ CRYSTAL-TO- HSTL CLOCK GENERATOR TABLE 8. ORDERING INFORMATION Part/Order Number Marking Package Shipping Packaging Temperature ICS842023AGI 2023A 8 Lead TSSOP tube -40°C to 85°C ICS842023AGIT 2023A 8 Lead TSSOP 2500 tape & reel -40°C to 85°C The aforementioned trademarks, HiPerClockS™ and FemtoClocks™ are a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 842023AGI www.icst.com/products/hiperclocks.html 9 REV. B JUNE 14, 2005