IN A 20 INA200 INA201 INA202 0 SBOS374 − NOVEMBER 2006 High-Side Measurement Current-Shunt Monitor with Comparator and Reference FEATURES DESCRIPTION D D D D D D The INA200, INA201, and INA202 are high-side current-shunt monitors with voltage output. The INA200−INA202 can sense drops across shunts at common-mode voltages from −16V to 80V. The INA200−INA202 are available with three output voltage scales: 20V/V, 50V/V, and 100V/V, with up to 500kHz bandwidth. D D D COMPLETE CURRENT SENSE SOLUTION 0.6V INTERNAL VOLTAGE REFERENCE INTERNAL OPEN-DRAIN COMPARATOR LATCHING CAPABILITY ON COMPARATOR COMMON-MODE RANGE: −16V to +80V HIGH ACCURACY: 3.5% MAX ERROR OVER TEMPERATURE BANDWIDTH: 500kHz (INA200) QUIESCENT CURRENT: 1800µA (max) PACKAGES: SO-8, MSOP-8 The INA200, INA201, and INA202 also incorporate an open-drain comparator and internal reference providing a 0.6V threshold. External dividers are used to set the current trip point. The comparator includes a latching capability, which can be made transparent by grounding (or leaving open) the RESET pin. APPLICATIONS D D D D D D D The INA200, INA201, and INA202 operate from a single +2.7V to +18V supply, drawing a maximum of 1800µA of supply current. Package options include the very small MSOP-8 and the SO-8. All versions are specified over the extended operating temperature range of −40°C to +125°C. NOTEBOOK COMPUTERS CELL PHONES TELECOM EQUIPMENT AUTOMOTIVE POWER MANAGEMENT BATTERY CHARGERS WELDING EQUIPMENT 1 INA200 (G = 20) INA201 (G = 50) INA202 (G = 100) V+ 2 OUT G VIN+ 8 VIN− 7 CMPOUT 6 0.6V Reference 3 CMPIN Comparator 4 GND RESET 5 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright 2006, Texas Instruments Incorporated ! ! www.ti.com "## "#$ "#" www.ti.com SBOS374 − NOVEMBER 2006 ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage, V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18V Current-Shunt Monitor Analog Inputs, VIN+, VIN− Differential (VIN+) − (VIN−) . . . . . . . . . . . . . . . . . . −18V to +18V Common Mode(2) . . . . . . . . . . . . . . . . . . . . . . . . −16V to +80V Comparator Analog Input and Reset Pins(2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND − 0.3V to (V+) + 0.3V Analog Output, Out(2) . . . . . . . . . . . . . GND − 0.3V to (V+) + 0.3V Comparator Output, Out Pin(2) . . . . . . . . . . . . . GND − 0.3V to 18V Input Current Into Any Pin(2) . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Operating Temperature . . . . . . . . . . . . . . . . . . . . . −55°C to +150°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C ESD Ratings: Human Body Model (HBM) . . . . . . . . . . . . . . . . . . . . . . . 4000V Charged Device Model (CDM) . . . . . . . . . . . . . . . . . . . . 1000V (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. (2) This voltage may exceed the ratings shown if the current at that pin is limited to 5mA. ORDERING INFORMATION(1) PRODUCT INA200 GAIN 20V/V INA201 50V/V INA202 100V/V PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING MSOP-8 DGK BQH SO-8(2) D INA200A MSOP-8 DGK BQJ SO-8(2) D INA201A MSOP-8 DGK BQL SO-8(2) D INA202A (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Available Q1, 2007. PIN CONFIGURATIONS TOP VIEW INA200−INA202 V+ 1 8 VIN+ OUT 2 7 VIN− CMPIN 3 6 CMPOUT GND 4 5 RESET MSOP−8 (DGK) SO−8 (D) 2 www.ti.com "## "#$ "#" SBOS374 − NOVEMBER 2006 ELECTRICAL CHARACTERISTICS: CURRENT-SHUNT MONITOR Boldface limits apply over the specified temperature range: TA = −40°C to +125°C. At TA = +25°C, VS = +12V, VCM = +12V, VSENSE = 100mV, RL = 10kΩ to GND, RPULL-UP = 5.1kΩ connected from CMPOUT to VS, and CMPIN = GND, unless otherwise noted. INA200, INA201, INA202 CURRENT-SHUNT MONITOR PARAMETERS CONDITIONS MIN TYP MAX UNITS 0.15 (VS − 0.25)/Gain 80 V V dB dB mV mV mV µV/°C µV/V µA INPUT Full-Scale Sense Input Voltage Common-Mode Input Range Common-Mode Rejection Over Temperature Offset Voltage, RTI(1) +25°C to +125°C −40°C to +25°C vs Temperature vs Power Supply Input Bias Current, VIN− Pin VSENSE VCM CMR VSENSE = VIN+ − VIN− VIN+ = −16V to +80V VIN+ = +12V to +80V VOS dVOS/dT PSR IB OUTPUT (VSENSE ≥ 20mV) Gain: INA200 INA201 INA202 Gain Error Over Temperature Total Output Error(2) Over Temperature Nonlinearity Error(3) Output Impedance Maximum Capacitive Load TMIN to TMAX VOUT = 2V, VIN+ = +18V, 2.7V −16 80 100 100 123 ±0.5 5 2.5 ±9 ±2.5 ±3 ±3.5 100 ±16 G VSENSE = 20mV to 100mV VSENSE = 20mV to 100mV VSENSE = 120mV, VS = +16V VSENSE = 120mV, VS = +16V VSENSE = 20mV to 100mV RO No Sustained Oscillation 20 50 100 ±0.2 ±0.75 ±1 ±2 ±2.2 ±3.5 V/V V/V V/V % % % % % Ω nF 0.4 1 2 mV V V V mV (V+) − 0.25 (VGND) + 0.05 V V ±0.002 1.5 10 OUTPUT (VSENSE < 20mV)(4) INA200, INA201, INA202 INA200 INA201 INA202 INA200, INA201, INA202 −16V ≤ VCM < 0V 0V ≤ VCM ≤ VS, VS = 5V 0V ≤ VCM ≤ VS, VS = 5V 0V ≤ VCM ≤ VS, VS = 5V VS < VCM ≤ 80V 300 VOLTAGE OUTPUT(5) Output Swing to the Positive Rail Output Swing to GND(6) VIN− = 11V, VIN+ = 12V VIN− = 0V, VIN+ = −0.5V (V+) − 0.15 (VGND) + 0.004 CLOAD = 5pF CLOAD = 5pF CLOAD = 5pF CLOAD < 10nF 500 300 200 40 1 kHz kHz kHz Degrees V/µs 2 µs 40 nV/√Hz FREQUENCY RESPONSE Bandwidth: INA200 INA201 INA202 Phase Margin Slew Rate Settling Time (1%) NOISE, RTI Voltage Noise Density (1) (2) (3) (4) (5) (6) 300 BW SR VSENSE = 10mVPP to 100mVPP, CLOAD = 5pF Offset is extrapolated from measurements of the output at 20mV and 100mV VSENSE. Total output error includes effects of gain error and VOS. Linearity is best fit to a straight line. For details on this region of operation, see the Accuracy Variations as a Result of VSENSE and Common-Mode Voltage section in the Applications Information. See Typical Characteristic curve Output Swing vs Output Current. Specified by design. 3 "## "#$ "#" www.ti.com SBOS374 − NOVEMBER 2006 ELECTRICAL CHARACTERISTICS: COMPARATOR Boldface limits apply over the specified temperature range: TA = −40°C to +125°C. At TA = +25°C, VS = +12V, VCM = +12V, VSENSE = 100mV, RL = 10kΩ to GND, and RPULL-UP = 5.1kΩ connected from CMPOUT to VS, unless otherwise noted. INA200, INA201, INA202 COMPARATOR PARAMETERS CONDITIONS MIN TYP MAX UNITS TA = +25°C 590 586 600 610 614 mV mV mV 10 15 nA nA OFFSET VOLTAGE Threshold Over Temperature Hysteresis (1) TA = −40°C to +85°C INPUT BIAS CURRENT(2) CMPIN Pin vs Temperature 0.005 INPUT VOLTAGE RANGE CMPIN Pin OUTPUT (OPEN-DRAIN) Large-Signal Differential Voltage Gain High-Level Leakage Current(3)(4) Low-Level Output Voltage(3) RESPONSE TIME Response Time(5) −8 0V to VS − 1.5V ILKG VOL V CMP VOUT 1V to 4V, RL ≥ 15kΩ Connected to 5V VID = 0.4V, VOH = VS VID = −0.6V, IOL = 2.35mA 200 0.0001 220 RL to 5V, CL = 15pF, 100mV Input Step with 5mV Overdrive 1.3 µs 1.1 2 1.5 3 V MΩ µs µs RESET RESET Threshold(6) Logic Input Impedance Minimum RESET Pulse Width RESET Propagation Delay 1 300 V/mV µA mV (1) Hysteresis refers to the threshold (the threshold specification applies to a rising edge of a noninverting input) of a falling edge on the noninverting input of the comparator; refer to Figure 1. (2) Specified by design. (3) V refers to the differential voltage at the comparator inputs. ID (4) Open-drain output can be pulled to the range of +2.7V to +18V, regardless of VS. (5) The comparator response time specified is the interval between the input step function and the instant when the output crosses 1.4V. (6) The RESET input has an internal 2MΩ (typical) pull-down. Leaving RESET open results in a LOW state, with transparent comparator operation. VTHRESHOLD 0.592V 0.6V Input Voltage Hysteresis = VTHRESHOLD − 8mV Figure 1. Typical Comparator Hysteresis 4 www.ti.com "## "#$ "#" SBOS374 − NOVEMBER 2006 ELECTRICAL CHARACTERISTICS: GENERAL Boldface limits apply over the specified temperature range: TA = −40°C to +125°C. At TA = +25°C, VS = +12V, VCM = +12V, VSENSE = 100mV, RL = 10kΩ to GND, RPULL-UP = 5.1kΩ connected from CMPOUT to VS, and CMPIN = 1V, unless otherwise noted. INA200, INA201, INA202 GENERAL PARAMETERS CONDITIONS MIN TYP MAX UNITS 1350 +18 1800 1850 V µA µA V +125 +150 +150 °C °C °C POWER SUPPLY Operating Power Supply Quiescent Current Over Temperature Comparator Power-On Reset Threshold(1) TEMPERATURE Specified Temperature Range Operating Temperature Range Storage Temperature Range Thermal Resistance MSOP-8 Surface-Mount SO-8 VS IQ +2.7 VOUT = 2V VSENSE = 0mV 1.5 −40 −55 −65 qJA 200 150 °C/W °C/W (1) The INA200, INA201, and INA202 are designed to power-up with the comparator in a defined reset state as long as RESET is open or grounded. The comparator is in reset as long as the power supply is below the voltage shown here. The comparator assumes a state based on the comparator input above this supply voltage. If RESET is high at power-up, the comparator output comes up high and requires a reset to assume a low state, if appropriate. 5 "## "#$ "#" www.ti.com SBOS374 − NOVEMBER 2006 TYPICAL CHARACTERISTICS At TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted. GAIN vs FREQUENCY GAIN vs FREQUENCY 45 45 CLOAD = 1000pF G = 100 G = 50 30 G = 50 35 Gain (dB) Gain (dB) 35 G = 100 40 40 G = 20 25 20 30 G = 20 25 20 15 15 10 10 5 5 10k 100k 10k 1M 100k COMMON−MODE AND POWER−SUPPLY REJECTION vs FREQUENCY GAIN PLOT 20 140 18 130 Common−Mode and Power−Supply Rejection (dB) 100V/V 16 VOUT (V) 14 50V/V 12 10 8 20V/V 6 4 2 120 CMR 110 100 90 PSR 80 70 60 50 40 0 20 100 200 300 400 500 600 700 800 900 10 100 1k VDIFFERENTIAL (mV) 100k OUTPUT ERROR vs COMMON−MODE VOLTAGE 4.0 0.1 3.5 0.09 0.08 3.0 Output Error (% ) Output Error (% error of the ideal output value) 10k Frequency (Hz) OUTPUT ERROR vs VSENSE 2.5 2.0 1.5 1.0 0.07 0.06 0.05 0.04 0.03 0.02 0.5 0.01 0 0 0 50 100 150 200 250 300 VSENSE (mV) 6 1M Frequency (Hz) Frequency (Hz) 350 400 450 500 −16 −12 −8 −4 0 4 8 12 16 20 Common−Mode Voltage (V) ... 76 80 www.ti.com "## "#$ "#" SBOS374 − NOVEMBER 2006 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted. POSITIVE OUTPUT VOLTAGE SWING vs OUTPUT CURRENT QUIESCENT CURRENT vs OUTPUT VOLTAGE 3.5 12 VS = 12V 10 9 3.0 Sourcing Current 2.5 +25_C 8 −40_C +125_ C 7 6 I Q (mA) Output Voltage (V) 11 VS = 3V 5 Sourcing Current +25_C 4 −40_C Output stage is designed to source current. Current sinking capability is approximately 400µA. 3 2 1 0 +125_ C 0 2.0 1.5 1.0 0.5 0 5 10 20 15 25 30 0 1 2 Output Current (mA) 6 7 34 Output Short−Circuit Current (mA) 1.75 VS = 2.7V VS = 12V 1.50 1.25 VS = 12V 1.00 VS = 2.7V VSENSE = 0mV 0.75 8 9 10 −40_C 30 +25_ C 26 +125_ C 22 18 14 10 6 0 4 8 12 16 20 24 28 32 36 2.5 3.5 VCM (V) 4.5 5.5 6.5 7.5 8.5 9.5 10.5 11.5 17 18 Supply Voltage (V) STEP RESPONSE STEP RESPONSE G = 20 Output Voltage (500mV/div) G = 20 Output Voltage (50mV/div) IQ (mA) 5 OUTPUT SHORT−CIRCUIT CURRENT vs SUPPLY VOLTAGE VSENSE = 100mV 0.50 −16 −12 −8 −4 4 Output Voltage (V) QUIESCENT CURRENT vs COMMON−MODE VOLTAGE 2.00 3 VSENSE = 10mV to 20mV Time (2µs/div) VSENSE = 10mV to 100mV Time (2µs/div) 7 "## "#$ "#" www.ti.com SBOS374 − NOVEMBER 2006 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted. STEP RESPONSE STEP RESPONSE G = 50 Output Voltage (50mV/div) Output Voltage (100mV/div) G = 20 VSENSE = 10mV to 20mV VSENSE = 90mV to 100mV Time (2µs/div) Time (5µs/div) STEP RESPONSE STEP RESPONSE G = 50 Output Voltage (1V/div) Output Voltage (100mV/div) G = 50 VSENSE = 10mV to 100mV VSENSE = 90mV to 100mV Time (5µs/div) Time (5µs/div) COMPARATOR VOL vs ISINK STEP RESPONSE 600 G = 100 Output Voltage (2V/div) 500 VOL (mV) 400 300 200 100 VSENSE = 10mV to 100mV Time (10µs/div) 0 0 1 2 3 ISINK (mA) 8 4 5 6 www.ti.com "## "#$ "#" SBOS374 − NOVEMBER 2006 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted. COMPARATOR TRIP POINT vs TEMPERATURE COMPARATOR TRIP POINT vs SUPPLY VOLTAGE 602 600 Comparator Trip Point (mV) 599 Reset Voltage (mV) 598 597 596 595 594 593 592 601 600 599 598 597 591 596 590 4 6 8 10 12 14 16 −50 18 −25 0 25 50 75 Supply Voltage (V) Temperature (_C) COMPARATOR PROPAGATION DELAY vs OVERDRIVE VOLTAGE COMPARATOR RESET VOLTAGE vs SUPPLY VOLTAGE 200 1.2 175 1.0 Reset Voltage (V) Propagation Delay (ns) 2 150 125 100 100 125 0.8 0.6 0.4 0.2 75 0 50 0 20 40 60 80 100 120 140 160 180 2 200 4 6 8 10 12 14 Overdrive Voltage (mV) Supply Voltage (V) COMPARATOR PROPAGATION DELAY vs TEMPERATURE COMPARATOR PROPAGATION DELAY 16 18 300 Propagation Delay (ns) 275 Input 200mV/div 250 225 200 Output 2V/div 175 150 VOD = 5mV 125 −50 −25 0 25 50 75 100 125 2µs/div Temperature (_C) 9 "## "#$ "#" www.ti.com SBOS374 − NOVEMBER 2006 the supply voltage, VS. VCM is expressed as (VIN+ + VIN−)/2; however, in practice, VCM is seen as the voltage at VIN+ because the voltage drop across VSENSE is usually small. APPLICATIONS INFORMATION BASIC CONNECTIONS Figure 2 shows the basic connections of the INA200, INA201, and INA202. The input pins, VIN+ and VIN−, should be connected as closely as possible to the shunt resistor to minimize any resistance in series with the shunt resistance. Power-supply bypass capacitors are required for stability. Applications with noisy or high-impedance power supplies may require additional decoupling capacitors to reject power-supply noise. Connect bypass capacitors close to the device pins. POWER SUPPLY The input circuitry of the INA200, INA201, and INA202 can accurately measure beyond the power-supply voltage, V+. For example, the V+ power supply can be 5V, whereas the load power-supply voltage is up to +80V. The output voltage range of the OUT terminal, however, is limited by the voltages on the power-supply pin. This section addresses the accuracy of these specific operating regions: Normal Case 1: VSENSE ≥ 20mV, VCM ≥ VS Normal Case 2: VSENSE ≥ 20mV, VCM < VS Low VSENSE Case 1: VSENSE < 20mV, −16V ≤ VCM < 0 Low VSENSE Case 2: VSENSE < 20mV, 0V ≤ VCM ≤ VS Low VSENSE Case 3: VSENSE < 20mV, VS < VCM ≤ 80V Normal Case 1: VSENSE ≥ 20mV, VCM ≥ VS This region of operation provides the highest accuracy. Here, the input offset voltage is characterized and measured using a two-step method. First, the gain is determined by Equation 1. G+ V OUT1 * V OUT2 100mV * 20mV (1) where: VOUT1 = Output Voltage with VSENSE = 100mV VOUT2 = Output Voltage with VSENSE = 20mV Then the offset voltage is measured at VSENSE = 100mV and referred to the input (RTI) of the current shunt monitor, as shown in Equation 2. ACCURACY VARIATIONS AS A RESULT OF VSENSE AND COMMON-MODE VOLTAGE The accuracy of the INA200, INA201, and INA202 current shunt monitors is a function of two main variables: VSENSE (VIN+ − VIN−) and common-mode voltage, VCM, relative to VOSRTI (Referred−To−Input) + ǒV G Ǔ * 100mV OUT1 RSHUNT 3mΩ Load Supply −18V to +80V Load 5V Supply INA200 (G = 20) 1 V+ 2 OUT CBYPASS 0.01µF G VIN+ 8 VIN− 7 CMPOUT 6 RESET 5 RPULL−UP 4.7kΩ 0.6V Reference R1 3 CMPIN Comparator R2 4 GND Transparent/Reset Latch Figure 2. INA200 Basic Connections 10 (2) www.ti.com "## "#$ "#" SBOS374 − NOVEMBER 2006 Normal Case 2: VSENSE ≥ 20mV, VCM < VS This region of operation has slightly less accuracy than Normal Case 1 as a result of the common-mode operating area in which the part functions, as seen in the Output Error vs Common-Mode Voltage curve. As noted, for this graph VS = 12V; for VCM < 12V, the Output Error increases as VCM becomes less than 12V, with a typical maximum error of 0.005% at the most negative VCM = −16V. Low VSENSE Case 1: VSENSE < 20mV, −16V ≤ VCM < 0; and Low VSENSE Case 3: VSENSE < 20mV, VS < VCM ≤ 80V Although the INA200 family of devices are not designed for accurate operation in either of these regions, some applications are exposed to these conditions. For example, when monitoring power supplies that are switched on and off while VS is still applied to the INA200, INA201, or INA202, it is important to know what the behavior of the devices will be in these regions. As VSENSE approaches 0mV, in these VCM regions, the device output accuracy degrades. A larger-than-normal offset can appear at the current shunt monitor output with a typical maximum value of VOUT = 300mV for VSENSE = 0mV. As VSENSE approaches 20mV, VOUT returns to the expected output value with accuracy as specified in the Electrical Characteristics. Figure 3 illustrates this effect using the INA202 (Gain = 100). 2.4 INA202 VOUT Tested Limit(1) 2.2 VCM1 2.0 Ideal 1.8 VCM2 1.6 1.4 VCM3 1.2 1.0 VOUT tested limit at 0.8 VCM4 VSENSE = 0mV, 0 ≤ VCM1 ≤ VS. 0.6 VCM2, VCM3, and VCM4 illustrate the variance 0.4 from part to part of the VCM that can cause 0.2 maximum VOUT with VSENSE < 20mV. 0 0 2 4 6 8 10 12 14 16 18 20 22 24 VSENSE (mV) NOTE: (1) INA200 VOUT Tested Limit = 0.4V. INA201 VOUT Tested Limit = 1V. Figure 4. Example for Low VSENSE Case 2 (INA202, Gain = 100) SELECTING RS 2.0 The value chosen for the shunt resistor, RS, depends on the application and is a compromise between small-signal accuracy and maximum permissible voltage loss in the measurement line. High values of RS provide better accuracy at lower currents by minimizing the effects of offset, while low values of RS minimize voltage loss in the supply line. For most applications, best performance is attained with an RS value that provides a full-scale shunt voltage range of 50mV to 100mV. Maximum input voltage for accurate measurements is 500mV. 1.8 1.6 1.4 VOUT (V) parallel. One op amp front end operates in the positive input common-mode voltage range, and the other in the negative input region. For this case, neither of these two internal amplifiers dominates and overall loop gain is very low. Within this region, VOUT approaches voltages close to linear operation levels for Normal Case 2. This deviation from linear operation becomes greatest the closer VSENSE approaches 0V. Within this region, as VSENSE approaches 20mV, device operation is closer to that described by Normal Case 2. Figure 4 illustrates this behavior for the INA202. The VOUT maximum peak for this case is tested by maintaining a constant VS, setting VSENSE = 0mV and sweeping VCM from 0V to VS. The exact VCM at which VOUT peaks during this test varies from part to part, but the VOUT maximum peak is tested to be less than the specified VOUT tested limit. VOUT (V) In the Typical Characteristics, the Output Error vs Common-Mode Voltage curve shows the highest accuracy for the this region of operation. In this plot, VS = 12V; for VCM ≥ 12V, the output error is at its minimum. This case is also used to create the VSENSE ≥ 20mV output specifications in the Electrical Characteristics table. 1.2 Actual 1.0 0.8 Ideal 0.6 0.4 0.2 0 0 2 4 6 8 10 12 14 16 18 20 VSENSE (mV) Figure 3. Example for Low VSENSE Cases 1 and 3 (INA202, Gain = 100) Low VSENSE Case 2: VSENSE < 20mV, 0V ≤ VCM ≤ VS This region of operation is the least accurate for the INA200 family. To achieve the wide input common-mode voltage range, these devices use two op amp front ends in TRANSIENT PROTECTION The −16V to +80V common-mode range of the INA200, INA201, and INA202 is ideal for withstanding automotive fault conditions ranging from 12V battery reversal up to +80V transients, since no additional protective components are needed up to those levels. In the event that the INA200, INA201, and INA202 are exposed to transients on the inputs in excess of their ratings, then external transient absorption with semiconductor transient absorbers (such as zeners) will be necessary. Use of 11 "## "#$ "#" www.ti.com SBOS374 − NOVEMBER 2006 MOVs or VDRs is not recommended except when they are used in addition to a semiconductor transient absorber. Select the transient absorber such that it will never allow the INA200, INA201, and INA202 to be exposed to transients greater than +80V (that is, allow for transient absorber tolerance, as well as additional voltage due to transient absorber dynamic impedance). Despite the use of internal zener-type ESD protection, the INA200, INA201, and INA202 do not lend themselves to using external resistors in series with the inputs since the internal gain resistors can vary up to ±30%. (If gain accuracy is not important, then resistors can be added in series with the INA200, INA201, and INA202 inputs with two equal resistors on each input.) INA201, and INA202, which is complicated by the internal 5kΩ + 30% input impedance; this is shown in Figure 5. Using the lowest possible resistor values minimizes both the initial shift in gain and effects of tolerance. The effect on initial gain is given by Equation 3: ǒ Gain Error % + 100 * 100 Ǔ 5kW 5kW ) R FILT (3) OUTPUT VOLTAGE RANGE Total effect on gain error can be calculated by replacing the 5kΩ term with 5kΩ − 30%, (or 3.5kΩ) or 5kΩ + 30% (or 6.5kΩ). The tolerance extremes of RFILT can also be inserted into the equation. If a pair of 100. 1% resistors are used on the inputs, the initial gain error will be 1.96%. Worst-case tolerance conditions will always occur at the lower excursion of the internal 5kΩ resistor (3.5kΩ), and the higher excursion of RFILT − 3% in this case. The output of the INA200, INA201, and INA202 is accurate within the output voltage swing range set by the power supply pin, V+. This performance is best illustrated when using the INA202 (a gain of 100 version), where a 100mV full-scale input from the shunt resistor requires an output voltage swing of +10V, and a power-supply voltage sufficient to achieve +10V on the output. Note that the specified accuracy of the INA200, INA201, and INA202 must then be combined in addition to these tolerances. While this discussion treated accuracy worst-case conditions by combining the extremes of the resistor values, it is appropriate to use geometric mean or root sum square calculations to total the effects of accuracy variations. INPUT FILTERING COMPARATOR An obvious and straightforward location for filtering is at the output of the INA200, INA201, and INA202 series; however, this location negates the advantage of the low output impedance of the internal buffer. The only other option for filtering is at the input pins of the INA200, The INA200, INA201, and INA202 devices incorporate an open-drain comparator. This comparator typically has 2mV of offset and a 1.3µs (typical) response time. The output of the comparator latches and is reset through the RESET pin, see Figure 6. RSHUNT << RFILTER 3mΩ VSUPPLY Load RFILTER < 100Ω INA200− INA202 RFILTER <100Ω CFILTER VIN+ V+ 1 OUT 2 CMPIN 3 8 VIN− G 0.6V Reference 7 f−3dB 6 CMPOUT f−3dB = GND 4 Comparator 5 1 2π(2RFILTER)CFILTER RESET SO−14, TSSOP−14 Figure 5. Input Filter (Gain Error — 1.5% to −2.2%) 12 www.ti.com "## "#$ "#" SBOS374 − NOVEMBER 2006 0.6V VIN 0V CMPOUT RESET Figure 6. Comparator Latching Capability Shunt Option 1 Shunt Option 2 Supply R3 To VIN+ To VIN− To VIN− To VIN+ 4.5V to 5.5V R4 Q1 2N3904 Load 1 V+ INA200 (G = 20) INA201 (G = 50) INA202 (G = 100) To VIN+ VIN+ 8 VIN− 7 CMPOUT 6 RESET 5 2 OUT G From Shunt Option 1, 2, or 3 Shunt Option 3 To VIN− 0.6V Reference R1 3 CMPIN Comparator R2 4 GND RESET NOTE: Q1 cascodes the comparator output to drive a high−side FET (the 2N3904 shown is good up to 60V). The shunt could be located in any one of the three locations shown. The latching capability should be used in shutdown applications to prevent oscillation at the trip point. Figure 7. High-Side Switch Over-Current Shutdown 13 "## "#$ "#" www.ti.com SBOS374 − NOVEMBER 2006 Shunt Option 1 Supply To VIN+ 4.5V to 5.5V To VIN− Load To VIN+ INA200 (G = 20) INA201 (G = 50) INA202 (G = 100) 1 V+ 2 OUT G R4 2.2kΩ VIN+ 8 VIN− 7 From Shunt Option 1, 2, or 3 To VIN+ Shunt Option 3 3 CMPIN CMPOUT 6 RESET 5 Comparator R2 4 GND Q1 2N3904 RESET NOTE: In this case, Q1 is used to invert the comparator output. Figure 8. Low-Side Switch Over-Current Shutdown 14 To VIN− R1 22kΩ 0.6V Reference R1 Shunt Option 2 To VIN− www.ti.com "## "#$ "#" SBOS374 − NOVEMBER 2006 RSHUNT Supply 4.5V to 5.5V 1 V+ INA200 (G = 20) INA201 (G = 50) INA202 (G = 100) 2 OUT G VIN+ 8 VIN− 7 CMPOUT 6 RESET 5 R5 2.2kΩ 0.6V Reference R1 3 CMPIN Comparator R2 4 RESET GND 1 V+ INA200 (G = 20) INA201 (G = 50) INA202 (G = 100) 2 OUT G R6 2.2kΩ VIN+ 8 VIN− 7 CMPOUT 6 RESET 5 0.6V Reference R3 3 CMPIN Comparator R4 4 GND CMPOUT RESET R7 200kΩ NOTE: It is possible to set different limits for each direction. Figure 9. Bidirectional Over-Current Comparator 15 PACKAGE OPTION ADDENDUM www.ti.com 11-Dec-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty INA200AIDGKR ACTIVE MSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA200AIDGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA200AIDGKT ACTIVE MSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA200AIDGKTG4 ACTIVE MSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA201AIDGKR ACTIVE MSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA201AIDGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA201AIDGKT ACTIVE MSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA201AIDGKTG4 ACTIVE MSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA202AIDGKR ACTIVE MSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA202AIDGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA202AIDGKT ACTIVE MSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA202AIDGKTG4 ACTIVE MSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 11-Dec-2006 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. 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