165 MHz, High Performance HDMI Transmitter ADV7511W FEATURES APPLICATIONS Automotive infotainment Gaming consoles PCs DVD players and recorders Digital set-top boxes A/V receivers FUNCTIONAL BLOCK DIAGRAM CEC CONTROLLER/ BUFFER ADV7511W HDCP KEYS SPDIF I2S[3:0] MCLK CEC CEC_CLK AUDIO DATA CAPTURE LRCLK HDCP ENCRYPTION 4:2:2 SCLK D[23:0] VSYNC HSYNC DE CLK VIDEO DATA CAPTURE SCL TX0+/TX0– TX1+/TX1– TMDS OUTPUTS TX2+/TX2– HPD INT SDA 4:4:4 AND COLOR SPACE CONVERTER REGISTERS AND CONFIGURATION LOGIC TXC+/TXC– I2C SLAVE HDCP AND EDID MICROCONTROLLER I2C MASTER DDCSDA DDCSCL 09732-001 General Incorporates HDMI v.1.4a features 3D video support Extended colorimetry 165 MHz supports all video formats up to 1080p and UXGA Supports gamut metadata packet transmission Integrated CEC buffer/controller Compatible with DVI v.1.0 and HDCP v.1.3 Video/audio inputs accept logic levels from 1.8 V to 3.3 V Digital video 3D video ready Programmable 2-way color space converter Supports RGB, YCbCr, and DDR Supports ITU656-based embedded syncs Automatic input video format timing detection (CEA-861-E) Digital audio Supports standard SPDIF for stereo LPCM or compressed audio up to 192 kHz High bit-rate audio (HBR) 8-channel uncompressed LPCM I2S audio up to 192 kHz Special features for easy system design On-chip MPU with I2C master to perform HDCP operations and EDID reading operations 5 V tolerant I2C and HPD I/Os, no extra device needed No audio master clock needed for supporting SPDIF and I2S On-chip MPU reports HDMI events through interrupts and registers Qualified for automotive applications Figure 1. GENERAL DESCRIPTION The ADV7511W is a 165 MHz High-Definition Multimedia Interface (HDMI®) transmitter, which is ideal for automotive entertainment products including DVD players/recorders, digital set-top boxes, A/V receivers, gaming consoles, and PCs. The digital video interface contains an HDMI v.1.4a/DVI v.1.0compatible transmitter and supports all HDTV formats. The ADV7511W supports HDMI v1.4a-specific features (3D video and extended colorimetry) in addition to x.v.Color™, high bit rate audio, and programmable AVI InfoFrames. Internal HDCP keys allow the secure transmission of protected content as specified by the HDCP v.1.3 protocol. The ADV7511W supports both SPDIF and 8-channel I2S audio. Its high fidelity 8-channel I2S can transmit either stereo or 7.1 surround audio up to 768 kHz. The SPDIF can carry compressed audio including Dolby® Digital, DTS®, and THX®. Fabricated in an advanced CMOS process, the ADV7511W is provided in a 64-lead LQFP surface-mount plastic package with exposed paddle and is specified over the −40°C to +105°C temperature range. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2011 Analog Devices, Inc. All rights reserved. ADV7511W TABLE OF CONTENTS Features .............................................................................................. 1 Explanation of Test Levels............................................................5 Applications....................................................................................... 1 ESD Caution...................................................................................5 Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions..............................6 General Description ......................................................................... 1 Applications Information .................................................................8 Revision History ............................................................................... 2 Design Resources ..........................................................................8 Specifications..................................................................................... 3 Outline Dimensions ..........................................................................9 Electrical Specifications............................................................... 3 Ordering Guide .............................................................................9 Absolute Maximum Ratings............................................................ 5 Automotive Products ....................................................................9 REVISION HISTORY 5/11—Revision 0: Initial Version Rev. 0 | Page 2 of 12 ADV7511W SPECIFICATIONS ELECTRICAL SPECIFICATIONS Table 1. Parameter DIGITAL INPUTS Data Inputs—Video and Audio, CEC_CLK Input Voltage, High (VIH) Input Voltage, Low (VIL) Input Capacitance I2C Lines (DDCSDA, DDCSCL, SDA, SCL) Input Voltage, High (VIH) Input Voltage, Low (VIL) CEC Input Voltage, High (VIH) Input Voltage, Low (VIL) Output Voltage, High (VOH) Output Voltage, Low (VOL) HPD Input Voltage, High (VIH) Input Voltage, Low (VIL) THERMAL CHARACTERISTICS Thermal Resistance θJC Junction-to-Case θJA Junction-to-Ambient Ambient Temperature DC SPECIFICATIONS Input Leakage Current (IIL) POWER SUPPLY 1.8 V Supply Voltage (DVDD, AVDD, PVDD, BGVDD) 3.3 V Supply Voltage (DVDD_3V) Power-Down Current Transmitter Total Power (1.8 V Power = 200 mW and 3.3 V Power = 1 mW) AC SPECIFICATIONS TMDS Output Clock Frequency TMDS Output Clock Duty Cycle Input Video Clock Frequency Input Video Data Setup Time (tVSU) 2 Input Video Data Hold Time (tVHLD)2 TMDS Differential Swing Differential Output Timing Low-to-High Transition Time High-to-Low Transition Time VSYNC and HSYNC Delay From DE Falling Edge To DE Rising Edge Test Conditions/ Comments 1080p, 24 bit, typical random pattern Rev. 0 | Page 3 of 12 Temp Test Level 1 Full Full 25°C VI VI VIII 1.35 −0.3 Full Full VI VI Full Full Full Full Typ Max Unit 1.0 3.5 +0.7 1.5 V V pF 1.19 −0.3 5.5 +0.8 V V VI VI VI VI 2.0 −0.3 2.5 −0.3 5.5 +0.8 3.63 +0.6 V V V V Full Full VI VI 1.3 −0.3 5.5 +0.8 V V Full Full Full V V V −40 +105 °C/W °C/W °C 25°C VI −1 +1 μA Full IV 1.71 1.8 1.90 V 3.15 3.3 3.45 100 V μA mW 165 52 165 MHz % MHz ns ns mV Full 25°C Full Min VI 20 43 +25 201 25°C 25°C Full Full Full 25°C IV IV 20 48 IV IV VII 1.8 1.3 900 1100 25°C 25°C VII VII 75 75 95 95 ps ps 25°C 25°C IV IV 1 1 UI 3 UI3 1200 ADV7511W Parameter AUDIO AC TIMING SCLK Duty Cycle When N/2 Is an Even Number When N/2 Is an Odd Number 2 I S[3:0], SPDIF Setup Time (tASU) I2S[3:0], SPDIF Hold Time (tAHLD) LRCLK Setup Time (tASU) LRCLK Hold Time (tAHLD) CEC CEC_CLK Frequency CEC_CLK Accuracy I2C INTERFACE SCL Clock Frequency SDA Setup Time (tDSU) SDA Hold Time (tDHO) Setup for Start (tSTASU) Hold Time for Start (tSTAH) Setup for Stop (tSTOSU) Test Conditions/ Comments Temp Test Level 1 Min Typ Max Unit Full Full Full Full Full Full IV IV IV IV IV IV 40 49 2 2 2 2 50 50 60 51 % % ns ns ns ns Full Full VIII VIII 3 −2 12 4 100 +2 MHz % 400 kHz ns ns μs μs μs Full Full Full Full Full Full 1 See the Explanation of Test Levels section. This is measured at 0.9 V. The relationship between clock and data is programmable in 400 ps steps. 3 UI is the unit interval. 4 12 MHz crystal oscillator for default register settings. 2 Rev. 0 | Page 4 of 12 100 100 0.6 0.6 0.6 ADV7511W ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS Table 2. Parameter Digital Inputs (SDA, SCL, DDCSDA, DDCSCL, HPD, PD, CEC) Audio/Video Digital Inputs (MCLK, SPDIF, I2S[3:0], SCLK, HSYNC, DE, VSYNC, CEC_CLK) Digital Output Current Operating Temperature Range Storage Temperature Range Maximum Junction Temperature Maximum Case Temperature Rating −0.3 V to +5.5 V I. 100% production tested. II. 100% production tested at 25°C and sample tested at specified temperatures. III. Sample tested only. IV. Parameter is guaranteed by design and characterization testing. V. Parameter is a typical value only. VI. 100% production tested at 25°C; guaranteed by design and characterization testing. VII. Limits defined by HDMI specification; guaranteed by design and characterization testing. VIII. Parameter is guaranteed by design. −0.3 V to +3.63 V 20 mA −40°C to +105°C −65°C to +150°C 150°C 150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION Rev. 0 | Page 5 of 12 ADV7511W D11 D10 DVDD D9 CLK D8 D7 D6 D5 D4 D3 D2 D1 D0 HSYNC DE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 D12 47 D13 SPDIF 3 46 D14 MCLK 4 45 D15 I2S0 5 44 D16 I2S1 6 43 D17 I2S2 7 42 D18 41 D19 40 D20 LRCLK 10 39 D21 DVDD 11 38 D22 PVDD 12 37 D23 BGVDD 13 36 SDA R_EXT 14 35 SCL AVDD 15 34 DDCSDA HPD 16 33 DDCSCL DVDD 1 VSYNC PIN 1 2 ADV7511W I2S3 8 TOP VIEW (Not to Scale) SCLK 9 NOTES 1. THE LQFP HAS AN EXPOSED PAD THAT SHOULD BE CONNECTED TO GROUND. 09732-002 CEC_CLK DVDD CEC DVDD_3V INT TX2+ TX2– AVDD TX1+ TX1– PD TX0+ TX0– AVDD TXC– TXC+ 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Figure 2. Pin Configuration Table 3. Pin Function Descriptions Pin No. 1, 11, 31, 51 2 3 4 5 6 7 8 9 10 12 13 14 15, 19, 25 16 17, 18 20, 21 22 23, 24 26, 27 28 29 Mnemonic DVDD VSYNC SPDIF MCLK I2S0 I2S1 I2S2 I2S3 SCLK LRCLK PVDD BGVDD R_EXT AVDD HPD TXC−, TXC+ TX0−, TX0+ PD TX1−, TX1+ TX2−, TX2+ INT DVDD_3V Type Power Input Input Input Input Input Input Input Input Input Power Power Input Power Input Differential output Differential output Input Differential output Differential output Output Power Description 1.8 V Power Supply. These pins should be filtered and as quiet as possible. Vertical Sync Input. SPDIF (Sony/Philips Digital Interface) Audio Input. Audio Reference Clock Input. I2S Channel 0 Audio Data Input. I2S Channel 1 Audio Data Input. I2S Channel 2 Audio Data Input. I2S Channel 3 Audio Data Input. I2S Audio Clock Input. Left/Right Channel Signal Input. 1.8 V PLL Power Supply. Band Gap Power Supply. This pin sets the internal reference currents. 1.8 V Power Supply for TMDS Outputs. Hot Plug™ Detect Signal Input. Differential TMDS Clock Output. Differential TMDS Output Channel 0. Power-Down Control and I2C Address Selection. Differential TMDS Output Channel 1. Differential TMDS Output Channel 2. Interrupt Signal Output. 3.3 V Power Supply. Rev. 0 | Page 6 of 12 ADV7511W Pin No. 30 32 33 34 35 36 37 to 50, 52, 54 to 62 53 63 64 Mnemonic CEC CEC_CLK DDCSCL DDCSDA SCL SDA D[23:0] CLK DE HSYNC EPAD Type Input/output Input Control Control Control Control Input Input Input Input Power Description CEC Data Signal. CEC clock is an oscillator from 3 MHz to 100 MHz. Serial Port Data Clock to Sink. Serial Port Data I/O to Sink. Serial Port Data Clock Input. Serial Port Data I/O. Video Data Input Video Input Clock. Data Enable Signal Input for Digital Video. Horizontal Sync Input. The LQFP has an exposed pad that should be connected to ground. Rev. 0 | Page 7 of 12 ADV7511W APPLICATIONS INFORMATION • DESIGN RESOURCES Evaluation kits, reference design schematics, hardware and software guides, and other support documentation are available from Analog Devices, Inc., Engineer Zone. Other references include the following: • • EIA/CEA-861D, a technical specifications document, describes audio and video InfoFrames, as well as the E-EDID structure for HDMI. It is available from the Consumer Electronics Association (CEA). Rev. 0 | Page 8 of 12 High-Definition Multimedia Interface Specification Version 1.4a, a defining document for HDMI v.1.4a, and the High-Definition Multimedia Interface Compliance Test Specification Version 1.4a are available from HDMI Licensing, LLC. High-Bandwidth Digital Content Protection System Revision 1.3, the defining technical specifications document for the HDCP v.1.3, is available from Digital Content Protection, LLC. ADV7511W OUTLINE DIMENSIONS 0.75 0.60 0.45 12.20 12.00 SQ 11.80 1.60 MAX 10.20 10.00 SQ 9.80 49 49 64 48 1 1.00 REF 64 1 48 PIN 1 SEATING PLANE EXPOSED PAD 5.10 5.00 SQ 4.90 7.50 REF SQ BOTTOM VIEW TOP VIEW 0.20 0.09 0.15 0.05 7° 0° (PINS DOWN) 16 33 17 32 16 33 17 32 VIEW A 0.08 COPLANARITY 0.50 LEAD PITCH VIEW A ROTATED 90° CCW COMPLIANT TO JEDEC STANDARDS MS-026-BCD-HD 0.27 0.22 0.17 FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 03-16-2010-A 1.45 1.40 1.35 (PINS UP) Figure 3. 64-Lead Low Profile Quad Flat Package [LQFP_EP] (SW-64-2) Dimensions shown in millimeters ORDERING GUIDE Model 1, 2 ADV7511WBSWZ ADV7511WBSWZ-RL EVAL-ADV7511W-AKZ 1 2 Temperature Range −40°C to +105°C −40°C to +105°C Package Description 64-Lead Low Profile Quad Flat Package with Exposed Pad [LQFP_EP] 64-Lead Low Profile Quad Flat Package with Exposed Pad [LQFP_EP], Tape and Reel Evaluation Kit Package Option SW-64-2 SW-64-2 Z = RoHS Compliant Part. W = Qualified for Automotive Applications. AUTOMOTIVE PRODUCTS The ADV7511W models are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. Rev. 0 | Page 9 of 12 ADV7511W NOTES Rev. 0 | Page 10 of 12 ADV7511W NOTES Rev. 0 | Page 11 of 12 ADV7511W NOTES I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). HDMI, the HDMI Logo, and High-Definition Multimedia Interface are trademarks or registered trademarks of HDMI Licensing LLC in the United States and other countries. ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09732-0-5/11(0) Rev. 0 | Page 12 of 12