TI CY74FCT244T 8-bit buffers/line driver Datasheet

CY54/74FCT240T
CY54/74FCT244T
8-Bit Buffers/Line Drivers
SCCS017 - May 1994 - Revised February 2000
Features
• Sink current
Source current
• Function, pinout, and drive compatible with FCT and
F logic
• FCT-D speed at 3.6 ns max. (Com’l FCT244 only),
FCT-C speed at 4.1 ns max. (Com’l),
FCT-A speed at 4.8 ns max. (Com’l)
• Reduced VOH (typically = 3.3V) versions of equivalent
FCT functions
• Edge-rate control circuitry for significantly improved
noise characteristics
• Power-off disable feature
• ESD > 2000V
• Matched rise and fall times
• Fully compatible with TTL input and output logic levels
• Extended commercial range of −40˚C to +85˚C
64 mA (Com’l), 48 mA (Mil)
32 mA (Com’l), 12 mA (Mil)
Functional Description
The FCT240T and FCT244T are octal buffers and line drivers
designed to be employed as memory address drivers, clock
drivers, and bus-oriented transmitters/receivers. The devices
provide speed and drive capabilities equivalent to their fastest
bipolar logic counterparts while reducing power consumption. The
input and output voltage levels allow direct interface with TTL,
NMOS, and CMOS devices without external components.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Logic Block Diagram
FCT240T
FCT244T
OEA
OEA
OEB
DA0
OA0
OB0
DB0
DA1
OA1
OB1
DB1
DA2
OA2
OB2
DB2
DA3
OA3
OB3
DB3
OEB
DA0
OA0
OB0
DB0
DA1
OA1
OB1
DB1
DA2
OA2
OB2
DB2
DA3
OA3
DB3
OB3
FCT240T–1
FCT240T–4
Pin Configurations
DIP/SOIC/QSOP
Top View
OA3
DB2
12
13
GND
7 6 5 4
FCT240T
3
2
1
20
19
OB0
DA0
OEA
VCC
OEB
14 1516 17 18
OA2
DB 1
OA1
DB 0
OA0
DB3
9
10
11
FCT240T–2
1
20
VCC
DA0
2
19
OEB
OB0
3
18
OA0
DA1
4
17
DB0
OB3
OB1
5 FCT240T 16
OA1
GND
DA2
6
15
DB1
DB3
OB2
7
14
OA2
DA3
8
13
DB2
OB3
9
12
OA3
GND
10
11
DB3
OEA
1
20
VCC
DA0
2
19
OEB
OB0
3
18
OA0
OB0
DA1
4
17
DB0
DA0
OB1
5 FCT244T 16
OA1
OEA
DA2
6
15
DB1
VCC
OB2
7
14
OA2
OEB
DA3
8
13
DB2
OB3
9
12
OA3
GND
10
11
DB3
DA3
OB 2
DA2
OB 1
DA1
OEA
FCT240T–3
DIP/SOIC/QSOP
Top View
LCC
Top View
8
OA3
DB2
9
10
11
7 6 5 4
3
2
1
20
19
FCT244T
12
13
14 1516 17 18
OA2
DB1
OA1
DB0
OA0
8
OB3
OB 1
DA1
DA3
OB 2
DA2
LCC
Top View
FCT240T–5
Copyright
FCT240T–6
© 2000, Texas Instruments Incorporated
CY54/74FCT240T
CY54/74FCT244T
]
]
Function Table FCT240T[1]
Function Table FCT244T[1]
Inputs
Inputs
OEA
OEB
D
Output
OEA
OEB
D
Output
L
L
H
L
L
H
L
H
X
H
L
Z
L
L
H
L
L
H
L
H
X
L
H
Z
Maximum Ratings[2, 3]
Power Dissipation .......................................................... 0.5W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
(Above which the useful life may be impaired. For user guidelines, not tested.)
Operating Range
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied .............................................–65°C to +135°C
Range
Supply Voltage to Ground Potential ............... –0.5V to +7.0V
DC Input Voltage............................................ –0.5V to +7.0V
DC Output Voltage ......................................... –0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin).......120 mA
Speed
Ambient
Temperature
VCC
0°C to +70°C
5V ± 5%
Commercial
DT
Commercial
T, AT, CT
–40°C to +85°C
5V ± 5%
Military[4]
All
–55°C to +125°C
5V ± 10%
Electrical Characteristics Over the Operating Range
Parameter
VOH
Description
Output HIGH Voltage
Test Conditions
Min.
Typ.[5]
Max.
Unit
VCC=Min., IOH=–32 mA
Com’l
2.0
VCC=Min., IOH=–15 mA
Com’l
2.4
3.3
V
V
VCC=Min., IOH=–12 mA
Mil
2.4
3.3
V
VCC=Min., IOL=64 mA
Com’l
VCC=Min., IOL=48mA
Mil
VOL
Output LOW Voltage
0.3
0.55
V
VIH
Input HIGH Voltage
0.3
0.55
V
VIL
Input LOW Voltage
VH
Hysteresis[6]
All inputs
0.2
VIK
Input Clamp Diode Voltage
VCC=Min., IIN=–18 mA
–0.7
–1.2
V
II
Input HIGH Current
VCC=Max., VIN=VCC
5
µA
IIH
Input HIGH Current
VCC=Max., VIN=2.7V
±1
µA
IIL
Input LOW Current
VCC=Max., VIN=0.5V
±1
µA
IOZH
Off State HIGH-Level Output
Current
VCC = Max., VOUT = 2.7V
10
µA
IOZL
Off State LOW-Level
Output Current
VCC = Max., VOUT = 0.5V
–10
µA
IOS
Output Short Circuit Current[7]
VCC=Max., VOUT=0.0V
–225
mA
IOFF
Power-Off Disable
VCC=0V, VOUT=4.5V
±1
µA
2.0
V
0.8
–60
–120
V
V
Notes:
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
4. TA is the “instant on” case temperature.
5. Typical values are at VCC=5.0V, TA=+25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
2
CY54/74FCT240T
CY54/74FCT244T
]
Capacitance[6]
Parameter
Description
Typ.[5]
Max.
Unit
CIN
Input Capacitance
5
10
pF
COUT
Output Capacitance
9
12
pF
Power Supply Characteristics
Parameter
Description
Test Conditions
Typ.[5]
Max.
Unit
ICC
Quiescent Power Supply Current VCC=Max., VIN≤0.2V,
VIN≥VCC–0.2V
0.1
0.2
mA
∆ICC
Quiescent Power Supply Current VCC=Max., VIN=3.4V,[8]
(TTL inputs)
f1=0, Outputs Open
0.5
2.0
mA
ICCD
Dynamic Power Supply
Current[9]
VCC=Max., One Input Toggling,
50% Duty Cycle, Outputs Open, OE1=OE2=GND,
VIN≤0.2V or VIN≥VCC–0.2V
0.06
0.12
mA/MHz
IC
Total Power Supply Current[10]
VCC=Max., 50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=10 MHz,
OE1=OE2=GND, VIN≤0.2V or VIN≥VCC–0.2V
0.7
1.4
mA
VCC=Max., 50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=10 MHz,
OE1=OE2=GND, VIN=3.4V or VIN=GND
1.0
2.4
mA
VCC=Max., 50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1=2.5 MHz,
OE1=OE2=GND, VIN≤0.2V or VIN≥VCC–0.2V
1.3
2.6[11]
mA
VCC=Max., 50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1=2.5 MHz,
OE1=OE2=GND, VIN=3.4V or VIN=GND
3.3
10.6[11]
mA
Notes:
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
= IQUIESCENT + IINPUTS + IDYNAMIC
10. IC
IC
= ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
ICC = Quiescent Current with CMOS input levels
∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V)
= Duty Cycle for TTL inputs HIGH
DH
= Number of TTL inputs at DH
NT
ICCD = Dynamic Current caused by an input transition pair (HLH or LHL)
= Clock frequency for registered devices, otherwise zero
f0
= Input signal frequency
f1
= Number of inputs changing at f1
N1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
3
CY54/74FCT240T
CY54/74FCT244T
Switching Characteristics Over the Operating Range
FCT240T
Military
Parameter
Description
[12]
Min.
FCT240AT
Commercial
Max.
[12]
Min.
Max.
Military
[12]
Min.
Commercial
Max.
Min.[12]
Max.
Unit
Fig.
No.[13]
tPLH
tPHL
Propagation Delay
Data to Input
1.5
9.0
1.5
8.0
1.5
5.1
1.5
4.8
ns
1, 2
tPZH
tPZL
Output Enable Time
1.5
10.5
1.5
10.0
1.5
6.5
1.5
6.2
ns
1, 7, 8
tPHZ
tPLZ
Output Disable Time
1.5
10.0
1.5
9.5
1.5
5.9
1.5
5.6
ns
1, 7, 8
FCT240CT
Military
Parameter
Description
Commercial
Min.[12]
Max.
Min.[12]
Max.
Unit
Fig.
No.[13]
tPLH
tPHL
Propagation Delay Data to Input
1.5
4.7
1.5
4.3
ns
1, 2
tPZH
tPZL
Output Enable Time
1.5
5.7
1.5
5.0
ns
1, 7, 8
tPHZ
tPLZ
Output Disable Time
1.5
4.6
1.5
4.5
ns
1, 7, 8
FCT244T
Military
Parameter
Description
Min.[12]
FCT244AT
Commercial
Max.
Min.[12]
Military
Commercial
Max.
Min.[12]
Max.
Min.[12]
Max.
Unit
Fig.
No.[13]
tPLH
tPHL
Propagation Delay
Data to Input
1.5
7.0
1.5
6.5
1.5
5.1
1.5
4.6
ns
1, 3
tPZH
tPZL
Output Enable Time
1.5
8.5
1.5
8.0
1.5
6.5
1.5
6.2
ns
1, 7, 8
tPHZ
tPLZ
Output Disable Time
1.5
7.5
1.5
7.0
1.5
5.9
1.5
5.6
ns
1, 7, 8
FCT244CT
Military
Parameter
Description
FCT244DT
Commercial
Commercial
Min.[12]
Max.
Min.[12]
Max.
Min.[12]
Max.
Unit
Fig.
No.[13]
tPLH
tPHL
Propagation Delay Data to Input
1.5
4.6
1.5
4.1
1.5
3.6
ns
1, 3
tPZH
tPZL
Output Enable Time
1.5
6.5
1.5
5.8
1.5
4.8
ns
1, 7, 8
tPHZ
tPLZ
Output Disable Time
1.5
5.7
1.5
5.2
1.5
4.0
ns
1, 7, 8
Notes:
12. Minimum limits are specified but not tested on Propagation Delays.
13. See “Parameter Measurement Information” in the General Information section.
4
CY54/74FCT240T
CY54/74FCT244T
Ordering Information—FCT240T
Speed
(ns)
4.3
4.8
5.1
8.0
9.0
Ordering Code
Package
Name
Package Type
CY74FCT240CTSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
CY74FCT240CTQCT
Q5
20-Lead (150-Mil) QSOP
CY74FCT240ATSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
CY74FCT240ATQCT
Q5
20-Lead (150-Mil) QSOP
CY54FCT240ATDMB
D6
20-Lead (300-Mil) CerDIP
CY54FCT240ATLMB
L61
20-Pin Square Leadless Chip Carrier
CY74FCT240TSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
CY74FCT240TQCT
Q5
20-Lead (150-Mil) QSOP
CY54FCT240TDMB
D6
20-Lead (300-Mil) CerDIP
Operating
Range
Commercial
Commercial
Military
Commercial
Military
Ordering Information—FCT244T
Speed
(ns)
3.6
Ordering Code
Package
Name
Package Type
Operating
Range
CY74FCT244DTQCT
Q5
20-Lead (150-Mil) QSOP
CY74FCT244DTSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
CY74FCT244CTSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
CY74FCT244CTQCT
Q5
20-Lead (150-Mil) QSOP
4.6
CY54FCT244CTDMB
D6
20-Lead (300-Mil) CerDIP
Military
4.6
CY74FCT244ATPC
P5
20-Lead (300-Mil) Molded DIP
Commercial
CY74FCT244ATSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
CY74FCT244ATQCT
Q5
20-Lead (150-Mil) QSOP
CY54FCT244ATDMB
D6
20-Lead (300-Mil) CerDIP
CY54FCT244ATLMB
L61
20-Pin Square Leadless Chip Carrier
CY74FCT244TSOC/SOCT
S5
20-Lead (300-Mil) Molded SOIC
CY74FCT244TQCT
Q5
20-Lead (150-Mil) QSOP
CY54FCT244TDMB
D6
20-Lead (300-Mil) CerDIP
CY54FCT244TLMB
L61
20-Pin Square Leadless Chip Carrier
4.1
5.1
6.5
7.0
Shaded areas contain preliminary information.
Document #: 38-00259-B
5
Commercial
Commercial
Military
Commercial
Military
CY54/74FCT240T
CY54/74FCT244T
Package Diagrams
20-Lead (300-Mil) CerDIP D6
MIL-STD-1835
20-Pin Square Leadless Chip Carrier L61
D- 8 Config.A
MIL-STD-1835 C-2A
20-Lead (300-Mil) Molded DIP P5
6
CY54/74FCT240T
CY54/74FCT244T
Package Diagrams (continued)
20-Lead Quarter Size Outline Q5
20-Lead (300-Mil) Molded SOIC S5
7
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Copyright  2000, Texas Instruments Incorporated
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