AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator General Description Features The AAT3242 is a dual low dropout linear regulator with Power OK (POK) outputs. Two integrated regulators provide a high power 300mA output and a lower power 150mA output, making this device ideal for use with microprocessors and DSP cores in portable products. Two POK pins provide open drain output signals when their respective regulator output is within regulation. The AAT3242 has independent input voltage and enable pins for increased design flexibility. This device features a very low quiescent current (140µA typical) and low dropout voltages (typically 200mV and 400mV at the full output current level), making it ideal for portable applications where extended battery life is critical. The AAT3242 has complete over-current/short-circuit and over-temperature protection circuits to guard against extreme operating conditions. • • • • • • • • • • • • The AAT3242 is available in a space-saving 12-pin TSOPJW package. This device is capable of operation over the -40°C to +85°C temperature range. PowerLinear™ High/Low Current Outputs, 300mA/150mA Low Dropout: • LDO A: 400mV at 300mA • LDO B: 200mV at 150mA High Output Voltage Accuracy: ±1.5% High PSRR: 65dB at 1KHz 70µA Quiescent Current for Each LDO Over-Current/Short-Circuit Protection Over-Temperature Protection Two POK Outputs Independent Power and Enable Inputs Uses Low Equivalent Series Resistance (ESR) Ceramic Capacitors 12-Pin TSOPJW Package -40°C to +85°C Temperature Range Applications • • • • • • • Cellular Phones Digital Cameras Handheld Instruments Microprocessor / DSP Core / I/O Power Notebook Computers PDAs and Handheld Computers Portable Communication Devices Typical Application INA VIN OUTA AAT3242 Enable A ENA OUTPUT A 100k POKA POKA OUTPUT B OUTB INB 100k POKB Enable B 3242.2005.01.1.4 ENB GND POKB 2.2µF 2.2µF 1 AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator Pin Descriptions Pin # Symbol Function 1 ENA Enable Regulator A pin; this pin should not be left floating. When pulled low, the PMOS pass transistor turns off and the device enters shutdown mode, consuming less than 1µA. 2, 3, 8, 9 GND Ground connection pins. 4 POKA Power OK pin with open drain output. It is pulled low when the OUTA pin is below the 10% regulation window. 5 OUTB Low current (150mA) regulator output pin; should be decoupled with a 2.2µF or greater output low-ESR ceramic capacitor. 6 INB Input voltage pin for Regulator B; should be decoupled with 1µF or greater capacitor. 7 ENB Enable Regulator B; this pin should not be left floating. When pulled low, the PMOS pass transistor turns off and the device enters shutdown mode, consuming less than 1µA. 10 POKB Power OK pin with open drain output. It is pulled low when the OUTB pin is below the 10% regulation window. 11 OUTA High-current (300mA) regulator output pin; should be decoupled with a 2.2µF or greater output low-ESR ceramic capacitor. 12 INA Input voltage pin for Regulator A; should be decoupled with 1µF or greater capacitor. Pin Configuration TSOPJW-12 (Top View) ENA GND GND POKA OUTB INB 2 1 12 2 11 3 10 4 9 5 8 6 7 INA OUTA POKB GND GND ENB 3242.2005.01.1.4 AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator Absolute Maximum Ratings1 Symbol Description VIN VENIN(MAX) IOUT 2 TJ TLEAD Input Voltage Maximum EN to Input Voltage DC Output Current Operating Junction Temperature Range Maximum Soldering Temperature (at leads, 10 sec) Value Units 6.0 0.3 PD/(VIN-VO) -40 to 150 300 V V mA °C °C Notes: 1: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time. 2: Based on long-term current density limitation. Thermal Information Symbol θJA PD Description Thermal Resistance Maximum Power Dissipation (TA = 25°C) 1 2 Value Units 110 909 °C/W mW Note 1: Mounted on an FR4 board. Note 2: Derate 9.1mW/°C above 25°C. 3242.2005.01.1.4 3 AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator Electrical Characteristics1 VIN = VOUT(NOM) + 1.0 V for VOUT options greater than 1.5V. VIN = 2.5V for VOUT ≤ 1.5 V. IOUT = 1.0mA, COUT = 2.2 µF, CIN = 1.0 µF, TA = -40°C to +85°C, unless otherwise noted. Typical values are TA = 25°C. Symbol Description LDO A; IOUT = 300mA VOUT Output Voltage Tolerance VIN VDO ∆VOUT/ VOUT*∆VIN ∆VOUT(Line) Input Voltage Dropout Voltage 2,3 Line Regulation 4 ∆VOUT(Load) Dynamic Load Regulation Dynamic Line Regulation VEN(L) VEN(H) VPOK VPOKHYS VPOK(LO) IPOK IOUT ISC IQ ISD Enable Threshold Low Enable Threshold High Power OK Trip Threshold Power OK Hysteresis Power OK Output Voltage Low POK Output Leakage Current Output Current Short-Circuit Current Ground Current Shutdown Current PSRR Power Supply Rejection Ratio TSD Over-Temperature Shutdown Threshold Over-Temperature Shutdown Hysteresis Output Noise Output Voltage Temperature Coefficient THYS eN TC Conditions IOUT = 1mA to 300mA TA = 25°C TA = -40 to 85°C IOUT = 300mA VIN = VOUT + 1 to 5.0 V Min -1.5 -2.5 VOUT + VDO5 IOUT = 300mA, VIN = VOUT + 1 to VOUT + 2, TR/TF = 2µS IOUT = 1mA to 300mA, TR <5µS VOUT Rising, TA = 25°C ISINK = 1mA VPOK <5.5V, VOUT in Regulation VOUT > 1.2V VOUT < 0.4V VIN =5V, No Load; EN A = VIN VIN = 5V, EN A = 0V 1kHz IOUT =10mA 10kHz 1MHz eNBW = 300Hz to 50kHz Typ Max 400 1.5 2.5 5.5 600 0.09 % V mV %/V 5.0 mV 60 mV 0.6 1.5 90 Units 94 1.0 98 0.4 1.0 300 600 70 65 45 42 145 125 1.0 V V % of VOUT % of VOUT V µA mA mA µA µA dB °C 12 °C 250 22 µVRMS ppm/°C Notes: 1: The AAT3242 is guaranteed to meet performance specifications over the -40°C to +85°C operating temperature range and is assured by design, characterization, and correlation with statistical process controls. 2: VDO is defined as VIN - VOUT when VOUT is 98% of nominal. 3: For VOUT <2.1V, VDO = 2.5 - VOUT. 4: CIN = 10µF. 5: To calculate minimum input voltage, use the following equation: VIN(MIN) = VOUT(MAX) + VDO(MAX) as long as VIN ≥ 2.5V. 4 3242.2005.01.1.4 AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator Electrical Characteristics1 (continued) VIN = VOUT(NOM) + 1.0 V for VOUT options greater than 1.5V. VIN = 2.5V for VOUT ≤ 1.5 V. IOUT = 1.0mA, COUT = 2.2 µF, CIN = 1.0 µF, TA = -40°C to +85°C, unless otherwise noted. Typical values are TA = 25°C. Symbol Description LDO B; IOUT = 150mA VOUT Output Voltage Tolerance VIN VDO ∆VOUT/ VOUT*∆VIN ∆VOUT(Line) Input Voltage Dropout Voltage 2,3 Line Regulation4 ∆VOUT(Load) VEN(L) VEN(H) VPOK VPOKHYS VPOK(LO) IPOK IOUT ISC IQ Dynamic Load Regulation Enable Threshold Low Enable Threshold High Power OK Trip Threshold Power OK Hysteresis Power OK Output Voltage Low POK Output Leakage Current Output Current Short-Circuit Current Ground Current PSRR Power Supply Rejection Ratio TSD Over-Temperature Shutdown Threshold Over-Temperature Shutdown Hysteresis Output Noise Output Voltage Temperature Coefficient THYS eN TC Dynamic Line Regulation Conditions IOUT = 1mA to 150mA Min TA = 25°C TA = -40 to 85°C IOUT = 150mA VIN = VOUT + 1 to 5.0 V -1.5 -2.5 VOUT + VDO5 IOUT = 150mA, VIN = VOUT + 1 to VOUT + 2, TR/TF = 2 µS IOUT = 1mA to 150mA, TR <5µS VOUT Rising, TA = 25°C ISINK = 1mA VPOK <5.5V, VOUT in Regulation VOUT > 1.2V VOUT < 0.4V VIN = 5V, No Load; EN B = VIN 1kHz IOUT = 10mA 10kHz 1MHz eNBW = 300Hz to 50kHz Typ Max 200 1.5 2.5 5.5 300 0.09 5.0 0.6 94 1.0 98 0.4 1.0 150 600 70 65 45 42 145 % V mV %/V mV 60 1.5 90 Units 125 mV V V % of VOUT % of VOUT V µA mA mA µA dB °C 12 °C 250 22 µVRMS ppm/°C Notes: 1: The AAT3242 is guaranteed to meet performance specifications over the -40°C to +85°C operating temperature range and is assured by design, characterization, and correlation with statistical process controls. 2: VDO is defined as VIN - VOUT when VOUT is 98% of nominal. 3: For VOUT <2.3V, VDO = 2.5 - VOUT. 4: CIN = 10µF. 5: To calculate minimum input voltage, use the following equation: VIN(MIN) = VOUT(MAX) + VDO(MAX) as long as VIN ≥ 2.5V. 3242.2005.01.1.4 5 AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator Typical Characteristics Unless otherwise noted, VIN = 5V, TA = 25°C. Dropout Characteristics Dropout Voltage vs. Temperature 3.20 IL = 300mA 480 Output Voltage (V) Dropout Voltage (mV) 540 420 360 300 IL = 100mA IL = 150mA 240 180 120 60 -40 -30 -20 -10 0 2.80 IOUT = 300mA IOUT = 150mA 2.60 2.40 IOUT = 10mA 2.20 IL = 50mA 0 IOUT = 0mA 3.00 2.00 2.70 10 20 30 40 50 60 70 80 90 100 110 120 2.80 IOUT = 100mA IOUT = 50mA 2.90 Temperature (°C) Ground Current (µA) 450 Dropout Voltage (mV) 3.20 3.30 90.00 500 400 350 300 85°C 250 200 25°C 150 -40°C 100 80.00 70.00 60.00 IOUT=300mA 50.00 IOUT=150mA IOUT=50mA 40.00 IOUT=0mA 30.00 IOUT=10mA 20.00 10.00 50 0 0 50 100 150 200 250 0.00 300 2 2.5 3 3.5 4 4.5 Output Current (mA) Input Voltage (V) Quiescent Current vs. Temperature Output Voltage vs. Temperature 5 1.203 100 90 1.202 80 Output Voltage (V) Quiescent Current (µA) 3.10 Ground Current vs. Input Voltage Dropout Voltage vs. Output Current 70 60 50 40 30 20 10 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 Temperature (°C) 6 3.00 Input Voltage (V) 1.201 1.200 1.199 1.198 1.197 1.196 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 Temperature (°C) 3242.2005.01.1.4 AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator Typical Characteristics Unless otherwise noted, VIN = 5V, TA = 25°C. Turn-On Time and POK Delay Line Transient Response 6 VENABLE (2V/div) VOUT (500mV/div) VPOK (500mV/div) Time (10µs/div) VIN 3.20 4 3.15 3 3.10 2 3.05 1 0 3.00 VOUT 2.95 -1 2.90 -2 2.85 Output Voltage (V) Input Voltage (V) 5 3.25 Time (100µs/div) Load Transient Response 300mA Load Transient Response 2.80 300 2.75 200 2.70 100 2.65 IOUT 0 2.60 Output Voltage (V) 400 VOUT 3.00 800 2.90 700 2.80 2.70 500 2.60 400 2.50 300 2.40 2.30 200 IOUT 100 2.20 -100 0 2.10 Time (100 µs/div) -100 10µs/div POK Output Response Over-Current Protection 1200 Output Current (mA) VIN (2V/div) VOUT (2V/div) VPOK (1V/div) 1000 800 600 400 200 0 -200 Time (200µs/div.) 3242.2005.01.1.4 600 VOUT Output Current (mA) 2.85 500 Output Current (mA) Output Voltage (V) 2.90 Time (20ms/div) 7 AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator Typical Characteristics Unless otherwise noted, VIN = 5V, TA = 25°C. 10 1.250 1.225 1.200 1 0.1 1.175 VEN(H) 1.150 1.125 VEN(L) 1.100 1.075 0.01 0.01 0.1 1 10 Frequency (kHz) 8 VEN(H) and V EN(L) vs. VIN VEN (V) Noise Amplitude (µV/rtHz) Self Noise 100 1000 1.050 2.5 3.0 3.5 4.0 4.5 5.0 5. Input Voltage (V) 3242.2005.01.1.4 AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator Functional Block Diagram INA OUTA Over-Current Protection ENA + Error Amplifier - Over Temperature Protection Voltage Reference POKA + 91% VREF OUTB INB Over-Current Protection Over Temperature Protection ENB + Error Amplifier - Voltage Reference POKB + 91% VREF GND Functional Description The AAT3242 is a high performance dual LDO regulator with two Power OK pins. The first regulator (A) sources 300mA of current while the second (B) regulator can deliver 150mA. Each regulator has an integrated Power OK comparator which indicates when the respective output is out of regulation. The POK pins are open drain outputs, and they are held low when the respective regulator is in shutdown mode. 3242.2005.01.1.4 The device has independent enable pins to shutdown each LDO regulator for power conservation in portable products. Forcing EN A/B low (<0.6V) powers down the regulators and draws a maximum of 1.0µA. The AAT3242 has short-circuit and thermal protection in case of adverse operating conditions. Device power dissipation is limited to the package type and thermal dissipation properties. Refer to the Thermal Considerations section of this datasheet for details on device operation at maximum output current loads. 9 AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator Applications Information To assure the maximum possible performance is obtained from the AAT3242, please refer to the following application recommendations. greater for COUT. If desired, COUT may be increased without limit. In low output current applications where output load is less than 10mA, the minimum value for COUT can be as low as 0.47µF. Capacitor Characteristics Input Capacitor Typically a 1µF or larger capacitor is recommended for CIN in most applications. A CIN capacitor is not required for basic LDO regulator operation. However, if the AAT3242 is physically located more than three centimeters from an input power source, a CIN capacitor will be needed for stable operation. CIN should be located as closely to the device VIN pin as practically possible. CIN values greater than 1µF will offer superior input line transient response and will assist in maximizing the highest possible power supply ripple rejection. Ceramic, tantalum, or aluminum electrolytic capacitors may be selected for CIN. There is no specific capacitor ESR requirement for CIN. However, for 300mA LDO regulator output operation, ceramic capacitors are recommended for CIN due to their inherent capability over tantalum capacitors to withstand input current surges from low impedance sources such as batteries in portable devices. Output Capacitor For proper load voltage regulation and operational stability, a capacitor is required between pins VOUT and GND. The COUT capacitor connection to the LDO regulator ground pin should be made as direct as practically possible for maximum device performance. The AAT3242 has been specifically designed to function with very low ESR ceramic capacitors. For best performance, ceramic capacitors are recommended. Typical output capacitor values for maximum output current conditions range from 1µF to 10µF. Applications utilizing the exceptionally low output noise and optimum power supply ripple rejection characteristics of the AAT3242 should use 2.2µF or 10 Ceramic composition capacitors are highly recommended over all other types of capacitors for use with the AAT3242. Ceramic capacitors offer many advantages over their tantalum and aluminum electrolytic counterparts. A ceramic capacitor typically has very low ESR, is lower cost, has a smaller PCB footprint, and is non-polarized. Line and load transient response of the LDO regulator is improved by using low ESR ceramic capacitors. Since ceramic capacitors are non-polarized, they are not prone to incorrect connection damage. Equivalent Series Resistance ESR is a very important characteristic to consider when selecting a capacitor. ESR is the internal series resistance associated with a capacitor that includes lead resistance, internal connections, size and area, material composition, and ambient temperature. Typically, capacitor ESR is measured in milliohms for ceramic capacitors and can range to more than several ohms for tantalum or aluminum electrolytic capacitors. Ceramic Capacitor Materials Ceramic capacitors less than 0.1µF are typically made from NPO or COG materials. NPO and COG materials are typically tight tolerance and are very stable over temperature. Larger capacitor values are typically composed of X7R, X5R, Z5U, and Y5V dielectric materials. Large ceramic capacitors, typically greater than 2.2µF, are often available in the low-cost Y5V and Z5U dielectrics. These two material types are not recommended for use with LDO regulators since the capacitor tolerance can vary more than ±50% over the operating temperature range of the device. A 2.2µF Y5V capacitor could be reduced to 1µF over tempera- 3242.2005.01.1.4 AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator ture; this could cause problems for circuit operation. X7R and X5R dielectrics are much more desirable. The temperature tolerance of X7R dielectric is better than ±15%. Capacitor area is another contributor to ESR. Capacitors which are physically large in size will have a lower ESR when compared to a smaller sized capacitor of an equivalent material and capacitance value. These larger devices can improve circuit transient response when compared to an equal value capacitor in a smaller package size. Consult capacitor vendor data sheets carefully when selecting capacitors for LDO regulators. POK Output The AAT3242 features integrated Power OK comparators which can be used as an error flag. The POK open drain output goes low when output voltage is 6% (typ) below its nominal regulation voltage. Additionally, any time one of the regulators is in shutdown, the respective POK output is pulled low. Connect a pull-up resistor from POKA to OUTA, and POKB to OUTB. Enable Function The AAT3242 features an LDO regulator enable/disable function. Each LDO has its own dedicated enable pin. These pins (EN) are active high and are compatible with CMOS logic. To assure the LDO regulators will switch on, the ENA/B must be greater than 1.6V. The LDO regulators will shut down when the voltage on the ENA/B pins falls below 0.6V. In shutdown, the AAT3242 will consume less than 1.0µA of current. If the enable function is not needed in a specific application, it may be tied to VIN to keep the LDO regulator in a continuously on state. When the LDO regulators are in shutdown mode, an internal 20Ω resistor is connected between VOUT and GND. This is intended to discharge COUT when the LDO regulators are disabled. The internal 20Ω has no adverse effects on device turn-on time. Short Circuit Protection The AAT3242 contains an internal short-circuit protection circuit that will trigger when the output load 3242.2005.01.1.4 current exceeds the internal threshold limit. Under short-circuit conditions, the output of the LDO regulator will be current limited until the short-circuit condition is removed from the output or LDO regulator package power dissipation exceeds the device thermal limit. Thermal Protection The AAT3242 has an internal thermal protection circuit which will turn on when the device die temperature exceeds 145°C. The LDO regulator output will remain in a shutdown state until the internal die temperature falls back below the 145°C trip point. The combination and interaction between the shortcircuit and thermal protection systems allows the LDO regulators to withstand indefinite short-circuit conditions without sustaining permanent damage. No-Load Stability The AAT3242 is designed to maintain output voltage regulation and stability under operational no load conditions. This is an important characteristic for applications where the output current may drop to zero. Reverse Output-to-Input Voltage Conditions and Protection Under normal operating conditions, a parasitic diode exists between the output and input of the LDO regulator. The input voltage should always remain greater than the output load voltage maintaining a reverse bias on the internal parasitic diode. Conditions where VOUT might exceed VIN should be avoided since this would forward bias the internal parasitic diode and allow excessive current flow into the VOUT pin, possibly damaging the LDO regulator. In applications where there is a possibility of VOUT exceeding VIN for brief amounts of time during normal operation, the use of a larger value CIN capacitor is highly recommended. A larger value of CIN with respect to COUT will effect a slower CIN decay rate during shutdown, thus preventing VOUT from exceeding VIN. In applications where there is a greater danger of VOUT exceeding VIN for extended periods of time, it is recommended to place a 11 AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator Schottky diode across VIN to VOUT (connecting the cathode to VIN and anode to VOUT). The Schottky diode forward voltage should be less than 0.45V. maximum package power dissipation can be determined by the following equation: PD(MAX) = Thermal Considerations and High Output Current Applications The AAT3242 is designed to deliver continuous output load currents of 300mA and 150mA under normal operations, and can supply up to 500mA during circuit start-up conditions. This is desirable for circuit applications where there might be a brief high in-rush current during a power-on event. The limiting characteristic for the maximum output load current safe operating area is essentially package power dissipation and the internal preset thermal limit of the device. In order to obtain high operating currents, careful device layout and circuit operating conditions need to be taken into account. The following discussions will assume the LDO regulator is mounted on a printed circuit board utilizing the minimum recommended footprint as stated in the layout considerations section of this document. At any given ambient temperature (TA), the TJ(MAX) - TA θJA Constants for the AAT3242 are TJ(MAX) (the maximum junction temperature for the device, which is 125°C) and θJA = 110°C/W (the package thermal resistance). Typically, maximum conditions are calculated at the maximum operating temperature of TA = 85°C and under normal ambient conditions where TA = 25°C. Given TA = 85°C, the maximum package power dissipation is 364mW. At TA = 25°C, the maximum package power dissipation is 909mW. The maximum continuous output current for the AAT3242 is a function of the package power dissipation and the input-to-output voltage drop across the LDO regulator. To determine the maximum output current for a given output voltage, refer to the following equation. This calculation accounts for the total power dissipation of the LDO regulator, including that caused by ground current. PD(MAX) = [(VIN - VOUTA)IOUTA + (VIN x IGND)] + [(VIN - VOUTB)IOUTB + (VIN x IGND)] This formula can be solved for IOUTA to determine the maximum output current for LDOA: IOUTA(MAX) = 12 PD(MAX) - (2×VIN × IGND) - (VIN - VOUTB) × IOUTB VIN - VOUTA 3242.2005.01.1.4 AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator The following is an example for a 2.5V output: From the discussion above, PD(MAX) was determined to equal 909mW at TA = 25°C. VOUTA = 2.5V VOUTB = 1.5V IOUTB = 150mA VIN = 4.2V IGND = 125µA IOUTA(MAX) = 909mW - (2 × 4.2V × 125µA) - (4.2 - 1.5) × 150mA 4.2 - 2.5 IOUTA(MAX) = 296mA Therefore, with Regulator B delivering 150mA at 1.5V, Regulator A can sustain a constant 2.5V output at a 296mA load current at an ambient temperature of 25°C. Higher input-to-output voltage differentials can be obtained with the AAT3242, while maintaining device functions within the thermal safe operating area. To accomplish this, the device thermal resistance must be reduced by increasing the heat sink area or by operating the LDO regulator in a duty-cycled mode. For example, an application requires VIN = 4.2V while VOUT = 1.5V at a 500mA load and TA = 25°C. To maintain this high input voltage and output current level, the LDO regulator must be operated in a duty-cycled mode. Refer to the following calculation for duty-cycle operation: PD(MAX) is assumed to be 909mW IGND = 125µA IOUT = 500mA VIN = 4.2V VOUT = 1.5V %DC = 100(PD(MAX)) [(VIN - VOUTA)IOUTA + (VIN × IGND)] + [(VIN - VOUTB)IOUTB + (VIN × IGND)] %DC = 100(909mW) [(4.2V - 1.5V)500mA + (4.2V × 125µA)] + [(4.2V - 1.5V)200mA + (4.2V × 125µA)] %DC = 48.10% For a 500mA output current and a 2.7V drop across the AAT3242 at an ambient temperature of 25°C, the maximum on-time duty cycle for the device would be 48.10%. 3242.2005.01.1.4 13 AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator Ordering Information Package Voltage LDO A LDO B Marking1 Part Number (Tape and Reel) TSOPJW-12 3.3V 2.5V LSXYY AAT3242ITP-WN-T1 TSOPJW-12 3.0V 2.85V LPXYY AAT3242ITP-TR-T1 TSOPJW-12 3.0V 2.5V LJXYY AAT3242ITP-TN-T1 TSOPJW-12 3.0V 1.8V LHXYY AAT3242ITP-TI-T1 TSOPJW-12 3.0V 1.5V NTXYY AAT3242ITP-TG-T1 TSOPJW-12 2.9V 1.5V MOXYY AAT3242ITP-SG-T1 TSOPJW-12 2.8V 3.0V LVXYY AAT3242ITP-QT-T1 TSOPJW-12 2.8V 2.8V LDXYY AAT3242ITP-QQ-T1 TSOPJW-12 2.8V 2.6V LQXYY AAT3242ITP-QO-T1 TSOPJW-12 2.8V 2.5V LLXYY AAT3242ITP-QN-T1 TSOPJW-12 2.8V 1.9V LRXYY AAT3242ITP-QY-T1 TSOPJW-12 2.8V 1.5V MCXYY AAT3242ITP-QG-T1 TSOPJW-12 2.7V 2.7V LOXYY AAT3242ITP-PP-T1 TSOPJW-12 2.6V 1.8V MJXYY AAT3242ITP-OI-T1 TSOPJW-12 1.8V 1.5V MWXYY AAT3242ITP-IG-T1 Note: Sample stock is generally held on all part numbers listed in BOLD. Note 1: XYY = assembly and date code. Legend 14 Voltage Code 1.5 G 1.8 I 1.9 Y 2.5 N 2.6 O 2.7 P 2.8 Q 2.85 R 2.9 S 3.0 T 3.3 W 3242.2005.01.1.4 AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator Package Information TSOPJW-12 2.85 ± 0.20 2.40 ± 0.10 0.10 0.20 +- 0.05 0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC 7° NOM 0.055 ± 0.045 0.04 REF 0.15 ± 0.05 + 0.10 1.00 - 0.065 0.9625 ± 0.0375 3.00 ± 0.10 4° ± 4° 0.45 ± 0.15 0.010 2.75 ± 0.25 All dimensions in millimeters. 3242.2005.01.1.4 15 AAT3242 300mA/150mA Dual CMOS LDO Linear Regulator AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. AnalogicTech warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with AnalogicTech’s standard warranty. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. Advanced Analogic Technologies, Inc. 830 E. Arques Avenue, Sunnyvale, CA 94085 Phone (408) 737-4600 Fax (408) 737-4611 16 3242.2005.01.1.4