Revised December 1999 FST3253 Dual 4:1 Multiplexer/Demultiplexer Bus Switch General Description Features The Fairchild Switch FST3253 is a dual 4:1 high-speed CMOS TTL-compatible multiplexer/demultiplexer bus switch. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. ■ 4Ω switch connection between two ports. When OE is LOW, S0 and S1 connect the A Port to the selected B Port output. When OE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports. ■ Control inputs compatible with TTL level. ■ Minimal propagation delay through the switch. ■ Low lCC. ■ Zero bounce in flow-through mode. Ordering Code: Order Number Package Number FST3253M M16A Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow FST3253QSC MQA16 16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide FST3253MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Diagram Connection Diagram Truth Table Pin Descriptions S1 S0 OE1 OE2 Function X X H X Disconnect 1A Disconnect 2A Pin Name Description X X X H OE1, OE2 Bus Switch Enables L L L L A = B1 S0 , S1 Select Inputs L H L L A = B2 A Bus A H L L L A = B3 B1 , B2 , B3 , B4 Bus B H H L L A = B4 © 1999 Fairchild Semiconductor Corporation DS500058 www.fairchildsemi.com FST3253 Dual 4:1 Multiplexer/Demultiplexer Bus Switch September 1997 FST3253 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC ) Recommended Operating Conditions (Note 3) −0.5V to +7.0V DC Switch Voltage (VS) −0.5V to +7.0V Power Supply Operating (VCC) DC Input Voltage (VIN)(Note 2) −0.5V to +7.0V Input Voltage (VIN) 0V to 5.5V 0V to 5.5V DC Input Diode Current (lIK) VIN<0V −50mA Output Voltage (VOUT) DC Output (IOUT ) Sink Current 128mA Input Rise and Fall Time (tr, tf) +/− 100mA DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG) 4.0V to 5.5V Switch Control Input −65°C to +150 °C 0ns/V to 5ns/V Switch I/O 0ns/V to DC −40 °C to −85 °C Free Air Operating Temperature (TA) Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The Recommended Operating Conditions tables will define the conditions for actual device operation. Note 2: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 3: Unused control inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol Parameter VCC (V) TA = −40 °C to +85 °C Min Typ (Note 4) Units Conditions Max −1.2 IIN = −18mA VIK Clamp Diode Voltage VIH High Level Input Voltage 4.0–5.5 VIL Low Level Input Voltage 4.0–5.5 0.8 V II Input Leakage Current 5.5 ±1.0 µA 0≤ VIN ≤5.5V IOZ OFF-STATE Leakage Current 5.5 ±1.0 µA 0 ≤A, B ≤VCC RON Switch On Resistance 4.5 4 7 Ω VIN = 0V, IIN = 64mA (Note 5) 4.5 4 7 Ω VIN = 0V, IIN = 30mA 4.5 8 15 Ω VIN = 2.4V, IIN = 15mA 4.0 11 20 Ω VIN = 2.4V, IIN = 15mA 4.5 2.0 V V ICC Quiescent Supply Current 5.5 3 µA VIN = VCC or GND, IOUT = 0 ∆ ICC Increase in ICC per Input 5.5 2.5 mA One input at 3.4V Other inputs at VCC or GND Note 4: Typical values are at VCC = 5.0V and T A = +25°C Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B) pins. www.fairchildsemi.com 2 TA = −40 °C to +85 °C CL = 50pF, RU = RD = 500Ω Symbol Parameter VCC = 4.5 – 5.5V Min tPHL,tPLH tPZH, tPZL tPHZ, tPLZ Prop Delay Bus to Bus (Note 6) Max VCC = 4.0V Min Units Conditions Figure No. Max 0.25 0.25 Prop Delay, Select to Bus A 1.0 5.3 6.3 Output Enable Time, Select to Bus B 1.0 5.3 6.0 Output Enable Time, IOE to Bus A, B 1.0 5.3 6.2 Output Disable Time., Select to Bus B 1.0 5.8 6.2 Output Disable Time, IOE to Bus A, B 1.0 5.5 6.2 ns ns ns VI = OPEN Figure 1 Figure 2 VI = 7V for tPZL VI = OPEN for tPZH VI = 7V for tPLZ VI = OPEN for tPHZ Figure 1 Figure 2 Figure 1 Figure 2 Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance). Capacitance Symbol Parameter Typ Control Pin Input Capacitance CIN CI/O (Note 7) A Port B Port Input/Output Capacitance Max Units 3 pF 13 pF 5 pF Conditions VCC = 5.0V VCC, OE = 5.0V Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested. AC Loading and Waveforms Note: Input driven by 50 Ω source terminated in 50 Ω Note: C L includes load and stray capacitance Note: Input PRR = 1.0 MHz, tW = 500 ns FIGURE 1. AC Test Circuit FIGURE 2. AC Waveforms 3 www.fairchildsemi.com FST3253 AC Electrical Characteristics FST3253 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide Package Number MQA16 www.fairchildsemi.com 4 FST3253 Dual 4:1 Multiplexer/Demultiplexer Bus Switch Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 Technology Description The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com