Kersemi AUIRFR1010Z Advanced process technology Datasheet

AUIRFR1010Z
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Advanced Process Technology
Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
D
G
S
VDSS
RDS(on) typ.
max.
ID (Silicon Limited)
ID (Package Limited)
55V
5.8mΩ
7.5mΩ
91A
42A
Description
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating . These features combine to make this design an extremely efficient and
reliable device for use in Automotive applications
and a wide variety of other applications.
D
S
G
D-Pak
AUIRFR1010Z
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in
the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Ambient temperature (T A) is 25°C, unless otherwise specified.
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
Max.
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
c
Power Dissipation
VGS
EAS
EAS (tested )
IAR
EAR
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally limited)
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
TJ
TSTG
Operating Junction and
Storage Temperature Range
h
c
d
g
j
Junction-to-Ambient
W
W/°C
V
mJ
A
mJ
-55 to + 175
°C
300
Thermal Resistance
Parameter
Junction-to-Case
Junction-to-Ambient (PCB mount)
A
0.9
± 20
110
220
See Fig.12a, 12b, 15, 16
Soldering Temperature, for 10 seconds (1.6mm from case )
RθJC
RθJA
RθJA
Units
91
65
42
360
140
i
Typ.
Max.
Units
–––
–––
–––
1.11
40
110
°C/W
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1
06/16/11
AUIRFR1010Z
Static Electrical @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
ΔV(BR)DSS/ΔTJ
RDS(on)
VGS(th)
gfs
IDSS
IGSS
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
55
–––
–––
2.0
31
–––
–––
–––
–––
–––
0.051
5.8
–––
–––
–––
–––
–––
–––
–––
–––
7.5
4.0
–––
20
250
200
-200
Conditions
V VGS = 0V, ID = 250μA
V/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 42A
V VDS = VGS, ID = 100μA
S VDS = 25V, ID = 42A
μA VDS = 55V, VGS = 0V
VDS = 55V, VGS = 0V, TJ = 125°C
nA VGS = 20V
VGS = -20V
e
Dynamic Electrical @ TJ = 25°C (unless otherwise specified)
Symbol
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
LD
Parameter
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Min. Typ. Max. Units
–––
–––
–––
–––
–––
–––
–––
–––
63
17
23
17
76
42
48
4.5
95
–––
–––
–––
–––
–––
–––
–––
nC
ns
nH
Conditions
ID = 42A
VDS = 44V
VGS = 10V
VDD = 28V
ID = 42A
RG = 7.6 Ω
VGS = 10V
Between lead,
e
e
D
LS
Internal Source Inductance
–––
7.5
–––
6mm (0.25in.)
from package
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
–––
–––
–––
–––
2840
470
250
1630
360
560
–––
–––
–––
–––
–––
–––
S
and center of die contact
VGS = 0V
VDS = 25V
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 44V
pF
G
f
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
–––
–––
42
ISM
(Body Diode)
Pulsed Source Current
–––
–––
360
VSD
trr
Qrr
ton
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
–––
–––
–––
–––
24
20
1.3
36
30
c
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
‚ Limited by TJmax, starting TJ = 25°C, L = 0.13mH
RG = 25Ω, IAS = 42A, VGS =10V. Part not
recommended for use above this value.
ƒ Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
„ Coss eff. is a fixed capacitance that gives the same
charging time as Coss while VDS is rising from
0 to 80% VDSS .
2
Conditions
MOSFET symbol
A
V
ns
nC
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 42A, VGS = 0V
TJ = 25°C, IF = 42A, VDD = 28V
di/dt = 100A/μs
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical
repetitive avalanche performance.
† This value determined from sample failure population.
100% tested to this value in production.
‡ When mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to
application note #AN-994
ˆ Rθ is measured at TJ approximately 90°C
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AUIRFR1010Z
Qualification Information†
Automotive
(per AEC-Q101)
Qualification Level
Moisture Sensitivity Level
Machine Model
ESD
Human Body Model
Charged Device
Model
RoHS Compliant
††
Comments: This part number(s) passed Automotive qualification.
IR’s Industrial and Consumer qualification level is granted by
extension of the higher Automotive level.
D-PAK
MSL1
†††
Class M4 (+/- 700V)
AEC-Q101-002
Class H1C (+/- 1500V)
AEC-Q101-001
Class C5 (+/- 2000V)
AEC-Q101-005
†††
†††
Yes
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3
AUIRFR1010Z
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
100
BOTTOM
10
4.5V
1
0.1
100
BOTTOM
4.5V
10
≤60μs PULSE WIDTH
≤60μs PULSE WIDTH
Tj = 25°C
1
Tj = 175°C
1
10
0.1
100
Fig 1. Typical Output Characteristics
10
100
Fig 2. Typical Output Characteristics
1000
120
Gfs , Forward Transconductance (S)
ID, Drain-to-Source Current(Α)
1
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
100
TJ = 175°C
10
TJ = 25°C
1
VDS = 25V
≤60μs PULSE WIDTH
0.1
2
4
6
8
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
4
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
10
TJ = 25°C
100
80
TJ = 175°C
60
40
20
VDS = 10V
380μs PULSE WIDTH
0
0
20
40
60
80
100
ID,Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
vs. Drain Current
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AUIRFR1010Z
5000
VGS, Gate-to-Source Voltage (V)
4000
C, Capacitance(pF)
20
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Ciss
3000
2000
Coss
1000
Crss
ID= 42A
VDS = 44V
VDS= 28V
VDS= 11V
16
12
8
4
0
0
0
1
10
100
1000.00
10000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
60
80
100
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
100.00
TJ = 175°C
10.00
TJ = 25°C
VGS = 0V
0.10
40
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
1.00
20
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
OPERATION IN THIS AREA
LIMITED BY R DS (on)
1000
100
100μsec
10
1msec
10msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
DC
0.1
1
10
100
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
5
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AUIRFR1010Z
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
2.5
LIMITED BY PACKAGE
ID , Drain Current (A)
80
60
40
20
0
25
50
75
100
125
150
ID = 42A
VGS = 10V
2.0
1.5
1.0
0.5
175
-60 -40 -20
TC , Case Temperature (°C)
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
vs. Temperature
Fig 9. Maximum Drain Current vs.
Case Temperature
Thermal Response ( ZthJC )
10
1
D = 0.50
0.20
0.10
0.1
0.05
τJ
0.02
0.01
0.01
R1
R1
τJ
τ1
R2
R2
τ2
τ1
τ2
Ci= τi/Ri
Ci i/Ri
SINGLE PULSE
( THERMAL RESPONSE )
R3
R3
τ3
τC
τ
τ3
Ri (°C/W)
0.3854
0.3138
τi (sec)
0.000251
0.001092
0.4102
0.015307
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
6
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AUIRFR1010Z
DRIVER
L
VDS
D.U.T
RG
VGS
20V
+
V
- DD
IAS
tp
A
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
EAS, Single Pulse Avalanche Energy (mJ)
15V
500
I D
7.6A
11A
BOTTOM 42A
TOP
400
300
200
100
0
tp
25
50
75
100
125
150
175
Starting TJ, Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
10 V
QGS
QGD
Charge
Fig 13a. Basic Gate Charge Waveform
VGS(th) Gate threshold Voltage (V)
4.0
VG
ID = 1.0mA
3.5
ID = 250μA
ID = 100μA
3.0
2.5
2.0
1.5
L
DUT
0
1K
VCC
1.0
-75 -50 -25
0
25
50
75
100 125 150 175
TJ , Temperature ( °C )
Fig 14. Threshold Voltage vs. Temperature
Fig 13b. Gate Charge Test Circuit
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7
AUIRFR1010Z
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ΔTj = 25°C due to
avalanche losses
0.01
0.05
10
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
EAR , Avalanche Energy (mJ)
120
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 42A
100
80
60
40
20
0
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 16. Maximum Avalanche Energy
vs. Temperature
8
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AUIRFR1010Z
D.U.T
Driver Gate Drive
ƒ
+
‚
-
-
„
P.W.
Period
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
• dv/dt controlled by RG
• Driver same type as D.U.T.
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D=
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer

RG
Period
P.W.
+
V DD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
*
ISD
VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V DS
V GS
RG
RD
D.U.T.
+
-V DD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
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9
AUIRFR1010Z
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
Part Number
AUFR1010Z
YWWA
IR Logo
XX
or
Date Code
Y= Year
WW= Work Week
A= Automotive, LeadFree
XX
Lot Code
10
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AUIRFR1010Z
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
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11
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